Heterojunction Bipolar Transistor Technology Research Articles

Wafer-bonded In0.53Ga0.47As/GaN p–n diodes with near-unity ideality factor

III–V/III-nitride p–n junctions were realized via crystal heterogeneous integration, and the resulting diodes were characterized to analyze electrical behavior and junction quality. p-type In0.53Ga0.47As, which is a well-established base layer in InP heterojunction bipolar transistor (HBT) technology, was used in combination with a homoepitaxial n-type GaN. The latter offers low dislocation density, coupled with high critical electric field and saturation velocity, which are attractive for use in future HBT collector layers. Transmission electron microscopy confirms an abrupt interface in the fabricated heterogeneous diodes. Electrical characterization of the diodes reveals a near-unity ideality factor (n ∼ 1.07) up to 145 °C, a high rectification ratio of ∼108, and a low interface trap density of 3.7 × 1012 cm−2.

Design of Power Amplifiers for BDS-3 Terminal Based on InGaP/GaAs HBT MMIC and LGA Technology.

With the development and popularization of the Beidou-3 navigation satellite system (BDS-3), to ensure its unique short message function, it is necessary to integrate a radio frequency (RF) transmitting circuit with high performance in the BDS-3 terminal. As the key device in an RF transmitting circuit, the RF power amplifier (PA) largely determines the comprehensive performance of the circuit with its transmission power, efficiency, linearity, and integration. Therefore, in this paper, an L-band highly integrated PA chip compatible with 3 W and 5 W output power is designed in InGaP/GaAs heterojunction bipolar transistor (HBT) technology combined with temperature-insensitive adaptive bias technology, class-F harmonic suppression technology, analog pre-distortion technology, temperature-insensitive adaptive power detection technology, and land grid array (LGA) packaging technology. Additionally, three auxiliary platforms are proposed, dedicated to the simulation and optimization of the same type of PA designs. The simulation results show that at the supply voltage of 5 V and 3.5 V, the linear gain of the PA chip reaches 39.4 dB and 38.7 dB, respectively; the output power at 1 dB compression point (P1dB) reaches 37.5 dBm and 35.1 dBm, respectively; the saturated output power (Psat) reaches 38.2 dBm and 36.2 dBm, respectively; the power added efficiency (PAE) reaches 51.7% and 48.2%, respectively; and the higher harmonic suppression ratios are less than -62 dBc and -65 dBc, respectively. The size of the PA chip is only 6 × 4 × 1 mm3. The results also show that the PA chip has high gain, high efficiency, and high linearity under both output power conditions, which has obvious advantages over similar PA chip designs and can meet the short message function of the BDS-3 terminal in various application scenarios.

Doherty power amplifier with simplified out‐of‐phase power splitter for 5G applications

AbstractThis letter presents the architecture and characterization of a Doherty power amplifier (DPA) with a simplified out‐of‐phase power splitter (SOPPS) for fifth‐generation (5G) small‐cell applications. The proposed SOPPS consists of two passive components, which is conducive to chip miniaturization. Additionally, a stable DPA architecture is employed to avoid oscillation caused by out‐of‐phase ports imbalance. A DPA based on gallium arsenide (GaAs) heterojunction bipolar transistor (HBT) technology is fabricated, achieving high gain of 32 dB over 2.5 to 2.7 GHz. Using a continuous‐wave signal, the DPA exhibits a saturation output power of 36 dBm, with a peak power‐added efficiency (PAE) of 42.3% and 37% at saturation and 6‐dB power‐back‐off, respectively, across the operating band.

A 2.2–4.2-GHz Wideband Analog Phase Shifter MMIC With Low RMS Phase/Amplitude Error

This letter presents a 2.2–4.2-GHz 360° continuous-tuned phase shifter (PS) using the Gallium arsenide (GaAs) heterojunction bipolar transistor (HBT) technology. A new method for broadband analog PS design based on a tunable low-pass network (LPN), a tunable high-pass network (HPN), and a magnetically coupled all-pass network (MCAPN) configuration is proposed to achieve uniform phase shifting and flat amplitude response at the same time for each phase-shifting state. The fabricated PS demonstrates a low average insertion loss (IL) of 4.9 dBC a low root-mean-square (rms) phase error of less than 5.5°, and a low rms amplitude error of less than 0.47 dB between 2.2 and 4.2 GHz. The proposed analog PS has the most flattened phase performance compared with previously reported pass PSs over a wide bandwidth.

Stacked Common-Base vs Common-Emitter mmWave PA Cells and 68–105 GHz Broadband Asymmetrical PA in 250nm InP HBT

In this paper, we perform a comparative analysis between stacked common-emitter (SCE) and stacked common-base topologies (SCB) for high efficiency and broadband millimeter-Wave (mmWave) power amplifiers (PAs) in 250 nm InP-based heterojunction bipolar transistor (HBT) technology. We propose an analytical approach to design stacked PA cells accounting for complex load impedance and intra-matching between stacked transistors to allow optimal loadpull operation of both the devices in the stack. We demonstrate how SCB cell can allow higher gain, mitigated power and efficiency trade-off and linearity, when compared to more well-established SCE cells at higher mmWave frequencies. The designed SCB and SCE cells achieve a measured gain of 11.8 dB/6dB gain, 33%/34% peak PAE, 16.8%/14.5% PAE at 6-dB back-off, and Psat of 18.7 dBm/19.6 dBm at 90 GHz. The SCB PA demonstrates superior linearity, and achieves an EVM of 2.38% at 11.8-dBm average power supporting 3 Gbps 64-QAM. The SCB PA achieves 17.9-18.9-dBm Psat across 80–110 GHz and is one of the highest efficiency, broadband and linear PAs in W-band using InP technology. Utilizing the PA cells, we demonstrate an asymmetrical broadband power combining circuit for high efficiency combining across a large relatively bandwidth. The PA operates across a 68–105 GHz <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$P_{sat,3dB}$ </tex-math></inline-formula> bandwidth with 21.5 dBm peak saturation power and 24% peak PAE.

Silicon-Germanium Heterojunction Bipolar Transistor DC and AC Analysis Operating under Cryogenic Temperature

In this work, the numerical simulation of a SiGe heterojunction bipolar transistor (HBT) for DC and AC performance operating at cryogenic temperature with a hydrodynamic carrier transport model is analyzed. A new modified temperature-dependent Si1−xGex energy bandgap model was used. Using a simplified 2D TCAD design structure, the device characteristics on 55 nm SiGe HBT technology and the mobility model are calibrated with experimental data. Base current reversal due to induced impact-ionization at the collector-base junction is analyzed, where the estimated collector-emitter breakdown voltage with the base open (BVCEO) is 1.48 V at 300 K. This reveals good voltage handling ability. At cryogenic temperatures, dopant incomplete ionization in the lightly doped collector region shows a 28% decrease in ionized dopant concentration at 50 K; this affects the base-collector depletion capacitance. The emitter electron barrier tunneling leakage on collector current is studied using a non-local e-barrier tunneling model at different temperatures that shows an improvement in peak DC gain at lower temperatures. Using the small-signal ac analysis, the cut-off frequency and the maximum oscillation frequency are extracted for high-frequency application, and the base widening effect is discussed. A comparison of this work with measured data on 90 nm SiGe HBT is also discussed in brief, which shows improvements in the simulated structure.

600-GHz High-Power Signal Sources Based on 250-nm InP HBT Technology

Two 600-GHz radiation signal sources, a single- and four-element oscillators, have been developed based on a 250-nm InP heterojunction bipolar transistor technology. The single-element unit oscillator adopts the common-emitter cross-coupled structure with reactive emitter degeneration, which enables second harmonic oscillation around 600 GHz with enhanced output power. Based on the unit oscillator, the four-element coupled oscillator with cascaded two-way shunt power combiners was developed to further increase the output power. Both oscillators are integrated with on-chip patch antennas with simulated antenna gain of 3.5 dBi and directivity of 8.0 dBi at 600 GHz. The measured oscillation frequencies of the two signal sources are 580–586 GHz and 583–591 GHz, respectively, varied with the base bias. They exhibited the measured peak effective isotropic radiation power (EIRP) of 1.1 and 2.7 dBm, respectively, which correspond to the radiated output power of −7.5 and −5.9 dBm. The total dc power consumptions are 34.5 and 129.6 mW, which lead to the estimated dc-to-RF efficiencies of 0.52 and 0.2% for the two sources. The measured phase noises are −88.6 and −90.1 dBc/Hz at 10-MHz offset frequency for the single- and four-element oscillators, respectively.

Characterization of ALD Ta2O5, Al2O3, and Ta2O5/Al2O3 Nanolaminate as Metal-Insulator-Metal Capacitor Dielectric for GaAs HBT Technology

In order to reduce die size and increase capacity, the metal-insulator-metal (MIM) capacitor area in circuit designs fabricated using GaAs hetero-junction bipolar transistor (HBT) technology has to be reduced. This can be achieved by using a capacitor dielectric material that has a high dielectric constant or high capacitance density. In GaAs HBT technology, the MIM capacitor dielectric film is typically also required to have a high breakdown voltage (>20 V) and low leakage current. Furthermore, the deposited dielectric film has to be compatible with GaAs processing and has to be deposited at a temperature of < 300oC, due to the limited process thermal budget in the HBT technology. As a result of these requirements, there are only a few materials available for MIM capacitor dielectric application in GaAs HBT technology.In this study, 60 nm tantalum pentoxide (Ta2O5), aluminum oxide (Al2O3), and Ta2O5/Al2O3 nanolaminate deposited using atomic layer deposition (ALD) have been characterized and evaluated as MIM capacitor dielectric for GaAs HBT technology. The results show that the capacitor with 60 nm of ALD Ta2O5 has the highest capacitance density (3.84x10-15 F/μm2), followed by the capacitor with 60 nm Ta2O5/Al2O3 nanolaminate, and the capacitor with 60 nm Al2O3 capacitor dielectric film with a capacitance density of 2.40x10-15 F/µm2 and 1.37x10-15 F/μm2, respectively. The calculated dielectric constant of ALD Ta2O5 and Ta2O5/Al2O3 nanolaminate is 26.1 and 16.3, respectively, while that of ALD Al2O3 is 9.3, as shown in Figure 1.Figure 2 shows the I-V characteristics of MIM capacitors with 4055 μm2 area and with 60 nm of ALD Ta2O5, Ta2O5/Al2O3 nanolaminate, and Al2O3 capacitor dielectric. As can be seen, the capacitor with Al2O3 capacitor dielectric has significantly lower leakage and higher breakdown voltage (46 V), while the capacitor with Ta2O5/Al2O3 and Ta2O5 capacitor dielectric has higher leakage current and lower breakdown voltage of 32.7 V and 22.4 V, respectively. Figure 3 shows the C-V characteristics of capacitors with the 3 ALD capacitor dielectric films. The results show that the capacitance of MIM capacitor using these three films increased marginally by 2.2% to 4.3%, when the temperature was increased from 25oC to 125oC. No significant change in capacitance density of these ALD capacitor dielectric films was observed, when the applied voltage was varied from -5 V to +5 V. Figure 1

Characterization of ALD Ta2O5, Al2O3, and Ta2O5/Al2O3 Nanolaminate as Metal-Insulator-Metal Capacitor Dielectric for GaAs HBT Technology

Tantalum pentoxide (Ta2O5), aluminum oxide (Al2O3), and Ta2O5/Al2O3 nanolaminate deposited using atomic layer deposition (ALD) have been characterized and evaluated as metal-insulator-metal (MIM) capacitor dielectric in GaAs hetero-junction bipolar transistor (HBT) technology. The results show that the capacitor with 60 nm of ALD Ta2O5 and Al2O3 capacitor dielectric films resulted in a capacitance density of 3.84x10-15 F/μm2 and 1.37x10-15 F/μm2 and a dielectric constant of 26.1 and 9.3, respectively, while the capacitor with 60 nm of ALD Ta2O5/Al2O3 nanolaminate capacitor dielectric film resulted in capacitance density of 2.40x10-15 F/μm2 and a dielectric constant of 16.3. The capacitance density of capacitor using these three films increased marginally by 2.2% to 4.3%, when the temperature was increased from 25oC to 125oC. No significant change in capacitance density of these ALD films was observed, when the applied voltage was varied from -5 V to +5 V. The leakage current density of the ALD Al2O3, Ta2O5, and Ta2O5/Al2O3 nanolaminate films at an electric field of 3 MV/cm is 2.0x10-16 A/μm2, 6.8x10-8 A/μm2, and 9.2x10-13 A/μm2, respectively. The 60 nm ALD Al2O3 film has higher breakdown voltage of 46 V, compared to the 60 nm ALD Ta2O5 film and the 60 nm Ta2O5/Al2O3 nanolaminate film, which has a breakdown voltage of 22.5 V and 32.7 V, respectively. As the temperature was increased from 25oC to 125oC, the leakage current increased and breakdown voltage decreased for all three ALD films.

Transmitter and Receiver Circuits for a High-Speed Polymer Fiber-Based PAM-4 Communication Link.

A high data rate RF-DAC and a power detector (PD) are designed and fabricated in a 250 nm indium phosphide (InP) double heterojunction bipolar transistor (DHBT) technology. A communication link using the Tx-Rx over polymer microwave fiber (PMF) is measured. The link consists of a pulse amplitude modulation (PAM) modulator and a PD as a demodulator, as well as a one-meter-long dielectric waveguide. The working frequency range of the complete link is verified to be 110–150 GHz. The peak output power of the PAM modulator is 5 dBm, and it has a −3 dB bandwidth of 43 GHz. The PD consists of a parallel connected common emitter configured transistor and a common base configured transistor to suppress the odd-order harmonics at the PD’s output, as well as a stacked transistor to amplify the output signal. Tx and Rx chips, including pads, occupy a total area of only 0.83 mm2. The PMF link can support a PAM-4 signal with 22 Gbps data transmission, and a PAM-2 signal with 30 Gbps data transmission, with a bit error rate (BER) of <10−12, with demodulation performed in real time. Furthermore, the energy efficiency for the link (Tx + Rx) is 4.1 pJ/bit, using digital data input and receiving PAM-2 output (5.6 pJ/bit for PAM-4).

Methods for Extracting the Temperature- and Power-Dependent Thermal Resistance for SiGe and III-V HBTs From DC Measurements: A Review and Comparison Across Technologies

Many different methods have been proposed in the literature for the extraction of the thermal resistance of heterojunction bipolar transistors (HBTs). This review presents a detailed evaluation and discussion of several widely used methods. Special emphasis is put on a generalized analysis of the underlying assumptions, suitable operating point range, and necessary measurement effort of each method. The accuracy of each method is determined by applying it to data based on circuit simulations of advanced SiGe and III-V HBT technologies. Experimental data from those technologies are used to highlight practical issues. A guideline for the selection of the most suitable method in practice is also given.

A 110 GHz Comb Generator in a 250 nm InP HBT Technology

We report a monolithic microwave integrated-circuit (MMIC) comb generator capable of producing a repetitive narrow pulse (7.1 ps pulse duration) with sharp edges (4.2 ps falling time). The circuit was designed in a 250 nm indium phosphide (InP) heterojunction bipolar transistor (HBT) technology using differential pairs. We characterized the output signal with a 110 GHz sampling oscilloscope and de-embedded the band-limited frequency spectrum of the pulse in the circuit reference plane. We measured a pulse duration of 7.1 ps and a peak amplitude of −0.333 V. In the frequency domain, the comb generator provided −48.7 dBm of output power at 110 GHz when the circuit is fed with a 1 GHz input signal.

A 32.2 GHz Full Adder Designed with TLE Method in a InP DHBT Technology

Ultra-high-speed full adder is the bottleneck in a tens of GHz Direct digital synthesizer (DDS). In this paper, a 32.2 GHz, 1bit full adder in a 0.7 μm InP double hetero-junction bipolar transistor (DHBT) technology is presented. In such a high-speed circuit, signal integrity is a crucial issue. Therefore, a transmission line equivalent (TLE) method is proposed. With the TLE method, the design of the full adder could be simplified with good accuracy. The synchronous latch is combined with adding operation to improve the calculation speed. A single-level parallel-gated circuit is designed using majority decision algorithm to reduce power consumption. Measurement results show that the maximum clock frequency of the full adder is 32.2-GHz, and the overall power consumption is 350 mW. The full adder is successfully adopted in a 17 GHz, 8 bit DDS which can synthesize sin-wave outputs from 66.41 MHz to 8.5 GHz in 66.41 MHz steps with an average Spurious-Free Dynamic Range (SFDR) of -18.1 dBc.

Terahertz Signal Source and Receiver Operating Near 600 GHz and Their 3-D Imaging Application

In this article, a set of oscillators and a heterodyne image receiver operating near 600 GHz have been developed, each based on a 250-nm InP heterojunction bipolar transistor (HBT) technology and a 130-nm SiGe HBT technology, respectively. The oscillators are based on the common-base cross-coupled push–push topology, which employed coupled-line loads for improved output power and efficiency with a small area. The measured oscillation frequency ranges of the three oscillators with different coupled-line lengths were 628–682, 556–610, and 509–548 GHz, respectively, with a tuning capability achieved with bias variation. The maximum output power and the dc-to-RF efficiency achieved with the oscillators were −10 dBm and 0.19%, respectively. The heterodyne receiver, which consists of a mixer, an IF amplifier, and an IF detector, exhibited a maximum responsivity of 469 kV/W and a minimum noise equivalent power (NEP) of 0.64 pW/Hz1/2. A transmission-mode 3-D THz tomography imaging setup was established with one of the fabricated oscillators and the heterodyne receiver employed as the signal source and the image detector, respectively. With the imaging setup, a successful reconstruction of 3-D images of a target object was demonstrated based on the filtered back-projection algorithm.

H-Band InP HBT Frequency Tripler Using the Triple-Push Technique

A broadband H-band (220 GHz–325 GHz) frequency tripler using the triple-push technique is presented in 250-nm InP heterojunction bipolar transistors (HBT) technology. It consisted of three identical unit-cell multipliers, which were individually pumped by the W-band input signals with 120° phase difference. For this purpose, a 120° 3-way power divider was proposed using the 1:2 and 1:1 Lange couplers with 30° phase delay lines. The fundamental and 2nd harmonic signals of each unit-cell multiplier were added out-of-phase at the output, allowing an effective harmonic suppression. On the contrast, the 3rd harmonic components were combined in-phase at the output, so that the entire circuit successfully did the function of the frequency multiplier-by-3. The fabricated frequency tripler exhibited a broadband output power of −7.4 ± 1.4 dBm from 225 GHz to 330 GHz at an input power of 9.6 ± 0.8 dBm, with an average conversion gain of −16.8 dB.

A Highly Efficient Linear Multimode Multiband Class-J Power Amplifier Utilizing GaAs HBT for Handset Modules

This article presents the design techniques for a multimode multiband (MMMB) linear RF power amplifier (PA) with a high efficiency, suitable for wireless handset multichip modules. The PA operates with high efficiency at the saturated output power and maintains high linearity with an enhanced efficiency at the back-off power. It is, thus, able to operate in multimodes (saturated/linear) and covers multibands (814-915 MHz; bands: 5/8/18/19/20/26) without reconfiguration, representing a novel solution for the converged PA module architecture to reduce the number of PAs within the handset. A new technique to the handset industry, class-J, is adopted to improve the efficiency while maintaining the linearity. To the best of our knowledge, this work provides the first implementation of the class-J using the GaAs heterojunction bipolar transistor (HBT) technology in the multichip PA modules. The utilization of the GaAs HBT adds more degrees of freedom to enhance the linearity. A PA module, consisting of a GaAs HBT die mounted on a four-layer laminate, is designed. The die is fabricated using the flip-chip technology. The output matching network and the control/bias network are fabricated on the laminate using the printed inductors and the surface-mount device (SMD) capacitors. The results validate the design techniques, showing 2G power added efficiency (PAE) 62%, 2.5G error vector magnitude (EVM) ≤ 3%, and 3G adjacent channel leakage ratio (ACLR) of 5MHz ≤ -35 dBc. The design achieves a higher PAE than other reported reconfigurable and complex MMMB PAs, with comparable linearity.

106‐GHz bandwidth InP DHBT linear driver with a 3‐V ppdiff swing at 80 GBd in PAM‐4

This Letter reports the design, fabrication and characterisation of a new differential linear driver, fabricated in the III-V Lab 0.7- emitter width indium phosphide (InP) double heterojunction bipolar transistor (DHBT) technology. Large-signal electrical characterisation shows 80-GBd symbol-rate four-level pulse amplitude (PAM-4) modulation conjugated with a driver output swing of 3-Vppdiff and a 0.74-W power consumption. Thus resulting in a 1.22-GBd driving efficiency, the highest in over 70-GBd drivers' state-of-the-art, at that date. Accordingly, S-parameter measurements of the standalone linear driver exhibit the highest gain-bandwidth product of 556 GHz, in that current state-of-the-art.

Design and Analysis of fT-Doubler-Based RF Amplifiers in SiGe HBT Technology

For performance-driven systems such as space-based applications, it is important to maximize the gain of radio-frequency amplifiers (RFAs) with a certain tolerance against radiation, temperature effects, and small form factor. In this work, we present a K-band, compact high-gain RFA using an fT-doubler topology in a silicon-germanium (SiGe) heterojunction bipolar transistors (HBTs) technology platform. The through-silicon vias (TSVs), typically used for small-size chip packaging purposes, have been effectively utilized as an adjustable matching element for input impedance, reducing the overall area of the chip. The proposed RFA, fabricated in a modest 0.35 µm SiGe technology, achieves a gain of 14.1 dB at 20 GHz center frequency, and a noise figure (NF) of 11.2 dB at the same frequency, with a power consumption of 3.3 mW. The proposed design methodology can be used for achieving high gain, avoiding a complex multi-stage amplifier design approach.

A 300-GHz High-Power High-Efficiency Voltage-Controlled Oscillator With Low Power Variation

This letter presents a 300-GHz voltage-controlled oscillator (VCO) with high output power and efficiency. The VCO core employs a differential Colpitts topology with inductive degeneration to facilitate a fundamental oscillation at 300 GHz. A common-base output buffer regulates the output power to minimize the power variation during the frequency tuning. The 300-GHz VCO is fabricated in a 130-nm InP double heterojunction bipolar transistor (DHBT) technology. The VCO exhibits a measured frequency tuning range of 9.9 GHz (294.9–304.8 GHz). The peak output power is measured to be 4.7 dBm at 297 GHz. The dc power consumption is 75.6 mW, leading to a high dc-to-RF conversion efficiency of 3.9%. The VCO output power is maintained nearly constant with only a 0.3-dB variation over the entire frequency tuning range. The phase noise is −86.6 dBc/Hz at 10-MHz offset frequency.

Mitigation of Single-Event Effects in SiGe-HBT Current-Mode Logic Circuits.

It has been known that negative feedback loops (internal and external) in a SiGe heterojunction bipolar transistors (HBT) DC current mirrors improve single-event transient (SET) response; both the peak transient current and the settling time significantly decrease. In the present work, we demonstrate how radiation hardening by design (RHBD) techniques utilized in DC bias blocks only (current mirrors) can also improve the SET response in AC signal paths of switching circuits (e.g., current-mode logic, CML) without any additional hardening in those AC signal paths. Four CML circuits both with and without RHBD current mirrors were fabricated in 130 nm SiGe HBT technology. Two existing RHBD techniques were employed separately in the current mirrors of the CML circuits: (1) applying internal negative feedback and (2) adding a large capacitor in a sensitive node. In addition, these methods are also combined to analyze the overall SET performance. The single-event transients of the fabricated circuits were captured under the two-photon-absorption laser-induced single-event environment. The measurement data clearly show significant improvements in SET response in the AC signal paths of the CML circuits by using the two radiation hardening techniques applied only in DC current mirrors. The peak output transient current is notably reduced, and the settling time upon a laser strike is shortened significantly.