Hardware Emulation Research Articles

Detailed Modeling of a Practical 1400MW Hydropower Plant and Real-Time Hardware Emulation for Governor Tuning Application

Detailed Modeling of a Practical 1400MW Hydropower Plant and Real-Time Hardware Emulation for Governor Tuning Application

Impact of crosstalk and atmospheric turbulence on free space optical communication systems - a hardware emulation

Impact of crosstalk and atmospheric turbulence on free space optical communication systems - a hardware emulation

Real-time hardware emulation of neural cultures: A comparative study of in vitro, in silico and in duris silico models

Biological neural networks are well known for their capacity to process information with extremely low power consumption. Fields such as Artificial Intelligence, with high computational costs, are seeking for alternatives inspired in biological systems. An inspiring alternative is to implement hardware architectures that replicate the behavior of biological neurons but with the flexibility in programming capabilities of an electronic device, all combined with a relatively low operational cost. To advance in this quest, here we analyze the capacity of the HEENS hardware architecture to operate in a similar manner as an in vitro neuronal network grown in the laboratory. For that, we considered data of spontaneous activity in living neuronal cultures of about 400 neurons and compared their collective dynamics and functional behavior with those obtained from direct numerical simulations (in silico) and hardware implementations (in duris silico). The results show that HEENS is capable to mimic both the in vitro and in silico systems with high efficient-cost ratio, and on different network topological designs. Our work shows that compact low-cost hardware implementations are feasible, opening new avenues for future, highly efficient neuromorphic devices and advanced human–machine interfacing.

Battery-less uncertainty-based control of a stand-alone PV-electrolyzer system

Solar photovoltaic (PV) energy is variable. The output power can change considerably in a matter of minutes, imposing challenges on the control of systems connected downstream. The power from these systems can be smoothed using electric storage, potentially increasing the system cost. An alternative is to deliberately curtail the power before it starts to change. This strategy relies on ultra-short-term forecasting to determine the curtailment point. Unfortunately, forecasting is prone to errors and high uncertainty even in the very short-term, leading to control errors. We propose an active power curtailment control strategy for a stand-alone solar photovoltaic system powering an electrolyzer. Our work’s novelty relies on the controller’s ability to deal with large forecasting errors and high uncertainty, combining artificial intelligence for predicting the power ramps and fuzzy logic to account for imperfect prediction. We validated our approach using a hardware emulator of the photovoltaic system, power converter and electrolyzer. Under clear sky conditions, the curtailment results in unnecessary energy loss, while under variable irradiance, the controller successfully smooths the power ramps within 10% of the PV system’s nominal power. Although our approach was designed for a stand-alone system, its concept can be directly applied to grid-connected systems as well.

Grid synchronised three phase VSI-based hardware emulator to realise low frequency electromechanical oscillations in power systems and their effects on physical distance relay

Grid synchronised three phase VSI-based hardware emulator to realise low frequency electromechanical oscillations in power systems and their effects on physical distance relay

Real-Time Hardware Emulation of Microgrid Forming Wireless Power Transfer Systems

The prevalence of wireless charging approaches has manifested a grid-supporting potential which can be evaluated by hardware-based methodologies. In this work, real-time emulation of a bidirectional wireless power transfer (WPT) system capable of DC microgrid formation is investigated on the field-programmable gate array (FPGA). Following a detailed analysis of the transfer characteristics of the dual-active bridge with a series-compensated resonant tank in between, a unified control scheme utilizing a phase-shift strategy is proposed for a flexible voltage or current regulation, thereby enabling the DC microgrid-forming capability. Electromagnetic transient modeling is then carried out so that an accurate digital emulation platform is feasible for prototyping. The fact that the WPT has a high frequency compels a small computation step size, which poses a dramatic challenge to real-time execution. A partition-iteration approach is therefore proposed for matrix dimension reduction which ultimately results in an alleviated processing burden. In the meantime, the parallelism of configurable logic blocks and the pipelined architecture of the FPGA are explored to achieve a low hardware latency. The analytical models, as well as the proposed control method, are validated experimentally, and then real-time hardware emulation of a DC microgrid consisting of WPT systems is performed for an integration study.

Multidomain Device-Level Fuel-Cell Modeling and Real-Time Hardware Emulation for Marine Research Vessel Power System

Marine research vessels (MRVs) are redesigned and refurbished to meet higher energy conversion efficiency and modular integration schemes while conforming to stronger environmental regulations. The proton exchange membrane fuel cell (PEMFC) is currently regarded as a potential power source for marine transportation applications due to its advantages of stability, sustainability, and zero emissions. This paper proposes a hierarchical scheme for the real-time hardware emulation of the MRV’s power system and a comprehensive multi-domain model for PEMFCs. The PEMFC model is presented in the electrochemical, hydration, and thermal domains by ordinary differential equations considering the interactions and dynamics of each domain. Meanwhile, the multi-domain PEMFC model considers the implications of the fluctuating supply of the onboard hydrogen circulation system. Moreover, the dynamics of the lithium-ion battery stacks are represented by an equivalent circuit model which considers heat flux phenomena. In the case study, the DC-AC grid of the MRV’s power system and electric propulsion system is configured using extensive electrification technology with an average model. The real-time hardware emulation is conducted on the Xilinx® UltraScale+™ VCU118 FPGA platform to execute the device-level and system-level behavior transients of the MRV. The results of the real-time hardware emulation have been validated against the full-scale hybrid MRV power system emulation over a wide operating range.

Toward Chemical Accuracy with Shallow Quantum Circuits: A Clifford-Based Hamiltonian Engineering Approach.

Achieving chemical accuracy with shallow quantum circuits is a significant challenge in quantum computational chemistry, particularly for near-term quantum devices. In this work, we present a Clifford-based Hamiltonian engineering algorithm, namely CHEM, that addresses the trade-off between circuit depth and accuracy. Based on a variational quantum eigensolver and hardware-efficient ansatz, our method designs the Clifford-based Hamiltonian transformation that (1) ensures a set of initial circuit parameters corresponding to the Hartree-Fock energy can be generated, (2) effectively maximizes the initial energy gradient with respect to circuit parameters, (3) imposes negligible overhead for classical processing and does not require additional quantum resources, and (4) is compatible with any circuit topology. We demonstrate the efficacy of our approach using a quantum hardware emulator, achieving chemical accuracy for systems as large as 12 qubits with fewer than 30 two-qubit gates. Our Clifford-based Hamiltonian engineering approach offers a promising avenue for practical quantum computational chemistry on near-term quantum devices.

Sequential Routing-based Time-division Multiplexing Optimization for Multi-FPGA Systems

Multi-field programming gate array (FPGA) systems are widely used in various circuit design-related areas, such as hardware emulation, virtual prototypes, and chiplet design methodologies. However, a physical resource clash between inter-FPGA signals and I/O pins can create a bottleneck in a multi-FPGA system. Specifically, inter-FPGA signals often outnumber I/O pins in a multi-FPGA system. To solve this problem, time-division multiplexing (TDM) is introduced. However, undue time delay caused by TDM may impair the performance of a multi-FPGA system. Therefore, a more efficient TDM solution is needed. In this work, we propose a new routing sequence strategy to improve the efficiency of TDM. Our strategy consists of two parts: a weighted routing algorithm and TDM assignment optimization. The algorithm takes into account the weight of the net to generate a high-quality routing topology. Then, a net-based TDM assignment is performed to obtain a lower TDM ratio for the multi-FPGA system. Experiments on the public dataset of CAD Contest 2019 at ICCAD showed that our routing sequence strategy achieved good results. Especially in those testcases of unbalanced designs, the performance of multi-FPGA systems was improved up to 2.63. Moreover, we outperformed the top two contest finalists as to TDM results in most of the testcases.

X-in-the-Loop-Based High Accuracy Test Facility for Industrial Development of Electric Vehicles

The present paper offers a complete, flexible and adaptable solution for electric vehicles industrial developers to test their designs from all the perspectives required by a V-mode development approach. Construction of high accuracy mechanical and electrical real-time digital-twin models fuzzing dedicated software was proven to be the proper solution to reach results confirmed by actual measurements. Methods for transitioning from real-time simulations to emulations or hardware in the loop testing are presented in detail. The digital-twin solution performing real-time simulations are considered to be the virtual test facility presented in the paper. For actual validation, preliminary the battery is studied via hardware emulation and hardware testing. The same approach is then applied to the vehicle motor together with its electronics and control. The added value of the paper is brought by several aspects such as the real-time co-simulation, performed using National Instruments VeriStand software aggregator, the methods of virtual, emulation and hardware testing of the same assemblies, all being confirmed by comparative analysis. The increased precision obtained, proved by actual measurements, estimates the value and usefulness of this study for those working in electric vehicles development. The content of the paper is an extended genuine study giving hands-on solutions for different types of approaches when it comes to developing and testing mechanical or electrical assemblies. The paper gives a theoretical background pushed to the application side confirmed by actual laboratory testing.

Hardware Emulation of Step-Down Converter Power Stages for Digital Control Design

This paper proposes a methodology of delivering the emulation hardware of several step-down converter power stages. The generalized emulator design methodology follows these steps: first, the power stage is described using an ordinary differential equation system; second, the ordinary differential equation system is solved using Euler’s method, and thus an accurate time-domain model is obtained; next, this time-domain model can be described using either general-purpose programming language (MATLAB, C, etc.) or hardware description language (VHDL, Verilog, etc.). As a result, the emulator has been created; validation of the emulator may be carried out by comparing it to SPICE transient simulations. Finally, the validated emulator can be implemented on the preferred target technology, either in a general-purpose processor or a field programmable gate array. As the emulator relies on the ordinary differential equation system of the power stage, it has better behavioral accuracy than the emulators based on average state space models. Moreover, this paper also presents the design methodology of a manually tuned proportional–integrative–derivative controller deployed on a field programmable gate array.

Development of a hardware emulator of a nanosatellite gyroscope

The gyroscope sensor has multiple applications in consumer electronics, aircraft navigation, and control systems. Significant errors that match the corresponding data are a typical disadvantage of this sensor. This needs to be done by making error models that can be used to get the right level of measurement accuracy. For high-precision space applications, the navigation design system should take into account the angle random walk (N), bias instability error (B), and rate random walk (K) of the BMG160 gyroscope. For this reason, this paper shows how to use Allan Variance (AVAR) and Power Spectral Density (PSD) for the experimental identification and modeling of the stochastic parameters of the Bosch BMG160 gyroscope embedded in a nanosatellite in order to get an accurate gyroscope model. This work also demonstrates the principle of operation of the equivalent electronic model intended to carry out advanced simulations without recourse to the real material in order to avoid the problem of bad manipulation and availability of the material in order to reduce the time and cost of development. The interpretation of the Allan curves and the PSD obtained from the measurements collected over a long period is presented, as well as a comparison between the real raw data of the BMG160 gyroscope and the designed hardware emulator in both the time and frequency domains. This is done to evaluate the accuracy of the gyroscope model emulating the real sensor in laboratory simulations. The experimental results show that the signals from the emulator and the BMG160 gyroscope are quite close. Therefore, the proposed prototype could be an optimal solution for laboratory calculations and simulations

AROPS: A Framework of Automated Reaction Optimization with Parallelized Scheduling.

With the development of automated experimental platforms and optimization algorithms, chemists can easily optimize chemical reactions in an automated and high-throughput fashion. However, the modules in existing automated experimental platforms are operated in a linear fashion without orchestrating with the optimization algorithm, thus leaving room for further efficiency improvement. Here, we introduced a framework of automated reaction optimization with parallelized scheduling (AROPS) to realize the integration of the optimization algorithm and module scheduling. AROPS relies on a customized Bayesian optimizer to solve multi-reactor/analyzer reaction optimization problems with three different scheduling modes to arrange tasks for various experimental modules. In addition, a mechanism based on probability of improvement (PI) for discarding unpromising ongoing experiments was developed to facilitate freeing up valuable experimental resources in parallelized optimization. We tested the performance of AROPS using a hardware emulator on three representative benchmark reactions encountered in organic synthesis, illustrating that AROPS can trade off optimization time and cost according to the chemists' preference.

Faster-Than-Real-Time Hardware Emulation of Extensive Contingencies for Dynamic Security Analysis of Large-Scale Integrated AC/DC Grid

The rapid expansion of modern power systems has brought a tremendous computational challenge to dynamic security analysis (DSA) tools which consequently need to process extensive contingencies. In this work, hardware emulation is investigated to accelerate the DSA solution of a large-scale AC/DC system deployed on the field-programmable gate arrays (FPGAs) faster-than-real-time (FTRT) execution. Electromagnetic transient (EMT) modeling of the DC grid is conducted since the fast converter dynamics require a small time-step for accuracy; in contrast, the transient stability (TS) simulation is applicable to the AC grid which tolerates a much larger step size. To coordinate the 2 different types of simulation, an interface based on dynamic voltage injection is proposed to integrate the AC and DC grids, in addition to maintaining a low hardware latency. An emulation platform consisting of multiple FPGA boards is established so that with a proper allocation it has a sufficient capacity to accommodate the system under study which has 6 ACTIVSg 500-bus systems interconnected by a 6-terminal DC grid. The efficacy of the proposed FTRT hardware emulation platform is demonstrated by 2 case studies with more than 5500 contingencies analyzed in total, where an FTRT ratio of more than 208 is achieved for the hybrid AC/DC grid, while it is over 277 times for a single 500-bus system. Furthermore, the FTRT dynamic emulation results, including the security indices, are validated by the simulation tool DSATools/TSAT.

Laboratory Implementation of a Wide-area Damping Controller using a Dynamic Hardware Emulator

The ongoing decarbonisation of the electric power system brings new challenges in terms of system dynamics and stability, as the substitution of generation units with rotating masses towards generation units based on power electronics entails a substantial loss of inertia. To meet the new challenges and maintain the reliability of the electrical grid, innovative solutions are required. Therefore, this paper presents a two-step approach to test and validate controller structures for damping inter-area oscillations. First, the controller was developed and tested in a control hardware in the loop environment. Then, the controller was transferred to a dynamic hardware emulator (scaled version of the Kundur's two area transmission network in the laboratory consisting of physical hardware) for final performance validation. It is shown that with a conventional power system stabilizer (PSS) and a proportional wide-area damping controller (WADC), the damping of inter-area oscillations is improved in an emulated power system. In addition, with the setup created, different types of controllers and other challenges related to wide-area damping control can be investigated in the future.

Faster-Than-Real-Time Hardware Emulation of Transients and Dynamics of a Grid of Microgrids

Enhanced environmental standards are leading to an increasing proportion of microgrids (MGs) being integrated with renewable energy resources in modern power systems, which brings new challenges to simulate such a complex system. In this work, comprehensive modeling of a grid of microgrids for faster-than-real-time (FTRT) emulation is proposed, which can be utilized in the energy control center for contingencies analysis and dynamic security assessment. Electromagnetic transient (EMT) modeling is applied to the microgrid in order to reflect the detailed device processes of the converter and renewable energy sources, while the AC grid utilizes the transient stability modeling to reduce the computational burden and obtain a high acceleration value over real-time execution. Consequently, a dynamic power injection interface is proposed for the coexistence of the two simulation types. The reconfigurability and parallelism of the field-programmable gate arrays (FPGAs) enable the whole system to be executed in FTRT mode with 51 times acceleration over real-time. Meanwhile, three case studies are emulated and the results are validated by the off-line simulation tool Matlab/Simulink®.

Machine Learning Based Framework for Fast Resource Estimation of RTL Designs Targeting FPGAs

Field-programmable gate arrays (FPGAs) have grown to be an important platform for integrated circuit design and hardware emulation. However, with the dramatic increase in design scale, it has become a key challenge to partition very large scale integration into multi-FPGA systems. Fast estimation of FPGA on-chip resource usage for individual sub-circuit blocks early in the circuit design flow will provide an essential basis for reasonable circuit partition. It will also help FPGA designers to tune the circuits in hardware description language. In this article, we propose a framework for fast estimation of the on-chip resources consumed by register transfer level (RTL) designs with machine learning methods. We extensively collect RTL designs as a dataset, extract features from the result of a parser tool and analyze their roles, and train a targeted three-stage ensemble learning model. A 5,513× speedup is achieved while having 27% relative absolute error. Although the effect is sufficient to support RTL circuit partition, we discuss how the estimation quality continues to be improved.

Device‐System End‐to‐End Design of Photonic Neuromorphic Processor Using Reinforcement Learning

AbstractThe incorporation of high‐performance optoelectronic devices into photonic neuromorphic processors can substantially accelerate computationally intensive matrix multiplication operations in machine learning (ML) algorithms. However, the conventional designs of individual devices and system are largely disconnected, and the system optimization is limited to the manual exploration of a small design space. Here, a device‐system end‐to‐end design methodology is reported to optimize a free‐space optical general matrix multiplication (GEMM) hardware accelerator by engineering a spatially reconfigurable array made from chalcogenide phase change materials. With a highly parallelized integrated hardware emulator with experimental information, the design of unit device to directly optimize GEMM calculation accuracy is achieved by exploring a large parameter space through reinforcement learning algorithms, including deep Q‐learning neural network, Bayesian optimization, and their cascaded approach. The algorithm‐generated physical quantities show a clear correlation between system performance metrics and device specifications. Furthermore, physics‐aware training approaches are employed to deploy optimized hardware to the tasks of image classification, materials discovery, and a closed‐loop design of optical ML accelerators. The demonstrated framework offers insights into the end‐to‐end and co‐design of optoelectronic devices and systems with reduced human supervision and domain knowledge barriers.

Modelling of Proton Exchange Membrane Fuel Cells with Sinusoidal Approach.

This paper validates a sinusoidal approach for the proton-exchange membrane fuel cell (PEMFC) model as a supplement to experimental studies. An FC simulation or hardware emulation is necessary for prototype design, testing, and fault diagnosis to reduce the overall cost. For this objective, a sinusoidal model that is capable of accurately estimating the voltage behavior from the operating current value of the DC was developed. The model was tested using experimental data from the Ballard Nexa 1.2 kW fuel cell (FC). This methodology offers a promising approach for static and current-voltage, characteristic of the three regions of operation. A study was carried out to evaluate the effectiveness and superiority of the proposed FC Sinusoidal model compared with the Diffusive Global model and the Evolution Strategy.

Faster-Than-Real-Time Hardware Emulation of Transients and Dynamics of a Grid of Microgrids

Faster-Than-Real-Time Hardware Emulation of Transients and Dynamics of a Grid of Microgrids