Graphene For Electronic Applications Research Articles

Graphene-Based Devices: Exploring Advantages, Challenges, and Multidisciplinary Applications

This study investigates the properties and possible uses of graphene, a two-dimensional material, in a variety of areas, such as electronics, optoelectronics, energy storage, and biomedicine. The study aims to explore the advantages of using graphene-based devices, identify potential applications in different fields, and assess the feasibility of incorporating graphene into these applications. The paper overviews the current state-of-the-art in developing graphene-based devices and describes their unique properties. Subsequently, the study delves into the potential applications of graphene in electronics, optoelectronics, energy storage, and biomedicine, each represented by a dedicated sub-section. The applications explored include graphene transistors, sensors, interconnects, photodetectors, solar cells, light-emitting devices, supercapacitors, batteries, biosensors, drug delivery systems, and tissue engineering. The paper concludes by summarizing the primary findings and offering a perspective on future research directions. The study highlights the potential of graphene-based devices in various domains and serves as a foundation for further investigation and development. The paper contributes to the growing body of knowledge on graphene and its applications, providing insights into the possibilities and challenges of incorporating graphene into different fields.

Interfacial chemical vapor deposition of wrinkle-free bilayer graphene on dielectric substrates

Wrinkles invariably form during graphene growth and post-growth transfer, limiting graphene films' large-scale uniformity for electronic applications. We report a transfer-free synthesis route for highly-uniform bilayer graphene directly on dielectric substrates—SiO2, sapphire, and MgO—by interfacial carbon precipitation. Ultrathin Pd leaves having a thickness of 150 nm and grain size up to 100 µm are laminated onto the target dielectric substrate, followed by annealing and press rolling to form a uniform Pd-substrate interface. Rapid heating in a hydrocarbon atmosphere causes carbon diffusion through the Pd layer; upon cooling, precipitation of carbon results in graphene growth at the Pd-substrate interface. The interface-grown graphene remains on the substrate after removing the Pd layer by wet etching. It exhibits sub-nm surface roughness without wrinkles or folds. Over 94 % of the interface-grown area is dominated by bilayer graphene with low twist angles. In addition, the interface-grown graphene is nearly strain-free. From Raman characterization, an average long-range scattering mobility of ∼1000 cm2 V−1 s−1 was estimated for as-grown bilayer graphene on sapphire (0001) at room temperature. This technique shows promise to achieve device scale, ultra-uniform graphene fabrication directly on dielectric substrates, with the potential to accelerate graphene applications in electronics, photonics, and sensing.

CVD Synthesis of Graphene Nanomesh on Ge(001)

Bottom-up synthesis of functional graphene nanostructures on industry-compatible semiconductors such as Si and Ge is the key to unlocking the tremendous potential of graphene in electronic applications. Herein, we demonstrate the growth of graphene nanomesh on Ge using chemical vapor deposition – a technique used widely in the semiconductor industry. Graphene nanomesh is a promsing material in semiconductor electronics because of its ability to simultaneously achieve a large drive current and on/off ratio – one of the key challenges in graphene nanoribbon electronics[1]. However, in order to realize a nanomesh with desired and tunable electrical characteristics – an accurate control over the nanoribbon width, presence of atomically smooth edges, and nanoribbon placement is desired. In the literature, several techniques have been demonstrated to fabricate graphene nanomesh such as top-down lithography[2], bottom-up polymerization[3], and molecule-assisted CVD[4]; yet, a combination of accurate placement, tunable widths and atomically smooth edges has been challenging to achieve. We attempt to overcome this bottleneck by initiating CVD nanoribbon synthesis from deterministically placed arrays of graphene nanoseeds on Ge. We are able to tune the nanoribbon widths by changing the starting seed size and array pitch. The nanoribbons evolved from these nanoseeds fuse into each other when grown long enough – forming a nanomesh. These nanomeshes have atomically smooth edges and exhibit semiconducting characteristics. We also perform extensive simulations to identify the seed-sizes and pitches and demonstrate that this technique allows us to synthesize nanomeshes of desired architecture and electrical characteristics and thus can be used as channel materials in high performance / RF applications as well as BEOL interconnects. References Saraswat et al. ACS Nano, 15,3674-3708 (2021)Bai et al. Nature Nanotechnology, 5, 190–194 (2010)Moreno et al. Science, 360, 199-203 (2018)Kim et al. ACS Applied Materials & Interfaces, 13, 28593-28599 (2021)

Plasma‐Enhanced Atomic Layer Deposition of Al2O3 on Graphene Using Monolayer hBN as Interfacial Layer

AbstractThe deposition of dielectric materials on graphene is one of the bottlenecks for unlocking the potential of graphene in electronic applications. The plasma enhanced atomic layer deposition of 10 nm thin high quality aluminum oxide (Al2O3) on graphene is demonstrated using a monolayer of hexagonal boron nitride (hBN) as protection layer. Raman spectroscopy is performed to analyze possible structural changes of the graphene lattice caused by the plasma deposition. The results show that a monolayer of hBN in combination with an optimized deposition process can effectively protect graphene from damage, while significant damage is observed without an hBN layer. Electrical characterization of double gated graphene field effect devices confirms that the graphene does not degrade during the plasma deposition of Al2O3. The leakage current densities are consistently below 1 pA µm−2 for electric fields across the insulators of up to 8 MV cm−1, with irreversible breakdown happening above. Such breakdown electric fields are typical for Al2O3 and can be seen as an indicator for high quality dielectric films.

Ion implantation assisted synthesis of graphene on various dielectric substrates

Direct synthesis of high-quality graphene on dielectric substrates is of great importance for the application of graphene-based electronics and optoelectronics. However, high-quality and uniform graphene film growth on dielectric substrates has proven challenging due to limited catalytic ability of dielectric substrates. Here, by employing a Cu ion implantation assisted method, high-quality and uniform graphene can be directly formed on various dielectric substrates including SiO2/Si, quartz glass, and sapphire substrates. The growth rate of graphene on the dielectric substrates was significantly improved due to the catalysis of Cu. Moreover, during the graphene growth process, the Cu atoms gradually evaporated away without involving any metal contamination. Furthermore, an interesting growth behavior of graphene on sapphire substrate was observed, and the results show the graphene domains growth tends to grow along the sapphire flat terraces. The ion implantation assisted approach could open up a new pathway for the direct synthesis of graphene and promote the potential application of graphene in electronics.

Graphene Field‐Effect Transistors on Hexagonal‐Boron Nitride for Enhanced Interfacial Thermal Dissipation

AbstractOwing to its atomic thickness, thermal dissipation is one significant bottleneck for the practical application of graphene in electronics. Here, it is demonstrated that a high‐quality ultraclean van der Waals interface can be obtained after modifying the SiO2/Si substrate with hexagonal‐boron nitride (h‐BN) by plasma‐enhanced chemical vapor deposition, which improves the mobility and the interfacial thermal dissipation of graphene field‐effect transistors (FETs). On h‐BN, interfacial thermal resistance decreases by more than 77% and the saturated power density of graphene FETs increases by 2–3‐folds to 3.45 × 105 W cm−2, higher than the power density of current CPUs (≈100 W cm−2), demonstrating its potential in future graphene‐based electronics.

The Potential of Graphene in Electronic Applications

2D materials have emerged as new material used in electronic devices. Graphene has attract great attention due to its high charge carrier mobility and thin thickness. Different production methods have been used to produce graphene used in different electronic applications. This work highlights the validity of graphene electronic applications and drawbacks that needed to be overcome in the future. Chemical vapour deposition (CVD) grew graphene show great potential in replacing ITO in touch screen with low sheet resistance, flexibility and high transparency. Screen printed touchpad flexible keyboard can be fabricated directly from graphene inks. Graphene based touch-pad show a good conductive and flexibility while providing stable electrical performance under bending and change of humidity. Mechanical exfoliated graphene exhibits high charge carrier mobility by encapsulated with hexagonal boron nitride (h-BN).

Effect of cobalt particle deposition on quantum corrections to Drude conductivity in twisted CVD graphene

Graphene applications in electronics require experimental study of the formation of high-quality Ohmic contacts and deeper understanding of electron transport mechanisms at metal/grapheme contacts. We have studied carrier transport in twisted CVD graphene decorated with electrodeposited Co particles forming Ohmic contacts with graphene layers. We have compared layer resistivity as a function of temperature and magnetic field R�(T, B) for as-synthesized and decorated twisted graphene on silicon oxide substrates. Experiments have proven the existence of negative (induction < 1 Tl) and positive (induction > 1 Tl) contributions to magnetoresistance in both specimen types. The R�(T, B) functions have been analyzed based on the theory of 2D quantum interference corrections to Drude conductivity taking into account competition of hopping conductivity mechanism. We show that for the experimental temperature range (2–300 K) and magnetic field range (up to 8 Tl), carrier transport description in test graphene requires taking into account at least three interference contributions to conductivity, i.e., from weak localization, intervalley scattering and pseudospin chirality, as well as graphene buckling induced by thermal fluctuations.

Laser-Assisted Lattice Recovery of Graphene by Carbon Nanodot Incorporation.

Producing highly oriented graphene is a major challenge that constrains graphene from fulfilling its full potential in technological applications. The exciting properties of graphene are impeded in practical bulk materials due to lattice imperfections that hinder charge mobility. A simple method to improve the structural integrity of graphene by utilizing laser irradiation on a composite of carbon nanodots (CNDs) and 3D graphene is presented. The CNDs attach themselves to defect sites in the graphene sheets and, upon laser-assisted reduction, patch defects in the carbon lattice. Spectroscopic experiments reveal graphitic structural recovery of up to 43% and electrical conductivity four times larger than the original graphene. The composites are tested as electrodes in electrochemical capacitors and demonstrate extremely fast RC time constant as low as 0.57 ms. Due to their low defect concentrations, the reduced graphene oxide-carbon nanodot (rGO-CND) composites frequency response is sufficiently fast to operate as AC line filters, potentially replacing today's electrolytic capacitors. Using this methodology, demonstrated is a novel line filter with one of the fastest capacitive responses ever reported, and an aerial capacitance of 68.8 mF cm-2 . This result emphasizes the decisive role of structural integrity for optimizing graphene in electronic applications.

Ultrafast Growth of Uniform Multi-Layer Graphene Films Directly on Silicon Dioxide Substrates.

To realize the applications of graphene in electronics, a large-scale, high-quality, and uniform graphene film should first be placed on the dielectric substrates. Challenges still remain with respect to the current methods for the synthesis graphene directly on the dielectric substrates via chemical vapor deposition, such as a low growth rate and poor quality. Herein, we present an ultrafast method for direct growth of uniform graphene on a silicon dioxide (SiO2/Si) substrate using methanol as the only carbon source. A 1 × 1 cm2 SiO2/Si substrate square was almost fully covered with graphene within 5 min, resulting in a record growth rate of ~33.6 µm/s. This outcome is attributed to the quick pyrolysis of methanol, with the help of trace copper atoms. The as-grown graphene exhibited a highly uniform thickness, with a sheet resistance of 0.9–1.2 kΩ/sq and a hole mobility of up to 115.4 cm2/V·s in air at room temperature. It would be quite suitable for transparent conductive electrodes in electrophoretic displays and may be interesting for related industrial applications.

Intrinsic stacking domains in graphene on silicon carbide: A pathway for intercalation

Graphene on silicon carbide (SiC) bears great potential for future graphene electronic applications because it is available on the wafer-scale and its properties can be custom-tailored by inserting various atoms into the graphene/SiC interface. It remains unclear, however, how atoms can cross the impermeable graphene layer during this widely used intercalation process. Here we demonstrate that, in contrast to the current consensus, graphene layers on SiC are not homogeneous, but instead composed of domains of different crystallographic stacking. We show that these domains are intrinsically formed during growth and that dislocations between domains dominate the (de)intercalation dynamics. Tailoring these dislocation networks, e.g. through substrate engineering, will increase the control over the intercalation process and could open a playground for topological and correlated electron phenomena in two-dimensional superstructures.

Anisotropic elastic modulus, high Poisson's ratio and negative thermal expansion of graphynes and graphdiynes

Graphyne (GY) and graphdiyne (GDY) are two-dimensional one-atom-thick carbon allotropes highly considered to substitute graphene in electronic applications because of the prediction of non-null band-gap. There are multiple configurations of GY structures not yet fully investigated in literature. In this work, by means of classical molecular dynamics simulations, the Young's modulus, Poisson's ratio and linear thermal expansion coefficient (TEC) of all originally proposed seven types of GYs and corresponding GDYs are calculated. The dependence of these properties with the density of the structure is investigated for the first time. Quadratic increasing of the TEC of GY and GDY structures with density was found. The elastic modulus of GYs and GDYs were shown to be more sensitive to their density than general porous materials. In particular, non-symmetric structures are much softer along the armchair direction than along zigzag direction, implying that the elasticity along armchair direction of GY and GDY structures are similar to that of porous gels materials. Values larger than unity were found for the Poisson's ratio of some non-symmetric GYs and GDYs. A simple honeycomb mechanical model is shown to capture the observed values of Poisson's ratio of GYs and GDYs.

Controllable Fabrication of Nanostructured Graphene Towards Electronics

Due to graphene's exceptional electronic properties, strong efforts are being made to push forward its nanoelectronic applications. However, the gapless band structure of truly 2D graphene makes it unsuitable for direct use in graphene‐based field‐effect transistors (FETs), which is one of the most widely discussed graphene applications in electronics. Therefore, in order to accomplish graphene's applications in semiconducting nanoelectronics, it is necessary to produce nanostructured graphene with sufficiently narrow characteristic width, thus introducing further confinement and opening a reasonably large band gap. In this article, the theoretical predictions of nanostructured graphene's various properties are briefly introduced, and then the recent progress in preparation methods are reviewed to make an objective appraisal in terms of narrow enough width and crystallographically determined edges based on the theoretical and experimental investigations of physical properties. Newly emerging nanostructured graphene arrays are also introduced, which are essential for the integration of devices. In addition, electronic devices based on graphene nanostructures or heterostructures, such as FETs and sensors, are also reviewed, including device construction and performance. This article is aimed at summarizing the most practical and efficient method oriented at a specific target and promoting the fundamental research and industrial applications of nanostructured graphene.

Bio-inspired materials and graphene for electronic applications

Graphene, a very recent rising star, with an atomically thin, 2D honeycomb lattice that consists of sp2-hybridized carbons, exhibits remarkable electronic, thermal, optical, and mechanical properties. Many attempts have been made to demonstrate the applications of graphene and graphene-based materials in several fields, nevertheless the combination of bio-inspired materials with graphene and their related properties have attracted attention only recently. In particular, the electrical and optical properties of graphene with bio-inspired materials could lead to novel graphene-based devices with remarkable performance. This feature article will briefly introduce the recent progress in this direction. The first part of the article will report on some bio-inspired modifications useful to modulate the electrical performance of graphene composites as well as interesting examples with silk, nanocellulose and proteins. In the second part, the recent progress in bio-inspired modification and applications of graphene in photodetection, organic solar cells and photothermal therapy is discussed. From this perspective this field of research is still at an early stage but it might become a hot topic in the near future.

Transfer-Free Synthesis of Doped and Patterned Graphene Films

High-quality and wafer-scale graphene on insulating gate dielectrics is a prerequisite for graphene electronic applications. For such applications, graphene is typically synthesized and then transferred to a desirable substrate for subsequent device processing. Direct production of graphene on substrates without transfer is highly desirable for simplified device processing. However, graphene synthesis directly on substrates suitable for device applications, though highly demanded, remains unattainable and challenging. Here, we report a simple, transfer-free method capable of synthesizing graphene directly on dielectric substrates at temperatures as low as 600 °C using polycyclic aromatic hydrocarbons as the carbon source. Significantly, N-doping and patterning of graphene can be readily and concurrently achieved by this growth method. Remarkably, the graphene films directly grown on glass attained a small sheet resistance of 550 Ω/sq and a high transmittance of 91.2%. Organic light-emitting diodes (OLEDs) fabricated on N-doped graphene on glass achieved a current density of 4.0 mA/cm(2) at 8 V compared to 2.6 mA/cm(2) for OLEDs similarly fabricated on indium tin oxide (ITO)-coated glass, demonstrating that the graphene thus prepared may have potential to serve as a transparent electrode to replace ITO.

Electronic properties of transition-metal-decorated silicene.

The electronic properties of 3d transition metal (TM)-decorated silicene were investigated by using density functional calculations in an attempt to replace graphene in electronic applications, owing to its better compatibility with Si-based technology. Among the ten types of TM-doped silicene (TM-silicene) studied, Ti-, Ni-, and Zn-doped silicene became semiconductors, whereas Co and Cu doping changed the substrate to a half-metallic material. Interestingly, in cases of Ti- and Cu-doped silicene, the measured band gaps turned out to be significantly larger than the previously reported band gap in silicene. The observed band-gap openings at the Fermi level were induced by breaking the sublattice symmetry caused by two structural changes, that is, the Jahn-Teller distortion and protrusion of the TM atom. The present calculation of the band gap in TM-silicene suggests useful guidance for future experiments to fabricate various silicene-based applications such as a field-effect transistor, single-spin electron source, and nonvolatile magnetic random-access memory.

Gap openings in graphene regarding interfacial interaction from substrates

Based on the size-dependent cohesive energy formula for two-dimensional materials, we investigate the gap openings in graphene layers regarding distinct interfacial interaction from substrates. Depending on the interfacial physicochemical nature, the gap is opened weakly induced by the van der Waals interaction but readily by the chemical bonding. Relative to the former, in essence, the distinct opening behavior for the latter comes from the substantial change in atomic cohesive energy of graphene associated with the coordination imperfection. Our predictions agree with the available experimental or computer simulation results for graphene layers on layered BN or bulk truncated SiC. The present work is of benefit for the application of graphene in electronics.

Critical Crystal Growth of Graphene on Dielectric Substrates at Low Temperature for Electronic Devices

Critical Crystal Growth of Graphene on Dielectric Substrates at Low Temperature for Electronic Devices

Greatly Improved Methane Dehydrogenation via Ni Adsorbed Cu(100) Surface

Synthesizing large-area high-quality graphene at low temperature is crucial for graphene applications in electronics and spintronics. In this work, we demonstrate that adsorption of a single active metal atom into inactive matrix would remarkably improve the catalytic reactivity. Our first-principles calculations show that the reaction barrier of methane dehydrogenation is remarkably reduced from 1.76 eV on flat Cu (100) surface to 1.00 eV on a Ni atom adsorbed Cu (100) surface. Moreover, the adsorbed Ni atom is found to serve as the active reaction center, which might provide a possibility of manipulating the graphene nucleation position for controllable chemical vapor deposition growth. Additionally, different dehydrogenation behaviors are detected and well understood in terms of electronic structures involved in the reactions. This study shows the potential of synthesizing high-quality graphene at relatively low temperatures with the assistance of Ni adsorption on Cu foils, and it can be extended to other metal and substrates.

Micro- and nanoscale electrical characterization of large-area graphene transferred to functional substrates

Chemical vapour deposition (CVD) on catalytic metals is one of main approaches for high-quality graphene growth over large areas. However, a subsequent transfer step to an insulating substrate is required in order to use the graphene for electronic applications. This step can severely affect both the structural integrity and the electronic properties of the graphene membrane. In this paper, we investigated the morphological and electrical properties of CVD graphene transferred onto SiO2 and on a polymeric substrate (poly(ethylene-2,6-naphthalene dicarboxylate), briefly PEN), suitable for microelectronics and flexible electronics applications, respectively. The electrical properties (sheet resistance, mobility, carrier density) of the transferred graphene as well as the specific contact resistance of metal contacts onto graphene were investigated by using properly designed test patterns. While a sheet resistance Rsh ≈ 1.7 kΩ/sq and a specific contact resistance ρc ≈ 15 kΩ·μm have been measured for graphene transferred onto SiO2, about 2.3× higher Rsh and about 8× higher ρc values were obtained for graphene on PEN. High-resolution current mapping by torsion resonant conductive atomic force microscopy (TRCAFM) provided an insight into the nanoscale mechanisms responsible for the very high ρc in the case of graphene on PEN, showing a ca. 10× smaller “effective” area for current injection than in the case of graphene on SiO2.