Gettering Of Metal Impurities Research Articles

External Gettering of Metallic Impurities by Black Silicon Layer

Black silicon (b‐Si) has many attractive properties and is currently being adopted in various fields of semiconductor technology. It is shown here that b‐Si during thermal activation may serve as an external gettering layer to remove metallic impurities and associated defects from bulk Si. The gettering efficiency by b‐Si is estimated according to the results of studying the resistivity, defect density, interstitial iron concentration, and effective minority carrier lifetime on gettered test and ungettered reference Si samples. It is shown that in the thermal oxidation process, the b‐Si layer serves as an effective drain for excess iron atoms and other fast‐diffusing impurities, thereby significantly reducing the density of oxidation‐induced stacking faults in Si. In addition, the resistivity of the substrates decreases, and the bulk carrier lifetime increases significantly. Finally, gettering by b‐Si is introduced into the solar cells fabrication process and its effect on solar cell current–voltage characteristics is investigated. It has been shown that all electronic parameters of the solar cells are improved. The conversion efficiency of ungettered solar cells is 16.8%, and for gettered solar cells, depending on the oxidation temperature, it increases by 1.36–1.96%.

Silicon Wafer Gettering Design for Advanced CMOS Image Sensors Using Hydrocarbon Molecular Ion Implantation: A Review

We have developed silicon epitaxial wafers with high gettering capability using hydrocarbon molecular ion implantation for advanced Complementary Metal-Oxide-Semiconductor (CMOS) image sensors. These wafers have three unique silicon wafer characteristics for improvement of CMOS device electrical parameter such as high metallic impurity gettering, oxygen out-diffusion barrier effects from Czochralski silicon (CZ) substrate and hydrogen passivation effect for interface state defect at Si/SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> . We demonstrate that double epitaxial growth silicon wafers have an extremely high gettering capability during CMOS device fabrication process. We also found that gettering capability strongly dependence on oxygen impurity amount in hydrocarbon molecular ion implantation projection range. We believe that this novel silicon wafer can drastically contribute to the improvement of CMOS image sensor device performance such as white spot defect and dark current.

(Invited) Helium in Silicon: From the Atom to the Bubble

Helium is one of the most inert elements in nature and its solubility in most materials is very low. When introduced by implantation, the energetic helium atoms induce the displacement of a large number of atoms from their lattice position creating excess defects (self-interstitials and vacancies) that may agglomerate to form larger clusters and/or may interact with the implanted atoms as well. In particular, the interaction of vacancies with helium leads to the formation of bubbles that may modify the mechanical and physical properties of materials. This leads to a very active research field in the nuclear domain, where bubbles are responsible for the embrittlement of materials. In covalent materials, helium bubbles can be formed following high fluence implantation as well and the idea to transform bubbles from a liability into an asset has emerged twenty years ago. The most known application is probably the formation of helium and hydrogen disc-like bubbles, the platelets, used to produce silicon-on-insulator wafers. But other potential applications have been demonstrated as well such as proximity gettering of metallic impurities for instance. For all these applications, the control of the bubble formation and evolution is essential. This requires an in-depth understanding of the underlying physical mechanisms.In this work, a multiscale picture of the formation mechanisms of helium bubbles in silicon and their evolution under annealing is derived from the combination of numerical simulations and Electron Energy Loss Spectroscopy (EELS) in the Transmission Electron Microscope (TEM).Using molecular dynamics (MD) and rate equation dynamics calculations, we have identified the atomic scale mechanisms involved in the nucleation and early growth steps of the bubbles and followed their dynamics during experimental timescale. For the smallest length scale, the optimal helium filling in small vacancy clusters was determined (Fig. 1a) [1]. Regarding bubble growth, MD simulations (Fig. 1b) suggest that both Ostwald ripening and migration-coalescence mechanisms are jointly activated during bubble growth. We also discover that an original mechanism, based on the splitting of bubbles, could have a significant contribution. Overall, helium atoms are found to delay growth, proportionally to their concentration. This can be clearly observed at the nanosecond timescale. However, for longer timescales, cluster dynamics calculations also reveal periods of accelerated growth for specific helium concentrations [2].At larger length scales, the physical properties of the bubbles (helium density, pressure, morphology and size) were investigated experimentally using an original approach based on spatially resolved EELS that we have developed [3]. These experiments allow for an accurate determination of size, aspect ratio and helium density for a large number of single bubbles. These bubbles, 6 to 20 nm in diameter, were synthesized by high fluence helium implantation in silicon, followed by annealing. Very high helium densities, from 60 to 180 He/nm3, were measured in the bubbles depending on the conditions, in stark contrast with previous investigations of helium bubbles in metal with similar sizes. These results were confirmed by atomistic calculations performed for helium bubbles in the diameter range 1 to 13 nm [4].The structural modifications and, simultaneously, the helium emission from individual bubbles were investigated by spectrum imaging during in situ annealing in the transmission electron microscope (Fig. 1c). We show that helium emission surprisingly takes place at temperatures where bubble migration had hardly started. At higher temperatures, the migration (and coalescence) of voids is clearly revealed. For helium density lower than 150 He.nm-3, the Cerofolini's model taking into account the thermodynamical properties of an ultradense fluid reproduces well the helium emission from the bubbles, leading to an activation energy of 1.8 eV. When bubbles exhibit a higher initial helium density, the Cerofolini's model fails to reproduce the helium emission kinetics. We ascribe this to the fact that helium may be in the solid phase and we propose a model to take into account the properties of the solid [5].[1] L. Pizzagalli, M.-L. David, J. Dérès, Phys. Stat. Solidi A, 1700263 (2017)[2] L. Pizzagalli, J. Dérès, M.-L. David, T. Jourdan, J. Phys. D : Appl. Phys. 52, P. 455106 (2019)[3] K. Alix, M.-L. David, G. Lucas, D.T.L. Alexander, F. Pailloux, C. Hébert, L. Pizzagalli, Micron 77, p.57 (2015)[4] J. Dérès, M.-L. David, K. Alix, D.T.L. Alexander, C. Hébert, L. Pizzagalli, Phys. Rev. B 96, p. 014110 (2017)[5] K. Alix, M.-L. David, J. Dérès, C. Hébert, L. Pizzagalli, Phys. Rev. B 97, p. 104012 (2018) Figure 1

Influence of Tabula Rasa on Process- and Light-Induced Degradation of Solar Cells Fabricated From Czochralski Silicon

Monocrystalline Si solar cells are fabricated from Czochralski (Cz) Si, which contains 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">17</sup> -10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">18</sup> cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-3</sup> oxygen atoms. Cz Si undergoes degradation during high-temperature thermal processing steps, such as dopant diffusion to form the p-n junction. This degradation in the bulk minority carrier lifetime can be related to the formation of oxygen precipitates. We found that a high-temperature annealing process known as tabula rasa (TR) not only mitigates process-induced degradation via oxygen precipitate nuclei dissolution, but also modifies subsequent light-induced degradation. We report on the bulk carrier lifetime of n- and p-type Cz Si after TR, which homogenizes the interstitial oxygen in the bulk Si to its monoatomic form in either an N2 or O2 environment. A control sample, which was not subjected to a TR processing step, experienced severe process-induced degradation during a boron emitter thermal budget as oxygen precipitates were formed in the Si bulk. These precipitates could be imaged using photoluminescence. Additionally, samples that underwent a TR processing step prior to the boron emitter thermal budget show efficient gettering of metallic impurities compared to the control sample, which showed a decline in the implied open-circuit voltage after the gettering step. Furthermore, modification of the interstitial oxygen bonding by TR had a strong effect on the light-induced degradation kinetics. Instead of a typically observed monotonic decrease, minority carrier lifetime increases first, followed by a nonmonotonic decrease over a ~20 h period. We conclude that by modifying the interstitial oxygen bonding via TR pretreatment, p-type Cz Si wafers become substantially resistant to harsh solar cell processes and strongly modified light-induced degradation, which would open alternative ways to mitigate this degradation mechanism.

(Invited) Proximity Gettering Design of Hydrocarbon Molecular Ion Implanted Silicon Wafers Using Direct Bonding Technique for Advanced CMOS Image Sensors: A Review

We developed high gettering capability silicon wafers for advanced CMOS image sensors using hydrocarbon molecular ion implantation and surface activated direct wafer bonding (SAB). We found that this novel wafer has three unique characteristics for the improvement of CMOS image sensor device performance. The first is metallic impurity gettering capability in the hydrocarbon ion implantation projection range during CMOS device fabrication. The second is the oxygen out-diffusion barrier effect; this wafer can control out-diffusion to the device active region from the CZ grown silicon substrate during CMOS device heat treatment. The third is the hydrogen passivation effect; hydrogen passivates to the Si/SiO2 gate oxide interface state defects which out-diffuse to the device active region from the hydrocarbon ion implantation projection range during the CMOS device fabrication. Moreover, we demonstrated that this novel wafer can improve the pn-junction leakage current under the actual device fabrication.

Invited; Oxygen Precipitation and Defect Generation in Cz Silicon during Second and Millisecond Annealing

Oxygen precipitation in Czochralski silicon is still an issue in various device technologies. On the one hand it is exploited for internal gettering of metallic impurities by oxygen precipitates and on the other hand it is undesired because oxygen precipitates are known to degrade the lifetime of minority carriers. At the end, it depends on the application of the silicon material how precipitation of interstitial oxygen is controlled.The reduced thermal budgets due to continuous scaling of features sizes in high end device technologies lead to the development of faster and faster anneal processes. The earlier device technologies were dominated by conventional annealing processes. Today rapid thermal processes working on the second scale are common steps in microelectronic processing. Recent developments utilize already thermal processes on the millisecond scale as e. g. flash and laser anneals. All these different time scales influence the generation of intrinsic point defects and thus also the kinetics of oxygen precipitation in a different way.Rapid thermal annealing (RTA) is a widely used thermal pretreatment to create an internally gettering bulk defect zone and a defect denuded zone below the surface. This is possible because the precipitation of interstitial oxygen strongly depends on the supersaturation of intrinsic point defects. During RTA vacancies supersaturate facilitating the formation of VmOn complexes which are the initial stages of oxygen precipitation. However, the strength of the effect depends on the temperature and cooling rate of the RTA pre-treatment.Flash lamp annealing is used first of all for the creation of shallow dopant profiles in high end electronic device technologies. The surface of a silicon wafer can be heated with this technique to temperatures up to the melting point within a few milliseconds. With the help of a thermal model we can simulate the temperature profiles. We combined this model with a second model describing the generation and annihilation of intrinsic point defects. The results of modeling help to understand the experimental results of oxygen precipitation. After 3 ms of annealing a defect denuded zone below the front surface is generated while after 20 ms annealing oxygen precipitation is suppressed in the wafer.Flash lamp annealing leads to steep temperature profiles in the wafers causing stress. Silicon wafers with etched, ground, and sawed surfaces were subjected to flash lamp annealing for 20 ms. Such wafers contain different densities of pre-existing dislocations which propagate into the wafer during flash lamp annealing up to a certain depth which is different on the front and back sides. Plastic deformation was not observed if no pre-existing dislocations were present in the wafer before flash lamp annealing. The elastic and plastic deformation was simulated by a mechanical model.In summary, the difference between thermal processing on the second and on the millisecond scales is based on the temperature profiles generated by the different types of processing. These profiles influence the shrinking of grown-in oxide precipitate nuclei and the generation, diffusion, and annihilation of intrinsic point defects and thus the oxygen precipitation during further processing.

Gettering of metal impurities by using phosphorus diffusion in UMG silicon wafers

Upgraded metallurgical grade (UMG) silicon is a cost-effective and energy-efficient silicon material for the production of solar cells. UMG silicon wafers with 5N purity include various kinds of metal impurities like Fe, Ni, Cu, and Co, which may limit the electrical performance of UMG silicon wafers and solar cells. Phosphorus diffusion gettering, which can effectively reduce the transition-metal impurities in the bulk of UMG silicon wafers and enhance the minority carrier lifetime (MCLT), is a well-known process to improve the performance of solar cells in the photovoltaic (PV) industry. In this study, phosphorus diffusion gettering was used at a constant temperature of 700 for 5 hours, and the effects of the gettering process were confirmed by measuring the MCLTs and the efficiencies of the solar cells. Depth profiles of the Fe concentration before and after the gettering process were compared using secondary ion mass spectroscopy (SIMS) measurements.

Simultaneous gettering and emitter formation in multicrystalline-Si wafers by annealing phosphorus doped amorphous silicon compounds

We demonstrate gettering of metal impurities in p-type multicrystalline silicon (mc-Si) wafers by annealing wafers that are surface passivated by double layers of amorphous silicon-based compounds acting as gettering sites. As inner layer we use a phosphorus-doped amorphous silicon-carbon-nitrogen alloy, providing surface passivation and acting as dopant source for the emitter formation during subsequent anneal. The outer layer is silicon nitride with antireflective properties. Anneals are done at 750, 800, and 850 °C for 30 and 60 min. The gettering effect is as good as for a conventional POCl3 diffusion followed by extended gettering at low temperature, and it is weakly influenced by the temperature step chosen. In the range explored, the sheet resistances of the emitters and the junction depths lay between 3000 to 60 Ω/sq. and 100–300 nm, respectively.

Gettering in Large-Grained Thin Polycrystalline Silicon Films on Glass Substrate

Large-grained polycrystalline silicon (poly-Si) films on a glass substrate are good candidate materials for fabricating poly-Si thin-film transistors (TFTs) and poly-Si solar cells. The gettering of metal impurities in thin poly-Si films is one of the key techniques for realizing high-performance, high-reliability, and high-efficiency TFTs and solar cells. In this study, the gettering of large-grained thin poly-Si films with a thickness of 100 nm containing Ni impurities was studied. A large-grained Ni-doped thin poly-Si film was fabricated on a glass substrate by Ni-induced solid phase crystallization (SPC) followed by cw green laser recrystallization. The grain size of the poly-Si film was 1 ×10 µm2. The behavior of Ni impurities in the large-grained thin poly-Si film was evaluated by scanning transmission electron microscopy (STEM), STEM energy-dispersive X-ray spectroscopy (STEM–EDX), and electron diffraction (ED) analysis. It was observed that Ni was stabilized through the formation of nickel-disilicide (NiSi2) at the triple junction during low-temperature device fabrication.

Comparison of Efficiency and Kinetics of Phosphorus-Diffusion and Aluminum Gettering of Metal Impurities in Silicon: a Simulation study

The efficiency of solar cells produced from crystalline silicon materials is considerably affected by the presence of metal impurities. In order to reduce the concentration of metal impurities, gettering processes as phosphorus diffusion gettering (PDG) and aluminum gettering (AlG) are routinely included in solar cell processing. Further development and optimization of gettering schemes has to ground on physics-based simulations of gettering processes. In this contribution we use quantitative simulations to compare the efficiency and kinetics of PDG and AlG in the presence of precipitates for interstitially dissolved metals, like iron, at different gettering conditions. Recently measured segregation coefficients of iron in liquid AlSi with respect to crystalline silicon are used in order to compare with PDG under typical conditions. It is shown that kinetics of both, PDG and AlG, can be separated into two regimes: (i) at low temperatures kinetics are limited by precipitate dissolution, and (ii) at high temperatures kinetics of AlG is mainly limited by metal impurity diffusion while phosphorus in-diffusion is the limiting factor of PDG.

Thick Bonded Silicon-On-Insulator Wafer with Polysilicon Interlayer for Gettering of Metal Impurities

A new technique for extrinsic gettering of transition-metal impurities in thick bonded SOI (BSOI) wafers is presented. Technique is based on adding a thin polycrystalline silicon layer between the active layer and buried oxide by means of direct wafer bonding. Gettering efficiencies of over 98 % of iron in active layer were demonstrated even after a high temperature heat treatment. Testing of wafers in CMOS processes showed a clear improvement of the gate oxide integrity, even approaching that of conventional bulk silicon wafers. Poly-Si interlayer showed no measurable effects on critical BSOI characteristics such as interfacial voids, bond strength, active layer thickness uniformity or sacrificial oxide etching. The residual stress was also very low. The results suggest that the thin poly-Si layer has minimal effect on fabrication of the MEMS elements.

Thick Bonded Silicon-On-Insulator Wafer with Polysilicon Interlayer for Gettering of Metal Impurities

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Trapping of Pd, Au, and Cu by implantation-induced nanocavities and dislocations in Si

The gettering of metallic impurities by nanocavities formed in Si is a topic of both scientific importance and technological significance. Metallic precipitates observed in the regions where nanocavities were formed have been considered the result of the metal filling the nanocavities, either as elemental metal or a silicide phase. However, our transmission electron microscopy observations demonstrate that many of these precipitates are concentrated along dislocations, rather than randomly distributed as expected for precipitates formed by the filling of nanocavities. Consequently, the gettering contribution of dislocations in the lattice caused by nanocavity formation must be considered. For Pd, dislocations are the preferred sites for the precipitation of the metal silicide. We compare results of gettering by nanocavities and dislocations for Pd, Au, and Cu to determine which structure is the dominant influence for the formation of precipitates of these metals and/or their silicides.

Tuning Oxygen Concentration at Low and High Temperature IG Process and Boron Concentration in Epitaxial Wafer for the Gettering of Metal Impurities

Tuning Oxygen Concentration at Low and High Temperature IG Process and Boron Concentration in Epitaxial Wafer for the Gettering of Metal Impurities

Formation of nanoscale voids and related metallic impurity gettering in high-energy ion-implanted and annealed epitaxial silicon

We have examined nanovoid formation, Fe gettering, and Fe clustering phenomena occurring in epitaxial silicon layers implanted with MeV Si ions. Insights into these phenomena as a function of depth have been gained from detailed analyses by Z-contrast imaging in conjunction with electron energy-loss spectroscopy. Our work has shown at the nanoscale structural and chemical levels that the defects produced by MeV self-ion implantation between the surface and the ion projected range Rp (i.e., in the so-called Rp/2 region) are voids, which provide extremely efficient and aggressive metallic impurity gettering. It has been proposed that the gettering does not occur via chemisorption or silicidation layering on the internal surface of the void walls, as in the well-known case of helium-induced cavities, but rather proceeds in a mode of metal–metal atom binding in the vicinity of the Rp/2 voids.

Recent Progresses in Understanding Gettering in Silicon

AbstractFor IC fabrications using CZ Si, intrinsic gettering utilizing oxygen precipitation has been extensively studied in the past, with the main efforts concentrated on the engineering and scientific aspects of the creation of gettering sites. The present review, however, will focus on recent progresses on the modeling of processes and mechanisms of the gettering of metallic impurities from the device active regions to the created gettering regions, together with the electrical activity of impurity precipitates.

Gettering of metal impurities to cavities formed by hydrogen and helium implantation in silicon

Implantation conditions necessary to form a sub-surface depth layer containing cavities by H+ and He+ implantation into Si were determined and discussed. Ion energy and fluence in the two cases were chosen to meet the criteria necessary to form a gettering layer located deeper than the active regions in submicro devices. The results obtained allowed us to determine that under specified conditions for H+ and He+ implantation into Si, a rather thick (Δz∼0.3–0.4μm) layer can be formed which contains the impurity gettering sites. The gettering behaviour for several transition metals, such as Au, Cu, Co and Fe was discussed.

Intrinsic gettering of 300 mm CZ wafers

Even for the most advanced IC manufacturing technology now being transferred to 300 mm the gettering of metallic impurities is of vital importance. To achieve a gettering performance of Si wafers different approaches can be pursued: highly boron doped p+ substrates, internal gettering IG and gettering by backside treatment. This contribution will focus on internal gettering that can be realised by a sufficient density of oxygen precipitates (also known as BMDs, Bulk Micro Defects) which is mainly determined by the crystal growing conditions. The crystal growing represents the largest cost driver in the Si manufacturing. Since the transition to 300 mm is purely cost driven the required BMD performance has to consider not only the feasible supplier capability, but also the cost impact.

Plasma immersion ion implantation for silicon processing

Plasma Immersion Ion Implantation (PIII) is a technology which is currently widely investigated as an alternative to conventional beam line implantation for ultrashallow doping beyond the 0.15 μm technology. However, there are several other application areas in modern semiconductor processing. In this paper a detailed discussion of the PIII process for semiconductors and of actual as well as future applications is given. Besides the well known advantages of PIII — fast process, implantation of the whole surface, low cost of ownership — several peculiarities — like spread of the implantation energy due to finite rise time or collisions, no mass separation, high secondary electron emission — must be mentioned. However, they can be overcome by adjusting the system and the process parameters. Considering the applications, ultrashallow junction formation by PIII is an established industrial process, whereas SIMOX and Smart-Cut by oxygen and hydrogen implantation are current topics between research and introduction into industry. Further applications of PIII, of which some already are research topics and some are only investigated by conventional ion implantation, include seeding for metal deposition, gettering of metal impurities, etch stop layers and helium implantation for localized lifetime control.

Plasma immersion ion implantation for silicon processing

AbstractPlasma Immersion Ion Implantation (PIII) is a technology which is currently widely investigated as an alternative to conventional beam line implantation for ultrashallow doping beyond the 0.15 μm technology. However, there are several other application areas in modern semiconductor processing. In this paper a detailed discussion of the PIII process for semiconductors and of actual as well as future applications is given. Besides the well known advantages of PIII — fast process, implantation of the whole surface, low cost of ownership — several peculiarities — like spread of the implantation energy due to finite rise time or collisions, no mass separation, high secondary electron emission — must be mentioned. However, they can be overcome by adjusting the system and the process parameters. Considering the applications, ultrashallow junction formation by PIII is an established industrial process, whereas SIMOX and Smart‐Cut by oxygen and hydrogen implantation are current topics between research and introduction into industry. Further applications of PIII, of which some already are research topics and some are only investigated by conventional ion implantation, include seeding for metal deposition, gettering of metal impurities, etch stop layers and helium implantation for localized lifetime control.