The dissipation of heat in stacked chips has garnered significant interest in numerous scientific investigations and electronic implementations in recent decades. As a result of increased power and reduced size, stacked chips with substantial heat generation necessitate improved cooling capabilities within limited volume, thereby minimizing the utilization of liquid and forced air cooling methods. Additionally, there is currently a heightened emphasis on passive heat dissipation performance to achieve carbon neutrality, representing a novel requirement for environmentally-friendly chip thermal management in the realm of green energy. To enhance the passive cooling of stacked chips with higher heat but smaller volume, and reduce the energy consumption of liquid cooling and forced air cooling, the proportion of green heat dissipation needs to be increased. However, this increases the difficulty of thermal management. While passive cooling can reduce energy consumption, it often requires a larger cooling structure to dissipate the same amount of heat, which fails to meet the miniaturization requirements of stacked chip cooling systems. To address this issue, heat dissipation structures in the form of fractal micro-protrusions are adopted to enhance the passive cooling of the chips. Utilizing principles from fractal geometry, this study incorporates two classical fractal graphics, namely the “Sierpinski” triangle and the “Box” rectangle, as heat dissipation structures. These fractal micro-protrusions are fabricated on the chip. Furthermore, the enhancement of heat dissipation is evaluated through structural modifications to the chip's micro-protrusions, taking into account alterations in the fractal categories of said micro-protrusions. The investigation primarily focuses on four parameters related to structural fractal categories, namely fractal iteration, fractal geometric forms, fractal integration, and fractal thickness, in order to determine and compare the maximum temperatures achieved under the same heating condition and heat dissipation environment. Applying fractal micro-protrusions to the chips results in improved cooling performance. In the absence of liquid cooling and forced air cooling, the maximum temperature of the chip without fractal micro-protrusions is 149.08 °C when subjected to a heat flux of 200 W/cm2. However, this temperature reduces to 135.32 °C when square fractal micro-protrusions with S1 iterations are adopted, 125.67 °C when square fractal micro-protrusions with S3 iterations are adopted, 108.4 °C when triangle fractal micro-protrusions with T3 iterations are adopted, and 80.018 °C when Tri-integration fractal micro-protrusions are adopted. These findings suggest that the application of fractal micro-protrusions has a significant impact on temperature reduction. It is promising to be applied to the actual stacked chips industry.
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