Machine Code Generation Research Articles

A time- and cost-optimal algorithm for interlocking sets-with applications

Given a family I of intervals, two intervals in I interlock if they overlap but neither of them strictly contains the other. A set of intervals in which every two are related in the reflexive transitive closure of the interlock relation is referred to as an interlocking set. The task is determining the maximal interlocking sets of I arises in numerous applications, including traffic control, robot arm manipulation, segmentation of range images, routing, automated surveillance systems, recognizing polygonal configurations, and code generation for parallel machines. Our first contribution is to show that any sequential algorithm that computes the maximal interlocking sets of a family of n intervals must take /spl Omega/(n log n) time in the algebraic tree model. Next, we show that any parallel algorithm for this problem must take /spl Omega/(log n) time in the CREW model even if an infinite number of processors and memory cells are available. We then go on to show that both the sequential and the parallel lower bounds are tight by providing matching algorithms running, respectively, in /spl Theta/(n log n) sequential time and in /spl Theta/(log n) time using n processors in the CREW model. At the same time, if the endpoints of the intervals are specified in sorted order, our sequential algorithm runs in O(n) time, improving the best previously known result. It is interesting to note that even if the endpoints are sorted, /spl Omega/(log n) is a time lower bound for solving the problem in the CREW model, regardless of the amount of resources available. As an application of our algorithm for interlocking sets, we obtain a time- and cost-optimal solution to a restricted version of the single row routing problem. The best previously known result for routing a set of n nets without street crossovers runs in O(log n loglog n) time using n processors in the CRCW model. By contrast, our algorithm runs in /spl Theta/(log n) time using n/log n processors in the CREW model, being both time- and cost-optimal.

Total unfolding: theory and applications

AbstractUnfolding is a common technique in program transformations. Here, we present a computation model where unfolding is a simple generalisation of the usual concept of evaluation. The model is a variant of the well-known full substitution evaluation rule for recursive programs. The evaluation mechanism involved is symbolic substitution of function definitions followed by simplification. Simplification is expressed as a confluent rewrite strategy which uses three kinds of reductions: β-reduction, non-erasing reduction, and erasing reduction. Non-erasing reductions include simplification of constant subexpressions. Erasing reductions formalize the behaviour of nonstrict operations. In this computation model, we prove a termination theorem of symbolic unfolding relative to more instantiated calls. A possible application of the model is a technique called total unfolding, where a partially instantiated function call is unfolded until no more calls exist. Under certain conditions the result will be a first order term: such terms correspond to basic blocks in imperative programs and can be efficiently implemented by scheduling techniques. Possible applications are hardware synthesis, and code generation for parallel machines.

An object-oriented environment for specification and concurrent execution of genetic algorithms

Genetic algorithms (GA) mimic natural reproduction to search for complex problem solutions. Their principles are shortly explained. A point of interest is the regular and repetititve structure of computation involving communication, data exchanges, and control phases. Interaction with presentation and analysis tools is also a requirement. This make sense for the definition of a general framework allowing fast building of parallel applications in an object-oriented system. A GA workbench is developed using the Smalltalk-80 system with parallel machine code generation in mind.

Using static single assignment form in a code optimizer

Static single assignment form represents data dependences elegantly and provides a basis for powerful optimizations. Table-driven techniques for peephole optimization and code generation are straightforward and effective. it is natural to want to use both together in a code optimizer. However, doing so reveals that static single assignment form does not remove all antidependences, and that it conflicts with table-driven code generation for 2-address machines. This paper describes these problems and how to solve them.

Making a compiler easily portable

The authors describe a technique for porting a modern language that makes it possible to port the language quickly and still get fast execution. They relate the practical experience they gained when porting the compiler to different environments. They concentrate on transportation problems of compilers that generate machine code rather than those that generate interpreter code. The authors' approach is based on the definition of a universal operating-system interface that must be implemented on the target machine to install the compiler. They ported the Modula-2/68K compiler, which was developed at their institute and has successfully been installed at external sites. Of the two porting procedures they offered-source-code cross development and object-code transportation-the external sites preferred the latter because it requires less effort.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Generation of Fast Target Processor Code from High Level Controller Descriptions

Abstract This paper addresses the translation of a multivariable controller description into code for fast target processors, particularly digital signal processors. The feasability and viability of automatic generation of optimal machine code from multivariable controller data (system matrices) have already been demonstrated in the past. Increasing control task complexity, as well as the necessity of getting as much target processor independence as possible, now leads to the definition of DSPL, a digital systems programming language. Translation into machine code for (signal) processors is performed by DSPL-compilers written specifically for those processors, exploiting the various special signal processing features found there. Code optimization can be directed to space or time for individual blocks of the control task, and the best code construct will be automatically selected according to global objectives.

A portable pseudo-code for Pascal-like languages

As an alternative to compilers generating machine code or assembly language, a more portable alternative is to generate a pseudo machine language that can then be transported to various machines and converted to their native code. Herein I shall present a simple mnemonic Pseudo-Code language, and present a few examples of Pascal to Pseudo-Code.

Application of a remote code generator

Previous work has shown that quality software can be produced by deferring the machine code generation portion of a compiler until a program has been tested and known to be production worthy. In this approach an interpreter is used to facilitate testing and the creation of fault tolerant programs. A machine code generator, then applied to tested programs, preserves fault tolerance and provides efficiency.The application of this unique approach to fault tolerant programming, which places the machine code generator remote from the lexical and semantic portions of the compiler, will be examined in this paper. Covered will be 1) the generation of code which preserves fault tolerance: 2) the code optimization techniques employed to produce the necessary efficiency; and 3) the results of implementing this approach into a production environment.

Code Generation and Storage Allocation for Machines with Span-Dependent Instructions

Many machine languages have two instruction formats, one of which allows addressing of “nearby” operands with “short” (e.g. one word) instructions, while “faraway” operands require “long” format (e.g. two words). Because the distance between an instruction and its operand depends upon the formats of the intervening instructions, the formats of different instructions may be interdependent. An efficient technique is discussed which optimally assigns formats to instructions in a given program and is practical in space as well as time. The more sophisticated problem of arranging operands within programs is discussed. Unfortunately, it is unlikely that an efficient algorithm can guarantee even a good approximation for this problem, since it is shown that r -approximation is NP-complete. Finally, implications of these problems for hardware and software design are considered.

Generating code for a hypothetical computer using a production assembler

AbstractProduction assemblers are often thought of as being useful only for generating machine code from a symbolic assembly language delivered with the system. Most production assemblers that have a macro capability can be used to create an assembler for an arbitrary target machine through the use of the technique discussed in this short communication. This approach has the advantages of quick construction, easy modification and a resulting assembler for the target machine that is nearly as powerful as the original production assembler.

Generation of machine code in ALGOL compilers

The paper describes the method used in the GIER ALGOL compiler for generating machine code from an error free Reverse Polish representation of the source code. The basic method is a pseudo evaluation of the expressions in the text. This imitates the run time processes but works with descriptions of how and where the operands are stored instead of with their values. The flow of control of the process is governed by the operators via a table which for each operator holds one or more pseudo instructions. These are obeyed interpretatively by the central logic of the process.

Compilation for two computers with NELIAC

NELIAC, a compiler based on ALGOL, was developed at the U. S. Navy Electronics Laboratory, San Diego, California, as a “bootstrap” compiler for the Remington Rand Univac COUNTESS computer. This compiler was used to generate a version of itself which, running as a COUNTESS program, generated machine code for the Control Data Corporation CDC-1604 computer. This second compiler was then used to generate a version of NELIAC for the CDC-1604. All three versions of NELIAC accepted essentially identical input language.

Least squares fitting of a great circle through points on a sphere

version of itself which, running as a COUNTESS program, generated machine code for the Control Data Corporation CDC-1604 computer. This second compiler was then used to generate a version of NELIAC for the CDC-1604. All three versions of NELIAC accepted essentially identical input language.