General-purpose Hardware Research Articles

Flexible Hardware Acceleration for Instruction-Grain Program Monitoring

Instruction-grain program monitoring tools, which check and analyze executing programs at the granularity of individual instructions, are invaluable for quickly detecting bugs and security attacks and then limiting their damage (via containment and/or recovery). Unfortunately, their fine-grain nature implies very high monitoring overheads for software-only tools, which are typically based on dynamic binary instrumentation. Previous hardware proposals either focus on mechanisms that target specific bugs or address only the cost of binary instrumentation. In this paper, we propose a flexible hardware solution for accelerating a wide range of instruction-grain monitoring tools. By examining a number of diverse tools (for memory checking, security tracking, and data race detection), we identify three significant common sources of overheads and then propose three novel hardware techniques for addressing these overheads: Inheritance Tracking, Idempotent Filters, and Metadata-TLBs. Together, these constitute a general-purpose hardware acceleration framework. Experimental results show our framework reduces overheads by 2-3X over the previous state-of-the-art, while supporting the needed flexibility.

Hyperfast parallel‐beam and cone‐beam backprojection using the cell general purpose hardware

Tomographic image reconstruction, such as the reconstruction of computed tomography projection values, of tomosynthesis data, positron emission tomography or SPECT events, and of magnetic resonance imaging data is computationally very demanding. One of the most time-consuming steps is the backprojection. Recently, a novel general purpose architecture optimized for distributed computing became available: the cell broadband engine (CBE). To maximize image reconstruction speed we modified our parallel-beam backprojection algorithm [two dimensional (2D)] and our perspective backprojection algorithm [three dimensional (3D), cone beam for flat-panel detectors] and optimized the code for the CBE. The algorithms are pixel or voxel driven, run with floating point accuracy and use linear (LI) or nearest neighbor (NN) interpolation between detector elements. For the parallel-beam case, 512 projections per half rotation, 1024 detector channels, and an image of size 512(2) was used. The cone-beam backprojection performance was assessed by backprojecting a full circle scan of 512 projections of size 1024(2) into a volume of size 512(3) voxels. The field of view was chosen to completely lie within the field of measurement and the pixel or voxel size was set to correspond to the detector element size projected to the center of rotation divided by square root of 2. Both the PC and the CBE were clocked at 3 GHz. For the parallel backprojection of 512 projections into a 512(2) image, a throughput of 11 fps (LI) and 15 fps (NN) was measured on the PC, whereas the CBE achieved 126 fps (LI) and 165 fps (NN), respectively. The cone-beam backprojection of 512 projections into the 512(3) volume took 3.2 min on the PC and is as fast as 13.6 s on the cell. Thereby, the cell greatly outperforms today's top-notch backprojections based on graphical processing units. Using both CBEs of our dual cell-based blade (Mercury Computer Systems) allows to 2D backproject 330 images/s and one can complete the 3D cone-beam backprojection in 6.8 s.

General-purpose processors for active vibro-acoustic control: Discussion and experiences

This paper gives an appropriate perspective about why, how, and when low-cost general-purpose computers can be used, with performance similar to dedicated processors, for the implementation of advanced multi-input–multi-output feedback/feedforward active noise and vibration controllers. High performance and real-time capabilities requirements of active vibro-acoustic control systems are critically discussed with respect to the architectural features of general-purpose processors and the actual closed-loop bandwidth of interest. Discussion on proprietary and free real-time operating systems running on general-purpose hardware is included and a free open-source solution is described. An aeronautical application is presented to support paper position and demonstrate feasibility of the approach hereafter proposed.

2A1-D14 超高性能ヒューマノイド・ロボット用プラットフォームWR-Xの開発

A humanoid robot doesn't have general-purpose hardware that becomes a de facto standard that corresponds to IBM PC/AT in the personal computer. In the personal computer, the software environment has evolved in dramatic form by the appearance of general-purpose hardware that becomes a standard. WR-X is hardware for a super high performance, general-purpose robot that can adjust to all of kinds of robots including a humanoid robot. WR-X is divided in each module. Therefore, it is possible to adjust to the robot in various forms by combining each module. Moreover, WR-X is open to the public of all information on the Internet.

Multimodal astronaut virtual training prototype

A few dedicated training simulator applications exist that mix realistic interaction devices—like real cockpits in flight simulators—with virtual environment (VE) components. Dedicated virtual reality (VR) systems have been utilized also in astronaut training. However there are no detailed descriptions of projection wall VR systems and related interaction techniques for astronaut assembly training in zero gravity conditions. Back projection technology tends to have certain advantages over head mounted displays including less simulation sickness and less restricted user movement. A prototype was built to evaluate the usefulness of projection technology VEs and interaction techniques for astronaut training. This was achieved by first constructing a PC cluster-based general purpose VE software and hardware platform. This platform was used to implement a testing prototype for astronaut assembly sequence training. An interaction tool battery was designed for the purposes of viewpoint control and object handling. A selected training task was implemented as a case study for further analysis based on laptop usage in the Fluid Science Laboratory (FSL) inside the Columbus module in the International Space Station (ISS). User tests were conducted on the usability of the prototype for the intended training purpose. The results seem to indicate that projection technology-based VE systems and suitably selected interaction techniques can be successfully utilized in zero gravity training operations.

A hand gesture recognition system based on local linear embedding

Even after more than two decades of input devices development, many people still find the interaction with computers an uncomfortable experience. Efforts should be made to adapt computers to our natural means of communication: speech and body language. The aim of this paper is to propose a real-time vision system within visual interaction environments through hand gesture recognition, using general-purpose hardware and low-cost sensors, like a simple computer and an USB web camera, so any user could make use of it in his office or at home. The basis of our method is a fast detection process to obtain the meaningful hand region from the whole image, which is able to deal with a large number of hand gestures against different indoor backgrounds and lighting condition, and a recognition process that identifies the hand gestures from the images of the normalized hand. The most important part of the recognition method is a feature extraction process using local linear embedding. This paper includes experimental evaluations of the recognition process of 30 hand gestures that belong to Chinese sign language (CSL) alphabet and discusses the results. Experiments show that the new approach can achieve a 90% average rate and is suitable for real-time application.

Depth-Based Selective Antialiasing

Antialiasing is still a challenge in real-time computer graphics. In this paper, we present a real-time selective antialiasing solution that builds upon our experience. We investigated existing approaches to real-time antialiasing and finally found a new simpler solution. Our new idea is to use the Z-buffer directly for extracting visible-edge information. The solution presented here can be summarized as follows: 1) select object edges by applying a Laplacian spatial convolution to the Z-buffer; 2) filter out aliasing artifacts by applying low-pass spatial convolution filtering to the selected pixels. In this approach, the same circuit architecture can be used for the selection and antialiasing of selected pixels. The major advantage of using spatial convolution in the context of antialiasing is that general purpose hardware real-time convolution filters are well known and available. The method presented here can be used to improve image quality in graphics accelerators but also applications such as real-...

Navigational tools for desktop virtual environment interfaces

Desktop systems typically rely on a two-dimensional (2D) software interface and general purpose hardware (mouse, keyboard) for interaction with a three-dimensional (3D) virtual environment. These interfaces must provide all the functionality required to navigate through and interact with the virtual environment, yet research into the usability aspects of the tools presented on these software interfaces indicates that the majority of users experience some degree of frustration when using them to perform even relatively simple tasks. This paper begins with a study of usability issues for interfaces to virtual environments on desktop systems, and details a series of experiments performed to evaluate the usability of a number of navigational tools. Participants were tested on the time taken to complete a number of navigational tasks with a series of interfaces presenting different navigational tools. The tools presented were a speed control function, a you-are-here (YAH) map, a function enabling the user to mark and teleport to any location within the presented environment, and an undo function. Results indicate that the visual presentation of navigational aids improves navigation performance, in terms of the time taken to complete tasks, and also improves user satisfaction with the desktop system.

Terra

We present a flexible architecture for trusted computing, called Terra, that allows applications with a wide range of security requirements to run simultaneously on commodity hardware. Applications on Terra enjoy the semantics of running on a separate, dedicated, tamper-resistant hardware platform, while retaining the ability to run side-by-side with normal applications on a general-purpose computing platform. Terra achieves this synthesis by use of a trusted virtual machine monitor (TVMM) that partitions a tamper-resistant hardware platform into multiple, isolated virtual machines (VM), providing the appearance of multiple boxes on a single, general-purpose platform. To each VM, the TVMM provides the semantics of either an "open box," i.e. a general-purpose hardware platform like today's PCs and workstations, or a "closed box," an opaque special-purpose platform that protects the privacy and integrity of its contents like today's game consoles and cellular phones. The software stack in each VM can be tailored from the hardware interface up to meet the security requirements of its application(s). The hardware and TVMM can act as a trusted party to allow closed-box VMs to cryptographically identify the software they run, i.e. what is in the box, to remote parties. We explore the strengths and limitations of this architecture by describing our prototype implementation and several applications that we developed for it.

Motion control of a compliant micro manipulator

The paper focuses on motion control of a planar MEMS manipulator with three kinematic Degrees-Of-Freedom. The manipulator measures approximately 1.6 mm across and the size of its work envelope is approximately 20 μm across. It is suspended 2 μm above the substrate. The device is powered by three sets of thermal motors. The kinematic mobility of the mechanism is provided by more than 75 flexures connecting its rigid components. The objective of the study is to control the motion of the manipulator using commercially available general purpose laboratory software and hardware using only visual feedback. The application of a rigid-link kinematic model of the compliant manipulator structure proved to be practical. The general purpose imaging software was the slowest component of the feedback resulting in about 1s intervals between the control steps. The measured path tracing errors of 0.3 μm were close to the imagine apparatus resolution of 0.3μm / pixel.

Implementation of Fuzzy Systems using Micro Processors/Controllers

This paper presents an algorithm for implementation of fuzzy systems using inexpensive general-purpose hardware. The two major difficulties encountered in implementing fuzzy systems using 8/16 bit micro processors/controllers are: (i) handling floating point arithmetic and (ii) determination of membership values. Existing membership functions (mfs) do not satisfy, simultaneously, ease in optimization and low-end hardware implementation. Mfs, recently proposed by us [1], as negative powers of 2 satisfy these two contradicting requirements. The complete algorithm for hardware implementation of the best offline design solution is described. The worst-case execution time is computed as a function of the number of inputs (m) and the number of rules (c). The performance, applicability and limitations of the proposed algorithm are illustrated using a benchmark example. Optimized fuzzy model is coded and implemented using Intel 8XC196KC 16 bit fixed point microcontroller, and the results obtained are included.

Architecture of a deterministic quantum central processing unit

We present an architecture of QCPU (quantum central processing unit) which is based on the discrete quantum gate set. QCPU can be programmed to approximate any n-qubit computation in a deterministic fashion. It can be built efficiently to implement computations with any required accuracy. QCPU makes it possible to implement universal quantum computation with a fixed, general purpose hardware.

Hyper-acceleration and HW/SW co-verification as an essential part of IBM eServer z900 verification

Hardware/software (HW/SW) co-verification can considerably shorten the time required for system integration and bring-up. But co-verification is limited by the simulation speed achievable whenever hardware models are required to verify hardware and software interactions. Although the use of a general-purpose hardware accelerator as an extremely fast simulator resolves performance aspects, it generates a new set of handling, efficiency, and serviceability demands. This paper describes a means for addressing those demands through the use of one of the largest hyper-acceleration systems created thus far, and describes many new associated features that have been implemented in operating software.

Using Linux and Ada in the Development of Distributed Computer Control Systems

Many dist-ibuted computer control systems are non-critical in the sense that they have only soft time constraints and no stringent safety requirements. This is the case with certain teleoperated robot control systems, which can be effectively built on top of general purpose hardware and software execution platforms, instead of having to use costly and difficult-to-program real-time computers and operating systems. An approach for developing such kind of applications, based on the use ofLinux and Ada on PC architectures, is presented in this paper. Distribution is based on the Distributed System Annex of Ada on top of a TCP/lP LAN. A number of guidelines on how to use them in a proper way are described with reference to an example teleoperation architecture.

General purpose, field-portable cell-based biosensor platform

There are several groups of researchers developing cell-based biosensors for chemical and biological warfare agents based on electrophysiologic monitoring of cells. In order to transition such sensors from the laboratory to the field, a general-purpose hardware and software platform is required. This paper describes the design, implementation, and field-testing of such a system, consisting of cell-transport and data acquisition instruments. The cell-transport module is a self-contained, battery-powered instrument that allows various types of cell-based modules to be maintained at a preset temperature and ambient CO 2 level while in transit or in the field. The data acquisition module provides 32 channels of action potential amplification, filtering, and real-time data streaming to a laptop computer. At present, detailed analysis of the data acquired is carried out off-line, but sufficient computing power is available in the data acquisition module to enable the most useful algorithms to eventually be run real-time in the field. Both modules have sufficient internal power to permit realistic field-testing, such as the example presented in this paper.

Fast Parallel Algorithms for a Broad Class of Nonlinear Variational Diffusion Approaches

Variational segmentation and nonlinear diffusion approaches have been very active research areas in the fields of image processing and computer vision during recent years. In the present paper, we review recent advances in the development of efficient numerical algorithms for these approaches. The performance of parallel implementations of these algorithms on general-purpose hardware is assessed. A mathematically clear connection between variational models and nonlinear diffusion filters is presented that allows to interpret one approach as an approximation of the other, and vice versa. Extending this continuous connection to the fully discrete setting enables us to derive many structural similarities between efficient numerical algorithms for both frameworks. These results provide a perspective for uniform implementations of nonlinear variational models and diffusion filters on parallel architectures.

Video-Based Driver Assistance—From Basic Functions to Applications

Image sequences recorded with cameras mounted in a moving vehicle provide information about the vehicle's environment which has to be analysed in order to really support the driver in actual traffic situations. One type of information is the lane structure surrounding a vehicle. Therefore, we systematically developed and investigated driver assistance functions which make explicit use of the lane structure represented by lane borders and lane markings. With increasing computing power of standard PCs it was possible to realize more complex driver assistance with general purpose hardware. Investigations with a video-based lane departure warning system and a lane change assistant for highways will be discussed in detail. We integrated our lane keeping assistant in some experimental cars and performed systematic experiments in real traffic situations which enables the experience of video-based driver assistance on a high level—the action of a system. This allows us to assess whether a driver assistance system really understands the actual traffic situation which is the basis for reliable systems accepted by the user.

Application-specific programmable control for high-performance asynchronous circuits

The advantages of the programmable control paradigm are widely known in the design of synchronous sequential circuits: easy correction of late design errors, easy upgrade of product families to meet time-to-market constraints, and modifications of the control algorithm, even at run time. However, despite the growing interest in asynchronous (self-timed) circuits, programmable asynchronous controllers based on the idea of microprogramming have not been actively pursued. In this paper, we propose an asynchronous microprogrammed control organization (called a microengine) that targets application-specific implementations and emphasizes simplicity, modularity, and high performance. The architecture takes advantage of the natural ability of self-timed circuits to chain actions efficiently without the clock-based scheduling constraints that would be involved in comparable synchronous designs. The result is a general approach to the design of application-specific microengines featuring a programmable data-path topology that offers very compact microcode and high performance-in fact, performance close to that offered by automated hardwired controllers. In performance comparisons of a CD-player error decoder design, the proposed microengine architecture was 26 times faster than the general purpose hardware of a 280 MIPS microprocessor, over three times as fast as the special purpose hardware of a low-power macromodule based implementation, and even slightly faster than a finite state machine-based implementation.

Generating relay models for protection studies

While research and development work in the area of microprocessor-based relays continues with fervent interest, relay modeling plays a significant role in performance evaluation of new and existing designs and for performing a variety of studies. At the University of Saskatchewan, researchers are implementing a variety of new relay designs using general-purpose hardware. The functions of a microprocessor-based relay are software controlled, so it is conceivable to change a relay's protection function by simply replacing the installed software. In this context, it is possible to contemplate the development of a generalized modeling technique for generating a software model for any microprocessor-based relay implemented using the general-purpose hardware. A modeling package has been developed for generating models of relays. These models can be used for performing a variety of protection and system studies, and they also serve as valuable educational tools. The authors describe the package and its implementation.

Constrained software synthesis for embedded applications

Embedded systems are composed of interacting hardware components such as general-purpose processors and application-specific circuits and software components that execute on the general-purpose hardware. The software component consists of application-specific routines that must deliver the required system functionality under constraints on timing and memory storage available. In this paper, we consider two main problems in the synthesis of the software component in embedded system designs: (a) generation of software and (b) conditions to ensure correct behavior of the generated software from an HDL-modeled input. Generation of embedded software requires operation linearization under constraints to ensure timely interaction with concurrent hardware. We describe our procedure to achieve constrained software generation and the utility of our approach by examples. Experimental results show that the proposed algorithm is substantially faster than conventional methods and yields efficient schedules for the embedded software.