Ge Epilayers Research Articles

Studies of nanoindentation and residual stress analysis of Ge/GaAs epilayers

The nanomechanical properties of germanium (Ge) epilayers grown at different temperatures by horizontal home-made metal organic vapor phase epitaxy were studied with nanoindentation using Berkovich and Vickers indenters. The surface morphology of the grown samples was studied by means of atomic force microscopy. High resolution x-ray diffraction (HRXRD) measurements were performed for structural analysis. The present investigation is mainly aimed at the understanding of the relation of hardness with the residual stress. The residual stress values obtained from HRXRD studies are compared with the hardness and elastic modulus values determined from nanoindentation analysis. It was found that the nanomechanical properties are correlated with the observed residual stress. The defects induced mechanism due to the change in load on Ge/GaAs epilayers has been elucidated. This kind of study will lead to improvement of Ge/GaAs films with respect to the deposition conditions understood from the variations in the nanomechanical studies.

Epi-cleaning of Ge/GeSn heterostructures

We demonstrate a very-low temperature cleaning technique based on atomic hydrogen irradiation for highly (1%) tensile strained Ge epilayers grown on metastable, partially strain relaxed GeSn buffer layers. Atomic hydrogen is obtained by catalytic cracking of hydrogen gas on a hot tungsten filament in an ultra-high vacuum chamber. X-ray photoemission spectroscopy, reflection high energy electron spectroscopy, atomic force microscopy, secondary ion mass spectroscopy, and micro-Raman showed that an O- and C-free Ge surface was achieved, while maintaining the same roughness and strain condition of the as-deposited sample and without any Sn segregation, at a process temperature in the 100–300 °C range.

Defects reduction of Ge epitaxial film in a germanium-on-insulator wafer by annealing in oxygen ambient

A method to remove the misfit dislocations and reduce the threading dislocations density (TDD) in the germanium (Ge) epilayer growth on a silicon (Si) substrate is presented. The Ge epitaxial film is grown directly on the Si (001) donor wafer using a “three-step growth” approach in a reduced pressure chemical vapour deposition. The Ge epilayer is then bonded and transferred to another Si (001) handle wafer to form a germanium-on-insulator (GOI) substrate. The misfit dislocations, which are initially hidden along the Ge/Si interface, are now accessible from the top surface. These misfit dislocations are then removed by annealing the GOI substrate. After the annealing, the TDD of the Ge epilayer can be reduced by at least two orders of magnitude to <5 × 106 cm−2.

Selective area growth of Ge film on Si

According to low temperature Ge buffer layer and selective area epitaxy technology, we selectively grow Ge film on patterned Si/SiO2 substrate using ultra-high vacuum chemical vapor deposition. By using X-ray diffraction (XRD), scanning electron microscope, atomic force microscopy and Raman scattering spectrum, we obtain its crystal quality and the laws of stress and other parameters varying with shape size. The results show that threading dislocation density decreases with shape size decreasing. Moreover, the tensile strain of Ge layer first increases and then turns stable with the increase of shape size, which can be attributed to the formation of (113) facet during Ge selective area growth. The formation of (113) facet reduces the strain energy of epitaxial material system, and the reduction of strain energy per unit volume decreases with increasing the shape size. The root-mean-square surface roughness of the Ge epilayer with a thickness of 380 nm is about 0.2 nm, the full-width-at-half maximum of the Ge peak of the XRD profile is about 678". It is indicated that the selective area epitaxial Ge layer is of good quality and will be a promising material for Si-based optoelectronic integration.

Low-defect metamorphic Si (Ge) epilayers on Si (001) with a buried template of nanocavities for multiple-junction solar cells

Si (001)-oriented substrates (p-type) were implanted at 10keV with He+ ion doses in the 5×1015cm−2 range. They were annealed at 973K for 1h to create a buried layer of nano-sized bubbles. Layers of Si0.77Ge0.23 about 215nm thick were grown by low pressure chemical vapor deposition at 848K on these silicon wafers. The surface roughness and morphology were checked by atomic force microscopy and optical microscopy before and after etching with a modified Shimmel recipe to reveal etch pit dislocations. The thickness, composition, crystalline quality and relaxation-state of the SiGe layer were assessed by Rutherford backscattering spectroscopy and high-resolution X-ray diffraction. A fully relaxed strain-state was obtained for Si0.77Ge0.23 layers that did not exhibit the classical cross-hatched pattern morphology while having a threading-dislocations density below 103cm−2. This low dislocation density was confirmed by photoluminescence spectroscopy. From high resolution transmission electron microscopy observations, the quasi-total strain-relief is assumed to take place by emission of dislocation loops protruding down into the Si substrate from the SiGe/Si interface and terminating at void surfaces of the buried-nanoporous layer. Possible annihilation of dislocation segments coming from either the SiGe/Si interface or punched out in glide planes by overpressurized nanobubbles may also occur. This near surface porous Si is well adapted for multiple junction solar cell manufacturing.

Ultrasmooth epitaxial Ge grown on (001) Si utilizing a thin B-doped SiGe buffer layer

With the introduction of an intermediate ultrathin B-doped Si0.70Ge0.30 buffer layer, an epitaxial Ge layer with a surface root-mean-square roughness of 0.43 nm and a threading dislocation density of 3.5 × 106 cm−2 has been directly grown on Si using a reduced-pressure chemical vapor deposition system. The obtained micro-Raman spectra show the uniform distribution of tensile strain in the Ge layer at room temperature. Furthermore, the effect of the ultrathin low-temperature B-doped Si0.70Ge0.30 buffer layer on the quality of the Ge epilayer is investigated. Our research reveals that the increase in the B concentration in the buried Si0.70Ge0.30 buffer layer significantly improves the quality of the Ge epilayer.

In situ doped epitaxial growth of highly dopant-activated n+-Ge layers for reduction of parasitic resistance in Ge-nMISFETs

We selectively grew n+-Ge layers with a carrier concentration as high as 7 × 1019 cm−3 for use as the source and drain regions of Ge-nMISFETs by low-pressure CVD. A high activation rate of 73% for the P-dopant was achieved only within a narrow window of total growth pressure. Ti contacts on the P-doped n+-Ge epilayers exhibited ohmic properties in contrast to those on P-ion-implanted Ge layers of almost the same dopant concentration. Low sheet resistance of 33 Ω/sq and low specific contact resistivity of 1.2 × 10−6 Ω·cm2 were obtained for the 65-nm-thick epi-Ge layers as a result of the high activation rate.

Fabrication and characterization of germanium-on-insulator through epitaxy, bonding, and layer transfer

A scalable method to fabricate germanium on insulator (GOI) substrate through epitaxy, bonding, and layer transfer is reported. The germanium (Ge) epitaxial film is grown directly on a silicon (Si) (001) donor wafer using a “three-step growth” approach in a reduced pressure chemical vapour deposition. The Ge epilayer is then bonded and transferred to another Si (001) wafer to form the GOI substrate. The Ge epilayer on GOI substrate has higher tensile strain (from 0.20% to 0.35%) and rougher surface (2.28 times rougher) compared to the Ge epilayer before transferring (i.e., Ge on Si wafer). This is because the misfit dislocations which are initially hidden along the Ge/Si interface are now flipped over and exposed on the top surface. These misfit dislocations can be removed by either chemical mechanical polishing or annealing. As a result, the Ge epilayer with low threading dislocations density level and surface roughness could be realized.

The study of temperature dependent strain in Ge epilayer with SiGe/Ge buffer layer on Si substrate with different thickness

Temperature dependent near band edge transitions in Ge epilayer on Si substrate with different thickness were studied by using photoreflectance (PR) and piezoreflectance (PzR) measurements. The identification of conduction to light-hole (LH) band and conduction to heavy-hole (HH) band transitions originated from the strain induced valence band splitting results from tensile strain have been achieved by comparing the relative intensities of PR and PzR spectra. The strain induced energy splitting between LH and HH can be reduced with a thinner substrate and can be accounted by the mismatch of thermal expansion coefficients between the Si substrate and Ge epilayer. We also studied temperature dependent energy splitting between LH and HH through theoretical calculations. The comparison of energy splitting between experiments and theoretical calculations were made and discussed.

Greatly improved interfacial passivation of in-situ high κ dielectric deposition on freshly grown molecule beam epitaxy Ge epitaxial layer on Ge(100)

A high-quality high-κ/Ge interface has been achieved by combining molecule beam epitaxy grown Ge epitaxial layer and in-situ deposited high κ dielectric. The employment of Ge epitaxial layer has sucessfully buried and/or removed the residue of unfavorable carbon and native oxides on the chemically cleaned and ultra-high vacuum annealed Ge(100) wafer surface, as studied using angle-resolved x-ray photoelectron spectroscopy. Moreover, the scanning tunneling microscopy analyses showed the significant improvements in Ge surface roughness from 3.5 Å to 1 Å with the epi-layer growth. Thus, chemically cleaner, atomically more ordered, and morphologically smoother Ge surfaces were obtained for the subsquent deposition of high κ dielectrics, comparing with those substrates without Ge epi-layer. The capacitance-voltage (C-V) characteristics and low extracted interfacial trap density (Dit) reveal the improved high-κ/Ge interface using the Ge epi-layer approach.

Ultralow temperature ramping rate of LT to HT for the growth of high quality Ge epilayer on Si (1 0 0) by RPCVD

An approach to grow high quality strain-relaxed Ge on silicon (100) substrate has been proposed using a modified two-step growth method by reduced pressure chemical vapor deposition system. The modified Ge growth method consists of the low temperature growth at 400°C, intermediate temperature growth from 400 to 600°C with low ramping rate and high temperature growth at 600°C. The post-growth anneal in hydrogen at 800°C was introduced immediately after the Ge growth. For the Ge epitaxial film grown with low temperature ramping rate of 6°C/min, the root mean square roughness is 0.621nm in 10×10μm2 scan field, and the threading dislocation density (TDD) is 3×106cm−2 with the film thickness of about 1.3μm. Furthermore, in contrast to the epitaxial Ge sample grown with the high temperature ramping rate of 140°C/min, intermediate low temperature ramping rate from 400 to 600°C is advantageous in terms of TDD reduction, as well as maintaining smooth surface morphology in Ge epilayer.

Strain evolution during the growth of epitaxial Ge layers between narrow oxide trenches

We have grown the high quality and compressively strained Ge epilayers on a Si substrate with 40-nm width SiO2 trench patterns at a growth temperature of 600°C. Based on (224) reciprocal space mapping measurements of Ge samples with a different thickness, the residual in-plane strain value along the trench direction decreased from −0.74% to −0.42% with increasing thickness of the Ge layer from 150 nm to 180 nm. In addition, the compressive strain along the trench direction (ε1¯10) was larger than that in the direction perpendicular to the trench (ε110) regardless of the thickness. For example, when Ge was overgrown on a SiO2 trench, the ε1¯10 and ε110 values were −0.42% and ~0%, respectively. We conclude that the asymmetric strain relaxation behavior of Ge is related to the SiO2 trench patterns, which prevent the dislocations from gliding. Defects such as a microtwin and/or stacking fault were generated during the coalescence of Ge films having different lattice constants in each Ge layer arising from the different relaxation values. A local strain in Ge, with a high spatial resolution of 2.5nm, was measured along the two directions by means of a nanobeam electron diffraction method, thus confirming asymmetric strain relaxation and the results are in good agreement with reciprocal space mapping results.

Low Temperature (180°C) Growth of Smooth Surface Germanium Epilayers on Silicon Substrates Using Electron Cyclotron Resonance Chemical Vapor Deposition

This paper describes a new method to grow thin germanium (Ge) epilayers (40 nm) on c-Si substrates at a low growth temperature of 180°C using electron cyclotron resonance chemical vapor deposition (ECR-CVD) process. The full width at half maximum (FWHM) of the Ge (004) in X-ray diffraction pattern and the compressive stain in a Ge epilayer of 683 arcsec and 0.12% can be achieved. Moreover, the Ge/Si interface is observed by transmission electron microscopy to demonstrate the epitaxial growth of Ge on Si and the surface roughness is 0.342 nm. The thin-thickness and smooth surface of Ge epilayer grown on Si in this study is suitable to be a virtual substrate for developing the low cost and high efficiency III-V/Si tandem solar cells in our opinion. Furthermore, the low temperature process can not only decrease costs but can also reduce the restriction of high temperature processes on device manufacturing.

TCAD simulation of thermally evaporated germanium

AbstractEpitaxial growth of germanium on silicon produces large misfit and threading dislocation densities which dramatically affect electronic properties of Ge. For this reason, TCAD standard models and parameters, optimized for bulk Ge, fail when applied to Ge epilayers. In this work we describe a novel approach for the simulation of highly defected germanium films grown by thermal evaporation.We also take into account the gradient of defect concentration depending on the germanium thickness. The proposed model is successfully employed for TCAD simulations of Ge‐on‐Si pn heterojunction photodiodes, demonstrating good agreement with experimental data. (© 2014 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)

Growth of Thick Ge Epilayers on Si(100) Substrates Utilizing Two-Step Approach by Ultrahigh Vacuum Chemical Vapor Deposition

Ge epilayers on low temperature (LT) Ge buffer layers were grown by ultrahigh vacuum chemical vapor deposition using the two-step approach. Effects of the growth temperature and the thickness of the low temperature Ge buffers were studied. It was demonstrated that it was unable to obtain flat LT Ge buffers just through lowering the growth temperature due to the ultraslow grow rate that 3D islands formation couldnt be prohibited. However, the rough LT Ge surface was smoothed by subsequent growth at elevated temperature if the LT Ge layer was thick enough and the compressive strain was relaxed largely, and the detrimental Si-Ge intermixing was effectively prohibited as well. When using proper growth conditions for the low temperature Ge buffer, thick Ge epilayer with a low threading dislocation density and a smooth surface was obtained.

3D heteroepitaxy of mismatched semiconductors on silicon

We present a method for monolithically integrating mismatched semiconductor materials with Si, coined three-dimensional (3D) heteroepitaxy. The method comprises the replacement of conventional, continuous epilayers by dense arrays of strain- and defect-free, micron-sized crystals. The crystals are formed by a combination of deep-patterning of the Si substrates and self-limited lateral expansion during the epitaxial growth. Consequently, the longstanding issues of crack formation and wafer bowing can be avoided. Moreover, threading dislocations can be eliminated by appropriately choosing pattern sizes, layer thicknesses and surface morphology, the latter being dependent on the growth temperature. We show this approach to be valid for various material combinations, pattern geometries and substrate orientations. We demonstrate that Ge crystals evolve into perfect structures away from the heavily dislocated interface with Si, by using a synchrotron X-ray beam focused to a spot a few hundred nanometers in size and by recording 3D reciprocal space maps along their height. Room temperature photoluminescence (PL) experiments reveal that the interband integrated PL intensity of the Ge crystals is enhanced by almost three orders of magnitude with respect to that of Ge epilayers directly grown on flat Si substrates. Electrical measurements performed on single heterojunction diodes formed between 3D Ge crystals and the Si substrate exhibit rectifying behavior with dark currents of the order of 1mA/cm2. For GaAs the thermal strain relaxation as a function of pattern size is similar to that found for group IV materials. Significant differences exist, however, in the evolution of crystal morphology with pattern size, which more and more tends to a pyramidal shape defined by stable {111} facets with decreasing width of the Si pillars.

Ultrathin low temperature Si0.75Ge0.25/Si buffer layer for the growth of high quality Ge epilayer on Si (100) by RPCVD

An approach to grow high quality strain-relaxed Ge by reduced pressure chemical vapor deposition system has been proposed in this paper. Prior to epitaxial growth high quality Ge layer, an ultrathin Si0.75Ge0.25/Si superlattice buffer layer with thickness of 54nm and a 460nm Ge seed layer were deposited successively at low temperature. Then an 840nm thickness Ge layer was grown at high temperature for faster deposition rate. After achieving high-temperature annealing at hydrogen atmosphere, the root-mean-square roughness of the epitaxial Ge lowers to 0.61nm at 10×10μm2 scan area, and the threading dislocation density is 1×106cm−2. Micro-Raman spectra manifests the extremely uniform distribution of tensile strain in Ge layer at room temperature, which can be contributed to the higher thermal expansion coefficient of Ge than that of Si. In contrast to the epitaxial Ge sample without buffer layer, the crystal quality and Hall hole mobility of the Ge epilayer incorporated ultrathin Si0.75Ge0.25/Si buffer improve significantly, indicating that the ultrathin low temperature Si0.75Ge0.25/Si superlattice buffer layer plays an important role on fabricating high quality Ge epilayer.

Selective epitaxial growth of compressively strained Ge layers on Si in 40-nm trench arrays

We investigated the growth of the epitaxial Ge layers in a 40nm wide SiO2 trench array on Si by ultra-high vacuum chemical vapor deposition. If the thickness of Ge was less than the height of the SiO2 trenches, the Ge layers grew epitaxially by a selective epitaxial growth process without any detectable surface modification, which is due to the high interfacial energy between the SiO2 mask and Ge. We calculated the critical strain required to modify the Ge surface via 3-dimensional island transition (the minimum strain) as a function of the trench width. Considering the energies involved in the transition, we found that uniformly shaped Ge layers along the trenches were energetically more favorable than those with surface undulations as the width of the trench decreased. The strained Ge epilayers relaxed their energy by forming the defects, such as dislocations at the Ge/Si interfaces and stacking faults. From the strain analyses, the residual strains for parallel and perpendicular to the trench direction in the Ge layers were −0.72% and −0.22%, respectively.

Interfacial properties of all-epitaxial Fe–Ge/Ge heterostructures on Ge(111)

The molecular-beam-epitaxy growth of Fe–Ge/Ge/Fe–Ge trilayers on Ge(111) wafers has been investigated as a function of three parameters: the Ge spacer coverage, the substrate temperature (TD) and the dynamic atomic hydrogen (H) exposure during the Ge spacer deposition. Morphology and crystal structure have been characterized in situ by means of scanning tunneling microscopy, low energy electron diffraction, X-ray photoelectron diffraction and ex situ with high-resolution transmission microscopy. Whatever the H flux, epitaxial growth of Ge spacer requires deposition temperature above ~220°C. At the earliest stages of Ge deposition, the surface periodicity of the bottom Fe1.9Ge epilayer changes from p(2×2) to 3×3R30° for deposition temperature above ~220°C, whatever the H dosing. It results from severe intermixing that modifies the stoichiometry of the whole Fe–Ge layer. However, this layer preserves its hexagonal B82 crystal structure and no additional Fe–Ge compounds formed at the interface. We found also that the H flux drastically modifies the Ge spacer growth mode for deposition temperature above ~220°C. In particular, the Ge morphology evolves from 3D islands without H supply to flat and continuous film for H partial pressure above 10–3Pa. Finally, the top Fe–Ge electrode crystallizes in the same structure as the bottom electrode, and the planar relations of the trilayer are: (111)Ge-wafer||(0001)bottom–Fe1.9Ge||(111)Ge-spacer||(0001)top–Fe1.9Ge and [−110]Ge-wafer||[11–20]bottom–Fe1.9Ge||[1–21]Ge-spacer||[11–20]top–Fe1.9Ge. These fully epitaxial Fe–Ge/germanium hybrid heterostructures with single crystal Ge layer of diamond structure appear therefore as promising candidates for semiconductor spintronics.

Structural and band alignment properties of Al2O3 on epitaxial Ge grown on (100), (110), and (111)A GaAs substrates by molecular beam epitaxy

Structural and band alignment properties of atomic layer Al2O3 oxide film deposited on crystallographically oriented epitaxial Ge grown in-situ on (100), (110), and (111)A GaAs substrates using two separate molecular beam epitaxy chambers were investigated using cross-sectional transmission microscopy (TEM) and x-ray photoelectron spectroscopy (XPS). High-resolution triple axis x-ray measurement demonstrated pseudomorphic and high-quality Ge epitaxial layer on crystallographically oriented GaAs substrates. The cross-sectional TEM exhibited a sharp interface between the Ge epilayer and each orientation of the GaAs substrate as well as the Al2O3 film and the Ge epilayer. The extracted valence band offset, ΔEv, values of Al2O3 relative to (100), (110), and (111) Ge orientations using XPS measurement were 3.17 eV, 3.34 eV, and 3.10 eV, respectively. Using XPS data, variations in ΔEv related to the crystallographic orientation were ΔEV(110)Ge>ΔEV(100)Ge≥ΔEV(111)Ge and the conduction band offset, ΔEc, related to the crystallographic orientation was ΔEc(111)Ge>ΔEc(110)Ge>ΔEc(100)Ge using the measured ΔEv, bandgap of Al2O3 in each orientation, and well-known Ge bandgap of 0.67 eV. These band offset parameters are important for future application of Ge-based p- and n-channel metal-oxide field-effect transistor design.