Gate Noise Research Articles

Noise modeling by the trend of each range gate for coherent Doppler LIDAR

A denoising method of all-fiber pulsed coherent Doppler LIDAR (CDL) is investigated. The goal is to enhance the signal-to-noise ratio (SNR) in the weak signal regime. Based on differential detection theory, the total noise expression of CDL with a dual-balanced detector is introduced and analyzed. The conclusion is drawn that the total noise can be acquired under the local oscillator laser exposure conditions by reasonable simplification. Using the actual measured data, the ratio of the standard deviation to the mean value of the total noise in each range gate is obtained and is up to approximately 11%. In order to suppress the jitter of the noise, an effective noise modeling by the trend of each range gate is developed. The feasibility of this method is verified by a long set of measured data. The spatial and temporal distribution of wind speed is illustrated with 400 pulses accumulation. Compared to the noise modeling of the tail, the detection range of wind speed using the proposed method can be improved by 35.3%.

Analysis of flicker and thermal noise in p-channel Underlap DG FinFET

In this paper, we analyze the flicker and thermal noise model for underlap p-channel DG FinFET in weak inversion region. During the analysis of current and charge model, minimum channel potential i.e. virtual source is considered. Initially, the drain current for both long and short channel of DG FinFET are evaluated and found to be well interpreted with experimental results. Further, the flicker and thermal noise spectral density are derived. The flicker noise power spectral density is compared with published experimental results, which shows a good agreement between proposed model and experimental result. During calculation we have considered variation of scattering parameter and furthermore, the degradation of effective mobility is taken into account for ultrathin body. The variation of structural parameters such as gate length (Lg), body thickness (tSi) and underlap length (Lun) are also considered. The degradation of gate noise voltage with frequency, underlap length and gate length signify that p-channel DG FinFET device can be a promising candidate for analog and RF applications.

Amplitude death of coupled hair bundles with stochastic channel noise.

Hair cells conduct auditory transduction in vertebrates. In lower vertebrates such as frogs and turtles, due to the active mechanism in hair cells, hair bundles (stereocilia) can be spontaneously oscillating or quiescent. Recently an amplitude death phenomenon has been proposed [K.-H. Ahn, J. R. Soc. Interface, 10, 20130525 (2013)] as a mechanism for auditory transduction in frog hair-cell bundles, where sudden cessation of the oscillations arises due to the coupling between nonidentical hair bundles. The gating of the ion channel is intrinsically stochastic due to the stochastic nature of the configuration change of the channel. The strength of the noise due to the channel gating can be comparable to the thermal Brownian noise of hair bundles. Thus, we perform stochastic simulations of the elastically coupled hair bundles. In spite of stray noisy fluctuations due to its stochastic dynamics, our simulation shows the transition from collective oscillation to amplitude death as interbundle coupling strength increases. In its stochastic dynamics, the formation of the amplitude death state of coupled hair bundles can be seen as a sudden suppression of the displacement fluctuation of the hair bundles as the coupling strength increases. The enhancement of the signal-to-noise ratio through the amplitude death phenomenon is clearly seen in the stochastic dynamics. Our numerical results demonstrate that the multiple number of transduction channels per hair bundle is an important factor to the amplitude death phenomenon, because the phenomenon may disappear for a small number of transduction channels due to strong gating noise.

Analysis of Correlated Gate and Drain Random Telegraph Noise in Post-Soft Breakdown TiN/HfLaO/${\rm SiO}_{x}$ nMOSFETs

We investigate correlated gate (I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">G</sub> ) and drain (I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">D</sub> ) random telegraph noise phenomena observed in post breakdown regime on nMOSFET TiN/HfLaO/ SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> gate-stacks. We observe two different I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">G</sub> -I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">D</sub> correlation patterns (i.e., of the same and opposite polarities) that we attributed to charge trapping into oxygen vacancy traps of different kinds located in the SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> close to the Si/SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> interface. Results reported in this letter provide useful information for improving the understanding of I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">G</sub> /I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">D</sub> RTN phenomena and its impact on the reliability of post-SBD nanometer MOSFETs.

Cooperative gating between ion channels

Cooperative gating between ion channels, i.e. the gating of one channel directly coupled to the gating of neighboring channels, has been observed in diverse channel types at the single-channel level. Positively coupled gating could enhance channel-mediated signaling while negative coupling may effectively reduce channel gating noise. Indeed, the physiological significance of cooperative channel gating in signal transduction has been recognized in several in vivo studies. Moreover, coupled gating of ion channels was reported to be associated with some human disease states. In this review, physiological roles for channel cooperativity and channel clustering observed in vitro and in vivo are introduced, and stimulation-induced channel clustering and direct channel cross linking are suggested as the physical mechanisms of channel assembly. Along with physical clustering, several molecular mechanisms proposed as the molecular basis for functional coupling of neighboring channels are covered: permeant ions as a channel coupling mediator, concerted channel activation through the membrane, and allosteric mechanisms. Also, single-channel analysis methods for cooperative gating such as the binomial analysis, the variance analysis, the conditional dwell time density analysis, and the maximum likelihood fitting analysis are reviewed and discussed.

Feasibility of SILC Recovery in Sub-10-Å EOT Advanced Metal Gate–High-$\kappa$ Stacks

Voltage-induced recovery of dielectric breakdown is a well known phenomenon that has recently been proposed as an effective technique to rejuvenate nanoscale device performance and enhance the reliability lifetime of ultrathin high- κ gate stacks. Considering that most of the circuits at operating conditions take years to suffer soft breakdown (BD) as estimated by extrapolation models, it would be potentially useful to probe whether the pre-BD defect generation-induced time-dependent leakage evolution of the dielectric, commonly referred to as the stress-induced leakage current (SILC), can be reversed permanently so that circuit performance is enhanced from time to time even before the percolation event. In this letter, we investigate the feasibility of SILC recovery in state-of-the-art sub-10-Å equivalent oxide thickness TiN-TaN-HfLaO-SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> gate stacks by arresting the degradation of the dielectric using carefully chosen compliance values representative of the pre-BD regime. Our results clearly show the improvement in the saturation drive current and transfer characteristics and reduction in gate leakage and noise spectrum in the SILC stage by initiating a simple negative polarity sweep. Reversibility of SILC is attributed to the backward drift of mobile oxygen ions stored in the oxygen soluble metal gate.

Processing and inversion of commercial helicopter time-domain electromagnetic data for environmental assessments and geologic and hydrologic mapping

Helicopter time-domain electromagnetic (HTEM) surveying has historically been used for mineral exploration, but over the past decade it has started to be used in environmental assessments and geologic and hydrologic mapping. Such surveying is a cost-effective means of rapidly acquiring densely spaced data over large regions. At the same time, the quality of HTEM data can suffer from various inaccuracies. We developed an effective strategy for processing and inverting a commercial HTEM data set affected by uncertainties and systematic errors. The delivered data included early time gates contaminated by transmitter currents, noise in late time gates, and amplitude shifts between adjacent flights that appeared as artificial lineations in maps of the data and horizontal slices extracted from inversion models. Multiple processing steps were required to address these issues. Contaminated early time gates and noisy late time gates were semiautomatically identified and eliminated on a record-by-record basis. Timing errors between the transmitter and receiver electronics and inaccuracies in absolute amplitudes were corrected after calibrating selected HTEM data against data simulated from accurate ground-based TEM measurements. After editing and calibration, application of a quasi-3D spatially constrained inversion scheme significantly reduced the artificial lineations. Residual lineations were effectively eliminated after incorporating the transmitter and receiver altitudes and line-to-line amplitude factors in the inversion process. The final inverted model was very different from that generated from the original data provided by the contractor. For example, the average resistivity of the thick surface layer decreased from [Formula: see text] to [Formula: see text], the depths to the layer boundaries were reduced by 15%–23%, and the artificial lineations were practically eliminated. Our processing and inversion strategy is entirely general, such that with minor system-specific modifications it could be applied to any HTEM data set, including those recorded many years ago.

Dual cross-coupling LNA with forward body bias technique

A fully integrated low-power LNA with dual cross-coupling and forward body bias (FBB) techniques is presented. The first cross-coupling circuit is applied at the transconductance stage. By connecting body nodes to each other's source terminals, the body cross-coupling network forms the gate-driven and body-driven simultaneously input stage to gain its effective transconductance, which in turn improves the noise performance and decreases current consumption. In addition, the second capacitor cross-coupling configuration is applied at the input stage to form a feed-forward connection, which results in not only boosting the effective transconductance, but also reducing the influence of the gate noise from the input transistors as well. Moreover, to decrease the overall power consumption further, the FBB technique is employed to lower the supply voltage. The measured noise figure is lower than 3.38 dB and the core circuit consumes only 2.16 mW.

Power-Gating Noise Minimization by Three-Step Wake-Up Partitioning

Power gating is able to counter subthreshold leakage in low-power nanometer technology circuits without sacrificing performance. But mode transitions in power-gated circuits are accompanied by large inrush/discharge currents causing inductive bounce noise on the power supply and ground rails. This issue has been addressed by gradually turning on the sleep transistor; but this introduces a fixed lower bound on the delay overhead irrespective of the duration of the sleep period, and takes no account of the effects of changes in the circuit internal nodes during wake-up on the ground bounce noise. We observed the behavior of internal nodes during the sleep-to-active mode transition and identified three distinct stages. This motivates a three-step turn-on scheme and an associated compact power-gating structure that limits the current flowing through the sleep transistor only while the gated block is metastable, but quickly boosts the power supply rail when there are no short-circuit current paths in the logic. This strongly suppresses power gating noise, and also reduces wake-up time. Simulation results of 16-bit arithmetic logic units in 65-nm CMOS technology show that the proposed technique offers the advantage of a wake-up time that scales with the discharged value (during sleep) of the virtual power rail.

Noise correlation in fundamental mode orthogonal fluxgate

One of the key issues to reduce noise in a flux gate is the knowledge of how the noise is originated within the sensor. In this paper we measured the noise of an orthogonal flux gate operated in the fundamental mode in narrow regions of the magnetic wire used as a core, and we show how the correlation between the noise measured in two different sections drops when the distance between the sections is increased. This indicates that the noise is originated locally in the magnetic wire and then spread thought the wire due to its high permeability. This was confirmed by the measurement with a longer wire that yields higher correlation than those observed with shorter ones. Therefore, uncorrelated noise generated in sections of the wire far enough can be compensated. Finally, we show how the noise from two different wires is totally uncorrelated even if excited by the same current source, confirming that the noise is originated within the magnetic core. Such results can be used to design sensors with lower noise.

Study of RF Reliability of GaN HEMTs Using Low-Frequency Noise Spectroscopy

The results of continuous wave short-term RF stress applied at 3 GHz on GaN high electron mobility transistors on silicon substrate are presented. The degradation of the device characteristics for RF overdrive conditions from 3-dB to 8-dB gain saturation is discussed. Output RF power degrades significantly in a short period of time. Both transient and permanent degradation of electronic properties of the device are identified. After high RF gain compression levels, DC characteristics like the threshold voltage and gate leakage current change permanently. Detailed microscopic changes in the electronic structure of the device were studied by performing simultaneous low-frequency noise measurements of gate and drain currents before and after stress. The channel was found to be immune to the whole stress regime with no increase of the Hooge parameter. On the other hand, activation of unstable defects and then an increase of the defect density near the gate metal semiconductor interface were observed from gate noise measurements. A point defect located at around 4.5 nm from the gate metal semiconductor interface with activation energy of 0.9 eV below the AlGaN conduction band edge was determined from random telegraph noise measurements. The role of forward gate biasing as a failure mechanism is also discussed.

Triggering voltage for post-breakdown random telegraph noise in HfLaO dielectric metal gate metal-oxide-semiconductor field effect transistors and its reliability implications

We report a triggering voltage Vtrig for observing gate leakage current (Ig) random telegraph noise (RTN) in the post-breakdown regime of HfLaO dielectric metal gate stacks. Vtrig, the onset voltage to observe RTN in degraded dielectrics, is highly dependent on breakdown hardness, which is controlled by the leakage current compliance (Igl). This dependence is qualitatively analyzed using a percolation dilation model, where generation of additional traps either at different energy levels or spatial locations gives lower Vtrig at higher Igl. The magnitude of Vtrig can be used as a direct indication of the impact of RTN on the performance of the transistor at device level, when Vtrig is evaluated by comparing with the device operating voltage.

Reduction of Flicker Noise in AlGaN/GaN-Based HFETs After High Electric-Field Stress

We report on the evolution of AlGaN/GaN-based heterojunction field-effect transistor (HFET) operation under high-electric-field stress. Specifically, a 10 ~ 15 dB decrease in the flicker noise is observed after stress in contrast with what has been nominally observed and reported in the literature in the realm of direct-current characteristics. Gate lag measurements revealed a trap state with an activation energy of 0.20 eV in the pristine devices, which manifests itself as a generation-recombination peak in the flicker noise spectrum. This trap state becomes undetectable in gate lag and noise measurements after high-field stress. Analysis shows that the phenomena observed are consistent with the change of surface charge profile during high-electric-field stress.

On the Excess Noise Factor $\Gamma$ of a FET Driven by a Capacitive Source

The excess noise factor Γ , also known as Ogawa's noise factor, is frequently used in the literature on optical receivers to calculate the noise and sensitivity of FET front-ends. After revisiting its definition and clarifying its applications and limitations, we derive an analytical expression for Γ in terms of the channel noise factor γ, the gate noise factor δ , and the correlation coefficient c. We explain the difference between Γ and γ and discuss the dependence of Γ on the source (photodetector) capacitance. The latter dependence, which is weaker than previously thought, is verified by circuit simulations. Additional insight is obtained by complementing van der Ziel's noise model with Pospieszalski's noise model. Finally, we use the derived expression for Γ to calculate its value from measured noise data of a 0.18- μm CMOS technology.

Microscopic Modeling of RF Noise in Laterally Asymmetric Channel MOSFETs

A study of the high-frequency noise performance of laterally asymmetric channel (LAC) MOSFETs and conventional devices is presented. Particular attention is paid to the investigation of the influence of the intrinsic noise sources on the noise performance of the transistors. The improvement in the minimum noise figure of the LAC transistor as compared to a conventional MOSFET is analyzed in terms of reduced induced gate noise, higher cross correlation of drain and gate current fluctuations, and the enhancement of the device transconductance.

Interlaced Dynamical Decoupling and Coherent Operation of a Singlet-Triplet Qubit

We experimentally demonstrate coherence recovery of singlet-triplet superpositions by interlacing qubit rotations between Carr-Purcell (CP) echo sequences. We then compare the performance of Hahn, CP, concatenated dynamical decoupling (CDD), and Uhrig dynamical decoupling for singlet recovery. In the present case, where gate noise and drift combined with spatially varying hyperfine coupling contribute significantly to dephasing, and pulses have limited bandwidth, CP and CDD yield comparable results, with T(2)∼80 μs.

Modélisation des sources de bruit dans les dispositifs MOS

Modeling of noise sources in MOS devicesWe present in this work an investigation of the physical origins of the two main noise sources in MOS devices. In the first part, we interest to the flicker noise and its detailed derivation’s. The thermal noise is discussed in the second part with the explanation of the channel length impact in this noise. At next, we present briefly the induced gate noise.

Graphene Solution‐Gated Field‐Effect Transistor Array for Sensing Applications

AbstractGraphene, with its unique combination of physical and electronic properties, holds great promise for biosensor and bioelectronic applications. In this respect, the development of graphene solution‐gated field‐effect transistor (SGFET) arrays capable of operation in aqueous environments will establish the real potential of graphene in this rapidly emerging field. Here, we report on a facile route for the scalable fabrication of such graphene transistor arrays and provide a comprehensive characterization of their operation in aqueous electrolytes. An on‐chip structure for Hall‐effect measurements allows the direct determination of charge carrier concentrations and mobilities under electrolyte gate control. The effect of the solution‐gate potential on the electronic properties of graphene is explained using a model that considers the microscopic structure of water at the graphene/electrolyte interface. The graphene SGFETs exhibit a high transconductance and correspondingly high sensitivity, together with an effective gate noise as low as tens of μV. Our study demonstrates that graphene SGFETs, with their facile technology, high transconductance, and low noise promise to far outperform state‐of‐the‐art Si‐based devices for biosensor and bioelectronic applications.

INSTRUMENTATION DESIGN FOR CROSS-CORRELATION MEASUREMENTS BETWEEN GATE AND DRAIN LOW FREQUENCY NOISE IN MOSFETS

A two-channel measurement system suited for the on-wafer characterization of the gate and drain low frequency noise in MOSFETs is presented. Guidelines for designing the preamplifier and the bias stage at the drain and gate terminals are discussed. Results show that, the natural choice of employing transimpedance amplifiers as first preamplifier stage is useful only at the gate side, while it is preferable the use of voltage preamplifiers at the drain side to avoid voltage saturation. A simple prototype which implements the proposed design approach is reported. The system capability is tested through the measurement of the gate noise, the drain noise and the cross-correlation between the two channels in nMOSFETs with ultrathin oxide thickness.

Device reliability study of AlGaN/GaN high electron mobility transistors under high gate and channel electric fields via low frequency noise spectroscopy

A set of different short term stress conditions are applied to AlGaN/GaN high electron mobility transistors and changes in the electronic behaviour of the gate stack and channel region are investigated by simultaneous gate and drain current low frequency noise measurements. Permanent degradation of gate current noise is observed during high gate reverse bias stress which is linked to defect creation in the gate edges. In the channel region a permanent degradation of drain noise is observed after a relatively high drain voltage stress in the ON-state. This is attributed to an increase in the trap density at the AlGaN/GaN interface under the gated part of the channel. It was found that self-heating alone does not cause any permanent degradation to the channel or gate stack. OFF-state stress also does not affect the gate stack or the channel.