AbstractTo adequately demonstrate the parallel distributed processing and self‐learning capabilities of neural networks, a realization in hardware is the most appropriate approach. Therefore, a pulse‐density type neuron model was proposed in view of its ease of implementation in hardware. In this model, symbols are transmitted as streams of pulses, and symbol values are represented by the pulse densities. In addition, symbol calculations are all done digitally. An algorithm was developed which enables learning by backpropagation in layered networks, and the efficacy of the proposed neuron model was established through a software simulation. Next, a hardware neuron is constructed on a digital circuit board and its feedforward and learning processes as well as its error backpropagation capability are demonstrated. Using this board, a prototype hardware neural network was constructed which does not require any software and which performed handwritten digit recognition and learning. Finally, this neuron board capabilities were integrated in LSI using a gate array. The possibility of its use in implementing future large‐scale networks is discussed.