GaN MOS-HEMT Research Articles

Investigation of the Electrical Characteristics of AlGaN/AlN/GaN Heterostructure MOS-HEMTs with TiO2 High-k Gate Insulator

This paper investigates the impact of TiO2 high-k gate insulator on the electrical characteristics of AlGaN/AlN/GaN MOS-HEMT transistors using MATLAB and Atlas-TCAD simulation software. The physical analytical model of the MOS-HEMTs is used for simulation from Al2O3, HfO2, and TiO2 as the gate dielectric materials, which provide higher performance and reliability of the MOS-HEMT devices. The device shows a good improvement in its result of the DC and AC characteristics with different permittivity of insulator materials. Thus, the DC and AC performance of GaN MOS-HEMTs is higher than with other insulators, such as Al2O3 and HfO2 by using TiO2 as the gate dielectric. Moreover, the simulation results proved that TiO2 is the better gate dielectric material to enhance the electrical reliability of the power switching devices for high-temperature applications such as electric automobiles.

High-temperature operation of Al2O3/Ga2O3 bi-layer gate stack GaN MOS-HEMT up to 450 °C with suppressed gate leakage

Abstract In this work, we report the reduced gate leakage current by using aluminum oxide (Al2O3) and gallium oxide (Ga2O3) as a bi-layer gate stack for GaN MOS-HEMT on a silicon substrate up to 450 °C. The bi-layer gate stack MOS-HEMTs suppressed the gate leakage by more than four orders of magnitude compared to only Al2O3-based GaN MOS-HEMT at 450 °C. The low gate leakage current is attributed to the reduced oxygen vacancies present in the Ga2O3 layer, which effectively impede the conduction path of the Poole-Frenkel emission at high temperatures, thereby enhancing the overall performance of GaN HEMTs.

Sensitivity improvement in gate engineered technique dielectric modulated GaN MOSHEMT with InGaN notch for label-free biosensing

This paper focuses on the impact of gate-engineered dielectric-modulated GaN MOSHEMT with InGaN notch on sensitivity enhancement for label-free biosensing. The novelty of this study utilizes the charge-plasma effect induced by the dual metal gate (DMG) technology adopted to realize the effect of sensitivity on different biomolecules. Moreover, the presence of an InGaN notch enhances carrier confinement in the 2DEG, subsequently improving the threshold voltage and device sensitivity at the AlGaN/GaN interface. The maximum drain current, IDS of 4.602 A mm−1, transconductance, gm of 18 mS/mm, and sensitivity has been improved by around 61% for the Uricase biomolecule by introducing the dual metal gate technology. The work function difference of the two metal gates suppresses the Short Channel Effects (SCEs) and hot carrier effects in DMG MOSHEMT, thereby screening the drain potential variations by the gate near the drain. In addition, increased carrier transport efficiency results from a more consistent electric field along the channel. All the simulations are carried out using the Sentaurus TCAD simulator, and the results imply the feasibility of gate-engineered GaN MOSHEMT for label-free biosensing.

Concurrent characterization of GaN MOSHEMT gate leakage via electrical and thermoreflectance measurements

In this work, we report the first concurrent use of electrical and thermal characterization, via thermoreflectance, to analyze Time Dependent Dielectric Breakdown in GaN MOSHEMTs. Electrically stressing the devices until a failure occurs, then evaluating them via thermoreflectance, revealed a geometric dependence of the failure mode. All soft breakdowns occurred at the mesa edge where the electric field strength was at its strongest, and tunneling current density was at its highest. This breakdown phenomenon at the mesa edge has been seen previously in GaN HEMTs employing a mesa architecture. Possible approaches to mitigate these failures in MOSHEMTs are proposed.

Performance evaluation of electrical properties of GaN MOS-HEMTs based biosensors for rapid detection of viruses

In this work AlGaN/AlN/GaN MOS-HEMTs based biosensors have been proposed and simulated for the rapid test and ultrasensitive detection of various viruses. The proposed device employs two-dimensional (2D) III-nitride semiconductor materials for the biosensing detection. A cavity has been created in the oxide of the proposed GaN MOS HEMTs to detect biomolecules and viruses. An analytical model of GaN MOS-HEMTs has been modulated by dielectric constant of the virus, thus providing insight into the device physics. A 2D calibrated simulation of the proposed bioelectronic device has been performed and the results have been compared with an analytical model developed. Various analyses have been performed in this work including the sensitivity analysis. The simulations have revealed that the high dielectric constant of the virus reflects high sensitivity of the proposed GaN MOS-HEMTs based biosensors. Further, the studies show that the proposed structure can be used for the detection of different viruses in future, especially those which are harmful to human life.

Effect of Dual Metal on RF/Analog and Linearity Performance of Double Gate Ferroelectric Si-doped-HfO2 GaN MOSHEMT

Effect of Dual Metal on RF/Analog and Linearity Performance of Double Gate Ferroelectric Si-doped-HfO2 GaN MOSHEMT

Performance improvement in NiO x -based GaN MOS-HEMTs

We have illustrated the thermal oxidation of Ni as gate dielectrics to improve the characteristics of GaN-based metal oxide semiconductor high electron mobility transistors (HEMTs). The oxide is formed by a pre-deposition of a thin film followed by oxidation in pure O2 ambient. The formation and thickness of the oxides are confirmed through x-ray photoelectron spectroscopy and transmission electron microscopy. NiO x is found to have an energy band gap of 3.7 eV determined using O 1s energy loss spectra. NiO x is found to provide negative (1.7 eV) valence band offsets with AlGaN. The potential use of the oxides has been confirmed by the significant improvement in drive current, transconductance, subthreshold swing, unity current gain frequency, and gate current leakage over the Schottky barrier HEMTs (SB-HEMTs). We have observed a positive shift in threshold voltage for NiO x -based gate dielectric devices compared to that of the SB-HEMTs.

Improved Low-Frequency Noise in Recessed-Gate E-Mode AlGaN/GaN MOS-HEMTs Under Electrical and Thermal Stress

1/f noise provides essential information on the interface trapping effect as well as the scattering mechanism in transistors. In this work, a systematic 1/f noise study has been carried out on the recessed-gate enhancement-mode (E-mode) GaN MOS-HEMTs under electrical and thermal stress together with the depletion-mode (D-mode) counterpart. Low-frequency (1–1000 Hz) measurement has been performed at room (25 °C) and elevated (100 °C) temperatures at different carrier densities at the drain bias of 2 V and 10 V. The results show the E-mode device has much better noise characteristics under high voltage and high temperature compared with the D-mode counterpart. Moreover, charge-noise model reveals that the improved noise behavior of the E-mode device at high density and high drain bias at 100 °C originating from the energy band alignment at high biases, where the D-mode device suffers from extra charge trapping scattering in the gate edge near the gate-to-drain access region.

Influence of the Acceptor-Type Trap on the Threshold Voltage of the Short-Channel GaN MOS-HEMT

In this work, the influence of the acceptor-type trap on the threshold voltage and short-channel effect is analyzed and modeled for the short-channel GaN MOS-HEMT. Particularly, the analysis and modeling are carried out with the dependences of the traps' ionization condition on the gate voltage and drain voltage considered. From the calculated results based on the proposed threshold voltage model, it is found that both the interface acceptor-type trap and buffer acceptor-type trap play a vital role in the threshold voltage reduction for the short-channel AlGaN/GaN MOS-HEMT, due to the acceptor-type trap's detrapping effect induced by the drain voltage. The calculated results are well supported by the numerical simulation, which verified the correctness and accuracy of the presented model.

Rapid detection of biomolecules in a dielectric modulated GaN MOSHEMT.

Biosensors are the devices that find application in almost every field nowadays. In this paper, GaN MOSHEMT based biosensor is proposed for detection of biomolecules such as ChOx, protein, streptavidin and Uricase. The effect of biomolecule species on the performance parameters of the device has been studied. It has been observed that there is a significant increase in the drain current and gd is observed with the addition of biomolecule in the nanocavity. The electron concentration contour is studied which shows the rise of carrier concentration with biomolecule. Maximum positive shift is observed in threshold voltage for Uricase due to lowest dielectric constant. Similarly, the change in transconductance is also obtained with biomolecules. The effect of cavity dimensions on sensitivity is also studied. The maximum increase of 10% in channel potential is noted due biomolecule presence in the cavity. This device has shown good sensing and can be used for biosensing applications efficiently in addition to the high power performance of MOS-HEMTs.

Investigation of interfaces and threshold voltage instabilities in normally-off MOS-gated InGaN/AlGaN/GaN HEMTs

Polarization engineering is a promising approach to achieve high positive threshold voltage (Vth) in GaN-based metal-oxide-semiconductor high electron mobility transistors (MOS HEMTs). In this paper, we investigate all critical interfaces of polarization-engineered normally-off Al2O3/InGaN/AlGaN/GaN MOS HEMTs using transmission electron microscopy and X-ray photoelectron spectroscopy. Mechanisms of threshold voltage (VTH) instabilities are also analyzed. Devices were subjected to positive-bias stress-recovery experiments to capture the transient change in Vth. We propose a model that explains observed peculiar behavior and discuss the role of 2-dimensional hole gas (2DHG) in Al2O3/InGaN/AlGaN/GaN MOS HEMTs Vth shift.

Threshold voltage control of non-recessed GaN MOS HEMTs and recessed GaN MOS FETs by AlxGa1−xN back barrier

Threshold voltage (Vth) control of a GaN MOS transistor by AlxGa1−xN back barrier was systematically studied. Non-recessed GaN MOS HEMTs and recessed GaN MOS FETs with an AlxGa1−xN (x = 0%, 3%, 5%, 8%) back barrier layer were fabricated on the same 6 inch GaN-on-Si wafers and characterized. Al2O3 gate-insulator thickness was changed from 20 to 100 nm to evaluate the Al2O3/GaN interface fixed charge. The Vth of the GaN MOS transistor increases with increasing in Al content x of the AlxGa1−xN back barrier layer and decreasing in Al2O3 thickness. The dependences of Vth on Al content x and Al2O3 thickness were different between non-recessed and recessed transistor. The different dependences of Vth on Al content x and Al2O3 thickness were explained well by the newly introduced surface donor model, which compensate not only the surface polarization charge but also the surface electric field.

Single Pulse Charge Pumping Measurements on GaN MOS-HEMTs: Fast and Reliable Extraction of Interface Traps Density

In this article, we report on the single pulse charge pumping (SPCP) measurements as a method to extract the interface trap density ( ${N} _{\text {it}}$ ) on the GaN metal–oxide–semiconductor high-electron-mobility transistors (MOS–HEMTs). The electron capture and emission processes are monitored in the time domain and studied during the rising and falling edges of a gate voltage pulse. Two different gate stacks are studied by SPCP including epitaxial Mg0.25 Ca0.75O (MgCaO) and amorphous Al2O3. The signature charge pumping (CP) current peaks are observed enabling a direct extraction of ${N} _{\text {it}}$ as low as $1.4\times 10^{{11}}$ cm−2 with gate voltage sweeping from OFF-state to ON-state in the GaN MOS-HEMT with epitaxial MgCaO gate stack. A significant reduction of ${N} _{\text {it}}$ by the MgCaO gate stack compared to Al2O3 only gate stack is also confirmed by the SPCP method. SPCP realizes a direct ${N} _{\text {it}}$ measurement on GaN transistors and confirms the high quality interface between the single crystalline epitaxial MgCaO and GaN. It is verified as a fast and reliable interface characterization method on III–V HEMTs, gate-all-around nanowire transistors, and 2-D transistors, which do not exhibit body contacts as the conventional Si transistors needed for conventional CP measurements.

Improved Current Collapse in Recessed AlGaN/GaN MOS-HEMTs by Interface and Structure Engineering

Enhancement-mode (E-mode) GaN MOS-HEMTs using recess process typically face the challenge of precise thickness control, surface roughness issue, and interface traps, all of which could lead to the degradation of the device performance and cause reliability issues. In this article, we use a combined process of atomic layer etching (ALE) technique and atomic layer deposited (ALD) HfSiO dielectric. ALE is repeated oxidation and dry etching process with minimal surface damage, leading to a precisely controlled low-damage recess channel area. The fabricated AlGaN/GaN MOS-HEMTs exhibit E-mode operation with a positive threshold voltage ( ${V}_{\text {th}}$ ) of +2.1 V with small ${V}_{\text {th}}$ dispersion for different devices, an ultrahigh drain current ON– OFF ratio over 1010 and a low ON-resistance ( ${R}_{ \mathrm{\scriptscriptstyle ON}}$ ) of $11.5~\Omega \cdot \text {mm}$ at gate-to-drain length ( ${L}_{\text {GD}}$ ) of $25~\mu \text{m}$ . Source field plate (SFP) structure is employed to reduce the charge trapping process and improve the reliability at high voltages. The current collapse of the E-mode device with SFP structure can be effectively suppressed due to the optimized redistribution of the peak electric field in the gate-to-drain access region, where a significantly improved dynamic ${R}_{ \mathrm{\scriptscriptstyle ON}}$ of only 1.17 times increase from the static ${R}_{ \mathrm{\scriptscriptstyle ON}}$ after OFF-state ${V}_{\text {DS}}$ stress of 600 V. Moreover, the enhanced vertical electric field with decreased AlGaN barrier thickness and the positive shift in threshold voltage for the E-mode device can effectively suppress the current collapse, which outperforms the depletion-mode counterpart. The breakdown voltage reaches a considerable value of 1560 V at an OFF-state current density of ${1}~\mu \text{A}$ /mm.

Linearity improvement in E‐mode ferroelectric GaN MOS‐HEMT using dual gate technology

In this work, an enhancement mode dual gate ferroelectric gallium nitride metal oxide semiconductor-high electron mobility transistor (GaN MOS-HEMT) is proposed with enhanced linearity characteristics. The different DC characteristics of the device are analysed and compared with available experimental data of single gate un-recessed ferroelectric GaN MOS-HEMT. In order to analyse the linearity performance of the devices, a look up table-based large signal model is developed directly from technology computer-aided device simulation results built by feeding different small signal parameters. The different linearity characteristics such as input third-order intercept point (IIP3), the input gain compression point (P1dB), third-order intermodulation (IM3) and the carrier to intermodulation power ratio of both the devices are compared by harmonic balance simulation of the developed large signal models. The interlink between IIP3 and IM3 with transconductance indicates that the broader the transconductance distribution with respect to different gate voltage generates higher IIP3 and lower IM3, which results in an improved linearity performance. The dual gate device shows improved linearity performance resulting in applicability in radiofrequency front end receiver.

Improved Interface Properties and Dielectric Breakdown in Recessed AlGaN/GaN MOS-HEMTs Using HfSiO<inline-formula> <tex-math notation="LaTeX">$_{{x}}$ </tex-math> </inline-formula> as Gate Dielectric

In this letter, we report optimized transport properties in gate recessed enhancement-mode GaN MOS-HEMTs by incorporating silicon into atomic layer deposited gate dielectric HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> . Compared with commonly used HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> gate dielectric, the interface trap density can be reduced by nearly an order of magnitude and the fixed oxide traps inside are reduced to almost half using the high-quality passivation of HfSiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> . The MOS-HEMTs based on HfSiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> exhibit a threshold voltage of 1.5 V, excellent subthreshold swing of 65 mV/dec, and a high on-off ratio of 3 × 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">10</sup> . The incorporation of silicon in HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> can also increase the dielectric breakdown property with maximum gate electric field of 2.85 MV/cm for a 10-year time-dependent gate dielectric breakdown lifetime, which is 36% higher than pure HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> . The maximum breakdown voltage of HfSiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> MOS-HEMT is 742 V, which is 30% higher than HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> MOS-HEMT.

Analytical model development of channel potential, electric field, threshold voltage and drain current for gate workfunction engineered short channel E-mode N-polar GaN MOS-HEMT

In this paper an enhancement mode (E-mode) short channel N-polar GaN MOS-HEMT is proposed. In order to mitigate different short channel effects, workfunction engineering technique is applied to the gate electrode. An analytical model for channel potential, electric field threshold voltage and drain current is developed for the device and validated with Atlas TCAD simulation results. The variation of minimum channel potential and threshold voltage with respect to different channel lengths is also performed. It is observed that device with triple material gate shows better control of short channel effects as compared to single and double material gate based devices.

An Analytical Investigation on the Charge Distribution and Gate Control in the Normally-Off GaN Double-Channel MOS-HEMT

A systematic analytical investigation of the charge distribution and gate control of the normally-off GaN double-channel MOS-HEMT (DC-MOS-HEMT) is presented in this paper. Compared to conventional GaN MOS-HEMT, the DC-MOS-HEMT features a thin AlN insertion layer (AlN-ISL) below the original two dimensional electron gas (2DEG) channel, thus forming a second channel at the interface between AlN-ISL and the underlying GaN. This paper reveals the impact of the AlN-ISL on the 2DEG distribution and the gate control of the channels. The sensitivity of ${V}_{\text {th}}$ against the recess depth is also analytically studied and is found to be nearly independent of the recess depth as long as the recess is terminated in the upper channel layer. The analytical results are well supported by numerical device simulations, and the physical mechanisms behind these findings are explained along with the analytical investigations.

Small-signal model parameter extraction of E-mode N-polar GaN MOS-HEMT using optimization algorithms and its comparison

An improved small-signal parameter extraction technique for short channel enhancement-mode N-polar GaN MOS-HEMT is proposed, which is a combination of a conventional analytical method and optimization techniques. The extrinsic parameters such as parasitic capacitance, inductance and resistance are extracted under the pinch-off condition. The intrinsic parameters of the small-signal equivalent circuit (SSEC) have been extracted including gate forward and backward conductance. Different optimization algorithms such as PSO, Quasi Newton and Firefly optimization algorithm is applied to the extracted parameters to minimize the error between modeled and measured S-parameters. The different optimized SSEC models have been validated by comparing the S-parameters and unity current-gain with TCAD simulations and available experimental data from the literature. It is observed that the Firefly algorithm based optimization approach accurately extracts the small-signal model parameters as compared to other optimization algorithm techniques with a minimum error percentage of 1.3%.

Characterization of 880 V Normally Off GaN MOSHEMT on Silicon Substrate Fabricated With a Plasma-Free, Self-Terminated Gate Recess Process

In this paper, we report the device performance of a high-voltage enhancement-mode (E-mode) GaN MOSHEMT on silicon substrate. Normally off operation is realized by a self-terminated precision gate recess process on an optimized high-electron mobility transistor structure. The GaN MOSHEMT is fully pinched off at zero gate bias, suggesting a “true” normally off operation. The threshold voltage is 0.4 V with a drain current density of 1 $\mu \text{A}$ /mm as the criteria. The device with 15- $\mu \text{m}$ gate-drain distance and 100- $\mu \text{m}$ gate width exhibits a maximum drain current of 356 mA/mm at 8-V gate bias. The on/off current ratio of the device is larger than 1010 with a subthreshold slope of 80 mV/dec. The gate leakage current is below 10−7 mA/mm up to 9-V gate bias. The off-state breakdown voltage (BV) is as high as 1528 V (880 V) measured with floating (grounded) silicon substrate at a drain leakage current criterion of 5 $\mu \text{A}$ /mm. The specific on-resistance ( ${R}_{\text {ON,SP}}$ ) of the device is 2.79 $\text{m}\Omega \cdot$ cm2, and the power figure of merit (BV2/ ${R}_{ \text {ON,SP}}$ ) is 277 MW/cm2. High-voltage pulsed I–V measurement indicates that the dynamic on-resistance is only 1.6 times the static one with a pulsewidth of 10 $\mu \text{s}$ at 400-V off-state quiescent drain bias. The high performance of the normally off GaN MOSHEMT is supposed to benefit from the high quality low pressure chemical vapor deposition Si3N4 passivation layer and the advanced E-mode device fabrication process.