GaN Metal Insulator Semiconductor Research Articles

Effect of overdrive voltage on PBTI trapping behavior in GaN MIS-HEMT with LPCVD SiNx gate dielectric**Project supported by the National Key Research and Development Program, China (Grant No. 2017YFB0402800), the Key Research and Development Program of Guangdong Province, China (Grant No. 2019B010128002), the National Natural Science Foundation of China (Grant No. U1601210), and the Natural Science Foundation of Guangdong Province,

The effect of high overdrive voltage on the positive bias temperature instability (PBTI) trapping behavior is investigated for GaN metal–insulator–semiconductor high electron mobility transistor (MIS-HEMT) with LPCVD-SiNx gate dielectric. A higher overdrive voltage is more effective to accelerate the electrons trapping process, resulting in a unique trapping behavior, i.e., a larger threshold voltage shift with a weaker time dependence and a weaker temperature dependence. Combining the degradation of electrical parameters with the frequency–conductance measurements, the unique trapping behavior is ascribed to the defect energy profile inside the gate dielectric changing with stress time, new interface/border traps with a broad distribution above the channel Fermi level are introduced by high overdrive voltage.

Hole-Induced Degradation in ${E}$ -Mode GaN MIS-FETs: Impact of Substrate Terminations

We conducted reliability characterization under reverse-bias stress (i.e., stress at OFF-state with high ${V}_{\text {DS}}$ ) on the ${E}$ -mode GaN metal–insulator–semiconductor field-effect-transistors (MIS-FETs) with various substrate terminations. The MIS-FETs with floating substrate (FS) show worse threshold voltage ( ${V}_{\text {TH}}$ ) stability than that with a grounded substrate. A non monotonic dependence of ${V}_{\text {TH}}$ shifts and OFF-state time-to-breakdown ( ${t}_{\text {BD}}$ ) on the positive substrate bias ( ${V}_{\text {sub}}$ ) was also observed. The underlying mechanisms are the different impacts of positive ${V}_{\text {sub}}$ on the drift of electrons and holes during the long-term stress. An important indication is that positive-biased and FS terminations should be restricted at OFF-state in order to obtain good ${V}_{\text {TH}}$ stability in applications of the GaN MIS-FET.

Normally-Off Tri-Gate GaN MIS-HEMTs with 0.76 mΩ·cm2 Specific On-Resistance for Power Device Applications

A GaN metal–insulator–semiconductor high electron mobility transistor (MIS-HEMT) using tri-gate architecture and hybrid ferroelectric charge trap gate stack is demonstrated for normally-off operation. Compared with the conventional planar device, the tri-gate device has the 2-D electron gas (2-DEG) channel exposed on the nanowire sidewalls, so that the trapped charges in the HfON charge-trapping layer can easily deplete the channel from the sidewalls, leading to a high positive threshold voltage ( ${V}_{\text {th}}$ ) to realize the normally-off operation. Moreover, through this electrostatic control on the sidewall, a high density of negative charge caused by hybrid ferroelectric charge trap gate stack with the optimized tri-gate structure, the tri-gate device can achieve normally-off GaN device with both low on-resistance ( ${R}_{ \mathrm{ON}}$ ) and high positive ${V}_{\text {th}}$ . The designed tri-gate device exhibits a high ${V}_{\text {th}}$ of +2.61 V at current density ( ${I}_{\text {DS}}) = 1\,\,\mu \text{A}$ /mm, a high maximum current density ( ${I}_{\text {DS, MAX}}$ ) of 896 mA/mm, a low ${R}_{ \mathrm{ON}}$ of $5.0~\Omega \!\!\cdot \!\!\text {mm}$ and a high breakdown voltage (BV) of 788 V. To the best of our knowledge, the proposed tri-gate device shows the lowest specific on-resistance ( ${R}_{ \mathrm{ON}, \text {SP}}$ ) among reported normally-off GaN device results with BV >650 V.

200°C normally off AlGaN/GaN MISFET with 321 mA/mm drain current density and 1055 V breakdown voltage

A high-performance normally off recess-gated aluminium gallium nitride (AlGaN)/GaN metal–insulator–semiconductor field-effect transistor (MISFET) is successfully demonstrated with operation temperature of 200°C which was fabricated by using a self-terminating gate recess etching technique. At 200°C, by employing a high-quality aluminium oxide/silicon nitride bilayer as gate dielectrics, the fabricated device exhibits a high threshold voltage of 4.5 V, a high drain current density of 321 mA/mm, a low off-state leakage current of 20 μA/mm as well as a high on/off current ratio of ∼106. Furthermore, a high forward gate breakdown voltage of 23.6 V (∼7.9 MV/cm) and an off-state breakdown voltage as high as 1055 V are obtained in the fabricated device, both of which, as far as it is known, is the highest reported value in normally off GaN devices operated at 200°C. The high threshold voltage, large drain current density, low off-state leakage current, high gate breakdown voltage as well as high off-state breakdown voltage make this normally off recess-gated AlGaN/GaN MISFET very suitable for high-temperature power switch applications.

Enhanced gate stack stability in GaN transistors with gate dielectric of bilayer SiNx by low pressure chemical vapor deposition

We report enhanced gate stack stability in GaN metal insulator semiconductor high electron mobility transistors (MISHEMTs) by using a bilayer SiNx as the gate dielectric. To obtain the bilayer gate dielectric scheme, a thin Si-rich SiNx interlayer was deposited before a high-resistivity SiNx layer by low pressure chemical vapor deposition. The Si-rich SiNx can effectively suppress the trapping phenomenon at the interface of the dielectric/AlGaN barrier. The upper high-resistivity SiNx layer can greatly block the gate leakage current to enable a large gate swing. Compared with the MISHEMTs using a single Si-rich or high-resistivity SiNx layer, the MISHEMTs with a bilayer gate dielectric take the advantages of both, realizing a gate stack with a stable threshold voltage and low leakage current. These results thus present great potential for developing high-performance GaN MISHEMTs using the bilayer SiNx gate dielectric scheme for highly efficient power applications.

Ab initio study of impact of nitridation at amorphous-SiNx/GaN interface

A set of amorphous-SiNx/GaN interfaces is studied by ab initio calculation to understand the effects of GaN surface nitridation on interface state distribution. This study reveals that for the Si-rich SiNx/GaN interface without nitridation, both shallow and deep traps exist in a wide energy range within the GaN bandgap. However, with proper surface nitridation prior to SiNx deposition, the interface exhibits a much cleaner bandgap structure with significantly suppressed interface state density (Dit). With the increase in the interfacial N-adatom coverage ratio, the shallow traps dramatically disappear while the deep traps merge into the GaN valence band, indicating a high-quality interface with low Dit after sufficient nitridation. The low Dit would eventually lead to enhanced Vth stability in GaN metal–insulator–semiconductor (MIS)-gate devices. The nitridation effects on Dit are further verified by capacitance–voltage (C–V) measurements in the GaN metal–insulator–semiconductor (MIS) diode with/without interface nitridation.

Drain current enhancement induced by hole injection from gate of 600-V-class normally off gate injection transistor under high temperature conditions up to 200 °C

In this paper, the current–voltage (I–V) characteristics of a 600-V-class normally off GaN gate injection transistor (GIT) from 25 to 200 °C are analyzed, and it is revealed that the drain current of the GIT increases during high-temperature operation. It is found that the maximum drain current (Idmax) of the GIT is 86% higher than that of a conventional 600-V-class normally off GaN metal insulator semiconductor hetero-FET (MIS-HFET) at 150 °C, whereas the GIT obtains 56% Idmax even at 200 °C. Moreover, the mechanism of the drain current increase of the GIT is clarified by examining the relationship between the temperature dependence of the I–V characteristics of the GIT and the gate hole injection effect determined from the shift of the second transconductance (gm) peak of the gm–Vg characteristic. From the above, the GIT is a promising device with enough drivability for future power switching applications even under high-temperature conditions.

Bias Temperature Instability of Normally‐Off GaN MIS‐FET with Low‐Pressure Chemical Vapor Deposition SiNx Gate Dielectric

In this work, characterizations are conducted to investigate the threshold voltage (VTH) stability of the normally‐off GaN metal–insulator–semiconductor (MIS‐) field‐effect transistor (FET) with fully recessed gate structure and highly reliable low‐pressure chemical vapor deposition SiNx gate dielectric. We conducted bias‐temperature instability (BTI) tests under both positive and negative gate bias. We demonstrated the highly stable VTH of the high‐performance MIS‐FETs with small BTI, which benefits from the effective interfacial protection layer. More specifically, combining the BTI tests and drain current 1/f noise analysis, we present extensive investigation of the physical origins of BTI. According to the experimental evidence and analysis, we ascribe the VTH instability to the trapping/detrapping of the pre‐existing trap states located at the SiNx/GaN interface and/or in the gate dielectric.

Short-Circuit Study in Medium-Voltage GaN Cascodes, p-GaN HEMTs, and GaN MISHEMTs

This paper studies by experimentation and physics-based simulation the Short-Circuit (SC) capability of several normally-off 600–650 V Gallium Nitride High-Electron-Mobility Transistors (GaN HEMTs): cascodes, p-GaN, and GaN Metal–Insulator–Semiconductor HEMTs (MISHEMTs). As a result, cascodes present the worst SC ruggedness. By contrast, p-GaN gate HEMTs and MISHEMTs provide a higher SC capability thanks to their strong drain current reduction. In addition, a valuable state-of-the-art about all commercially available technologies is also provided, which demonstrates that current GaN devices do not allow SC capability.

Normally-off fully recess-gated GaN metal–insulator–semiconductor field-effect transistor using Al2O3/Si3N4 bilayer as gate dielectrics

By a self-terminating gate recess etching technique, a normally-off fully recess-gated GaN metal–insulator–semiconductor field-effect transistor (MISFET) was fabricated using Al2O3/Si3N4 bilayer as gate dielectrics. Owing to the high breakdown electric field (∼10 MV/cm) of the gate dielectrics, the device exhibits a large gate swing of 18 V, a high threshold voltage of 1.7 V (at ID = 100 µA/mm), a large maximum drain current of 534 mA/mm, a gate leakage current lower than 20 nA/mm in the whole gate swing, and a high OFF-state breakdown voltage of 1282 V. Furthermore, owing to the high gate overdrive (VGS − VTH), the on-resistance of the device only increases by 5.4% under a constant stress of VGS/VDS = 18 V/1 V.

Si Complies with GaN to Overcome Thermal Mismatches for the Heteroepitaxy of Thick GaN on Si.

Heteroepitaxial growth of lattice mismatched materials has advanced through the epitaxy of thin coherently strained layers, the strain sharing in virtual and nanoscale substrates, and the growth of thick films with intermediate strain-relaxed buffer layers. However, the thermal mismatch is not completely resolved in highly mismatched systems such as in GaN-on-Si. Here, geometrical effects and surface faceting to dilate thermal stresses at the surface of selectively grown epitaxial GaN layers on Si are exploited. The growth of thick (19 µm), crack-free, and pure GaN layers on Si with the lowest threading dislocation density of 1.1 × 107 cm-2 achieved to date in GaN-on-Si is demonstrated. With these advances, the first vertical GaN metal-insulator-semiconductor field-effect transistors on Si substrates with low leakage currents and high on/off ratios paving the way for a cost-effective high power device paradigm on an Si CMOS platform are demonstrated.

Ultraviolet Emission From Resonant Tunnelling Metal–Insulator– Semiconductor Light Emitting Tunnel Diodes

Strong room-temperature electroluminescence at 365 nm has been demonstrated from simple Au/AlN/ n -GaN metal–insulator–semiconductor (MIS) light emitting diodes, which do not contain p -doped material. Current-voltage and electroluminescence data indicate that an AlN insulating layer thickness of 10 nm results in optimized diode behavior and maximum ultraviolet emission: At lower thicknesses carriers tunnel easily through the barrier, whereas at greater thicknesses the forward resistivity is excessively high. A decrease in emission intensity was observed at high injection currents due to Fowler–Nordheim tunnelling. However the device efficiency was found to improve by a factor of 10 when the AlN layer and the metal contact layer were deposited without breaking vacuum, thereby preventing any contamination or oxidation of the AlN surface. Additionally, this MIS device showed clear resonant tunnelling characteristics which are correlated with the enhanced light emission intensity.

High Uniformity Normally-OFF GaN MIS-HEMTs Fabricated on Ultra-Thin-Barrier AlGaN/GaN Heterostructure

Ultra-thin-barrier (UTB) AlGaN/GaN heterostructure is utilized for fabrication of normally-OFF GaN metal–insulator–semiconductor high-electron-mobility transistors (MIS-HEMTs). The sheet resistance of 2-D electron gas in the UTB Al0.22Ga0.78N(5-nm)/GaN heterostructure is effectively reduced by SiNx passivation grown by low-pressure chemical vapor deposition, from 2570 to $334~\Omega $ /□. The fabricated Al2O3/AlGaN/GaN MIS-HEMTs exhibit normally-OFF behavior with good $V_{\mathrm {TH}}$ uniformity and low $V_{\mathrm {TH}}$ -hysteresis. 20 mm-gate-width power devices featuring a low $R_{\sc {\mathrm{ on}}}$ of $0.75~\Omega $ ( $\text{I}_{\mathrm {D,MAX}} =6.5$ A) are also demonstrated on the platform.

Temperature-Dependent Electrical Properties and Carrier Transport Mechanisms of TMAH-Treated Ni/Au/Al2O3/GaN MIS Diode

The temperature-dependent electrical properties and carrier transport mechanisms of tetramethylammonium hydroxide (TMAH)-treated Ni/Au/Al2O3/GaN metal–insulator–semiconductor (MIS) diodes have been investigated by current–voltage (I–V) and capacitance–voltage (C–V) measurements. The experimental results reveal that the barrier height (I–V) increases whereas the ideality factor decreases with increasing temperature. The TMAH-treated Ni/Au/Al2O3/GaN MIS diode showed nonideal behaviors which indicate the presence of a nonuniform distribution of interface states (NSS) and effect of series resistance (RS). The obtained RS and NSS were found to decrease with increasing temperature. Furthermore, it was found that different transport mechanisms dominated in the TMAH-treated Ni/Au/Al2O3/GaN MIS diode. At 150 K to 250 K, Poole–Frenkel emission (PFE) was found to be responsible for the reverse leakage, while Schottky emission (SE) was the dominant mechanism at high electric fields in the temperature range from 300 K to 400 K. Feasible energy band diagrams and possible carrier transport mechanisms for the TMAH-treated Ni/Au/Al2O3/GaN MIS diode are discussed based on PFE and SE.

Electrical properties and transport mechanisms of Au/Ba0.6Sr0.4TiO3/GaN metal–insulator–semiconductor (MIS) diode at high temperature range

The electrical and transport mechanisms of a fabricated Au/Ba0.6Sr0.4TiO3 (BST)/GaN metal–insulator–semiconductor (MIS) diode have been studied in the temperature range of 280–430 K by current–voltage (I–V) and capacitance–voltage (C–V) measurements. The barrier heights (BHs) of the Au/BST/GaN MIS diode are found to be 0.85 eV (I–V)/1.35 (C–V) at 280 K and 1.14 eV (I–V)/1.17 (C–V) at 430 K. The series resistance (R S) values determined by Cheung’s functions are in good agreement with each other. The difference between BHs estimated by I–V and C–V methods are also discussed. Results show that the estimated interface state density (N SS) of MIS diode decreases with an increase in temperature. Observations have indicated that the BH increases whereas ideality factor R S and N SS decreases with increasing temperature. Results have demonstrated that the reverse leakage current is dominated by Poole–Frenkel emission at temperatures of 280–340 K and by Schottky emission at temperatures of 370–430 K. It is also noted that there is a transition of the conduction mechanism in Au/BST/GaN MIS diode from Poole–Frenkel to Schottky emission at temperatures of 340–370 K.

Effective surface treatment for GaN metal–insulator–semiconductor high-electron-mobility transistors using HF plus N2 plasma prior to SiN passivation

An effective surface cleaning technique is demonstrated for the GaN metal–insulator–semiconductor high-electron-mobility transistor (MIS-HEMT) passivation process. In this study, dilute HF solution and in situ N2 plasma treatments were adopted to remove the native oxide and recover the nitrogen-vacancy defects at the GaN surface before device passivation. To investigate the correlation between the properties of the SiN/GaN interface and the device performance, the GaN MIS-HEMTs were characterized using current–voltage (I–V) measurement, capacitance–voltage (C–V) measurement, and X-ray photoelectron spectroscopy (XPS) analysis. With the application of this surface treatment technique, the device exhibits improved I–V characteristics with low leakage current, low dynamic ON-resistance, and good C–V response with a steep slope. Overall, the results reveal that the oxide-related bonds and nitrogen-vacancy defects at the SiN/GaN interface are the root cause of the GaN MIS-HEMTs performance degradation.

Effect of high voltage stress on the DC performance of the Al2O3/AlN GaN metal–insulator–semiconductor high-electron mobility transistor for power applications

We demonstrate an Al2O3/AlN/AlGaN/GaN metal–insulator–semiconductor high-electron mobility transistor (MIS-HEMT) device with stable electrical properties under high-voltage stress, by using an Al2O3/AlN stack layer as the gate dielectric layer. Excellent quality AlN/Al2O3 GaN interface was obtained by using plasma-enhanced ALD (PE-ALD), resulting in a very low interface trap density (Dit) of ∼1.8 × 1011 eV−1 cm−2, obtained by using the conductance method. The device exhibits a small threshold voltage hysteresis of ∼200 mV and a lower gate–source leakage current. No obvious changes in the drain–source current and ON-resistance were observed for the device that was subject to the drain–source voltage stress of 100 V for 15 h.

Dynamic Performance of AlN-Passivated AlGaN/GaN MIS-High Electron Mobility Transistors Under Hard Switching Operation

High-frequency and high-temperature dynamic performance of plasma-enhanced atomic layer deposition AlN-passivated enhancement-mode GaN metal–insulator–semiconductor high electron mobility transistors (MIS-HEMTs) has been investigated under hard switching conditions. Low dynamic ON-resistance ( $R_{{\mathrm{{\scriptscriptstyle ON}}}})$ degradation with small frequency dispersion and weak temperature dependence is obtained. The effectiveness of AlN passivation in suppressing current collapse is proved even under hard switching operations, which, according to other reports of SiN x -passivated devices, could worsen the dynamic $R_{{\mathrm{{\scriptscriptstyle ON}}}}$ degradation due to the trapping of additional hot electrons.

Surface Plasmon-Enhanced GaN Metal–Insulator–Semiconductor Ultraviolet Detectors With Ag Nanoislands Embedded in a Silicon Dioxide Gate Layer

GaN metal–insulator–semiconductor ultraviolet (UV) photodetectors (PDs) with silver (Ag) nanoislands on a silicon dioxide $({\rm SiO}_{2})$ gate layer were fabricated and characterized. Samples with different Ag mass thickness values were prepared on ${\rm SiO}_{2}$ /sapphire template substrates and characterized by transmission spectral to confirm the surface plasmon resonance (SPR) effect. By examining the transmission spectra of Ag nanoislands on the ${\rm SiO}_{2}$ /sapphire substrates, two transmission dips were observed in each spectrum. The transmission dip in the blue region was more significant than that in the UV region, but visible light with photon energy less than the bandgap of GaN was not absorbed to generate significant response. By introducing the Ag nanoislands, the UV-to-visible rejection ratio $(R_{{\rm UV/vis}})$ of spectral responsivity was at least ten times higher than those of PDs without Ag nanoislands. The $R_{{\rm UV/vis}}$ enhancement was mainly due to the increase in UV response caused by SPR at approximately 360 nm induced by Ag nanoislands to enhance UV-light absorption.

Characterization of electronic states at insulator/(Al)GaN interfaces for improved insulated gate and surface passivation structures of GaN-based transistors

This paper presents a systematic characterization of electronic states at insulators/(Al)GaN interfaces, particularly focusing on insulator/AlGaN/GaN structures. First, we review important results reported for GaN metal–insulator–semiconductor (MIS) structures. SiO2 is an attractive material for MIS transistor applications due to its large bandgap and high chemical stability. In-situ SiNx is effective for improving the operation stability of high electron mobility transistors (HEMTs). Meanwhile, Al2O3/GaN structures have high band offsets and low interface state densities, which are also desirable for insulated gate applications. We have proposed a calculation method for describing capacitance–voltage (C–V) characteristics of HEMT MIS structures for evaluating electronic state properties at the insulator/AlGaN interfaces. To evaluate near-midgap states at insulator/AlGaN interfaces, a photo-assisted C–V technique using photon energies less than the bandgap of GaN has been developed. Using the calculation in conjunction with the photo-assisted C–V technique, we estimate interface state density distributions at the Al2O3/AlGaN interfaces.