The ultra-wide bandgap (UWBG) semiconductor, β-gallium oxide, has shown great potential in power devices due to its excellent electrical properties and availability of high-quality single-crystalline substrates. Significant progress has been made in the development of β-Ga2O3 metal-oxide-semiconductor (MOS) devices, but further progress will require optimization of the gate-dielectric interface. In this talk, I will describe the investigation of HfO2 dielectric reliability on β-Ga2O3 for future power devices. I fabricated β-Ga2O3 (010) MOS capacitors with atomic layer deposited (ALD) HfO2 and used capacitance-voltage (C-V) and current density-voltage (J-V) techniques to analyze the electrical reliability of ALD HfO2/β-Ga2O3 MOSCAPs. Positive bias stress measurements indicated that HfO2/β-Ga2O3 MOSCAPs are more susceptible to charge trapping at lower electric stress fields compared to HfO2/Si MOSCAPs, likely due to the smaller conduction band offset between HfO2 and β-Ga2O3. Initial flatband voltage shifts were observed for C-V sweeps of HfO2/β-Ga2O3 MOSCAPs, showing the significance of border traps within the dielectric. The lack of mobile holes in the β-Ga2O3 impedes the recombination of these trapped charges in the dielectric while the MOSCAP is in depletion. We observed full recovery from stress-induced charge trapping in the HfO2/β-Ga2O3 MOSCAPs upon deep ultra-violet illumination. The negative valence band offset between the dielectric and semiconductor allows the recombination of photo-generated holes with the trapped dielectric charges [1]. Because many fabrication steps require high temperature processing, we also investigated the thermal reliability of the ALD HfO2/β-Ga2O3 (010) interface. Negligible Ga atom diffusion was observed in secondary ion mass spectrometry (SIMS) depth profiles for anneals at temperatures up to 850°C in N2 environment for 10 minutes. Significant Ga diffusion into the HfO2 layer was observed upon annealing at 900°C, resulting in a severely degraded MOS structure. Additional analysis was performed to investigate the impact of high temperature processing on the MOS electrical characteristics [2].H.N.M was supported by a National Science Foundation Graduate Research Fellowship under Grant No. DGE 1256260. Any opinions, findings, and conclusions or recommendations expressed in this material are those of the authors and do not necessarily reflect the views of the National Science Foundation. Portions of this work were performed at the Lurie Nanofabrication Facility and J. D. Hanawalt X-Ray MicroAnalysis Laboratory, which are supported by the College of Engineering at the University of Michigan.[1] H. N. Masten, J. D. Phillips, and R. L. Peterson, “Charge trapping and recovery in ALD HfO2/β-Ga2O3 (010) MOS capacitors,” Semicond. Sci. Technol., vol. 36, no. 4, p. 04LT01, Mar. 2021, doi:10.1088/1361-6641/abe880.[2] H. N. Masten, J. D. Phillips, and R. L. Peterson, “Effects of High Temperature Annealing on the Atomic Layer Deposited HfO2 /β-Ga2O3 (010) interface,” Journal of Applied Physics, Accepted.
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