Future Semiconductor Devices Research Articles

Tuning the electronic properties of armchair boron phosphide nanoribbons via H/O/F passivation and Stone–Wales defect

To explore the possibility of various edge-passivating elements for armchair boron phosphide nanoribbons (ABPNR), we performed first-principles computation under the flagship of density functional theory. The bare and H, O, F-passivated structures were considered for the present calculations. The possibility of probable edge-passivation using these elements was assured by the binding energy analysis. Moreover, O emerges as the most efficient passivating element which is stable by more than 400 meV over F-passivation for nanoribbons of smallest width. It is predicted that considered passivating elements affected structural as well as electronic properties of the ABPNR. It is observed that O-passivation leads to narrow band gap behavior while F-passivations yields a band gap of 1.07 eV to 1.55 eV. The Stone–Wales defects are also discussed, showcasing their potential to tune the electronic properties of ABPNR for future semiconductor devices.

Effect of Thickness and Sidewall Slope of Photoresist Mask on Etch Profile of Copper Interconnect

We performed high density plasma reactive ion etching of copper thin films using organic gas mixture to define fine patterns less than 10 μm for the application of display devices. However, since redeposition in dry etching of copper thin films frequently occurs due to extremely low reactivity, the etch variables which affect the formation of redeposition were investigated. In this study, the photoresist (PR) masks were employed to etch copper thin films. The effects of the thickness of PR and the sidewall slope of PR on etch profile and redeposition were examined.The thickness of PR mask were in the range of 3 μm ~ 1 μm and the sidewall slopes of the PR mask were in the range of 90° ~ 45°. The etch profile and etch mechanism of dry etching using different masks were evaluated using field emission scanning electron microscopy and X-ray photoelectron spectroscopy. Finally, an etching method to reduce and/or avoid the redeposition in dry etching of copper thin films will be proposed.Acknowledgement : This research was supported by the MOTIE(Ministry of Trade, Industry & Energy (20019504) and KSRC(Korea Semiconductor Research Consortium) support program for the development of the future semiconductor device.

In Situ transmission Electron Microscope Observation of Biased-Induced Dynamic Evolution of Two-Dimensional CrS2

Two-Dimensional transition-metal dichalcogenides (2D-TMDs) have attracted great attention recently owing to their potential to become the important material for next generation semiconductor devices. While using the device, it needs to ensure high density current and biased voltage for a long time. However, the study on TMDs in high-energy environment is insufficient. In this work, the phase evolution of CrS2 are revealed via in-situ biasing experiments and recorded by transmission electron microscope (TEM) at atomic scale. The ultra-thin layered (~1.6nm) CrS2 was synthesized through atmospheric pressure chemical vapor deposition (APCVD), followed by transferring the as-grown samples onto specialized TEM electrical chips. The TEM characterization of CrS2 initial sample provided the basic understanding of this Cr-based TMD, identified as pure 1T phase with single crystal structure as shown in Figure 1. The advanced in situ technique was employed to record the structural evolution and was tested the endurance of CrS2 during biasing. Moreover, the results can make significant contributions to future semiconductor device designs and demonstrate CrS2 has great potential as a semiconductor device with its outstanding characteristic of biased-endurance. Figure1. (a) Low-magnification TEM image of 1T-CrS2. (b) High-resolution TEM image of 1T-CrS2, corresponding with FFT along [001] zone axis. (c) AFM image of the as-grown CrS2 sample, blue bar in the image is X axis of (d). (d) AFM height profile of as-grown 1T-CrS2 with average thickness of~1.6nm. (e) STEM image of 1T-CrS2 and shows d-spacing~0.336 nm. (f) Low-magnification TEM image of the device, showing that the transferred CrS2 layer was suspended on the membrane with Au electrodes on both sides. (g,h) In-situ TEM observation of the biasing experiment after 5V biasing for 5 min of 1T-CrS2. Time-sequencing TEM images showing the structural evolution of biasing. The inset shows the corresponding FFT-DP to reveal the variation of crystallinity of the sample. (g) Initial structure of 1T-CrS2. (h) 1T-CrS2 under in-situ biasing experiment after 10 minutes. Figure 1

Electrochemical Weakening Material Strength for Accelerated Thinning of Silicon Carbide Substrates

This paper presents a novel approach to expedite the thinning of silicon carbide (SiC) substrates, a crucial step in enhancing material performance and extending chip longevity by reducing volume resistivity. The traditional methods of SiC substrate thinning, such as diamond wheel grinding and plasma etching, have inherent limitations, including the risk of wafer breakage and high processing costs. In response to these challenges, we propose an innovative technique involving the electrochemical etching attenuation of SiC strength, offering a cost-effective and efficient solution.In this study, we employed an electrochemical method to initially weaken the SiC substrate from the surface to a defined depth, followed by fine-tuning its thickness using a conventional diamond grinding wheel. Remarkably, our results demonstrate that SiC substrates subjected to electrochemical treatment exhibit well-structured lattices free from residual stresses. This novel approach not only reduces the risk of wafer breakage but also enhances the material's integrity (Figure 1).To gain deeper insights into the effects of electrochemistry on SiC material strength, advanced characterization techniques, including scanning electron microscopy, were employed. Our findings reveal that the electrochemically treated SiC surface exhibits a sponge-like morphology, with a cross-sectional profile showcasing prominent columnar structures (Figure 2). This sponge-like structure is attributed to the removal of silicon atoms during anodization, affirming the effectiveness of electrochemical methods in rapidly attenuating the material strength of SiC substrates, thereby facilitating their efficient thinning through grinding without compromising substrate integrity.In summary, this research highlights the potential of electrochemical methodologies for the initial weakening of SiC substrates, leading to accelerated and cost-effective thinning processes. This breakthrough not only expedites SiC substrate thinning but also contributes significantly to the advancement of SiC substrate thinning and grinding techniques, promising substantial benefits for future semiconductor device fabrication. Figure 1

Etch Characteristics of Cobalt Thin Films in High Density Plasma of Cl2/O2/Ar Gas Mixture

Inductively coupled plasma reaction ion etching (ICP-RIE) of cobalt thin films patterned with SiO2 hard masks was performed using Cl2/O2/Ar gas mixture. The etch characteristics of cobalt films in Cl2/Ar gas were examined to determine the roles of Cl2 and O2, respectively. The etch rates and etch profiles of cobalt films were investigated by varying the O2 concentration in Cl2/O2/Ar gas mixture.In the optimized Cl2/Ar gas mixture, systematic etching of cobalt films was performed by changing the etch parameters including ICP RF power, DC-bias voltage, and process pressure. As the DC-bias voltage and process pressure was increased, the etch rate increased and the etch profile improved. Through the etching parameters variation experiment, the etching properties were investigated by adding O2 to Cl2/Ar under optimized conditions. X-ray photoelectron spectroscopy and optical emission spectroscopy were used to investigate the etch mechanism in the Cl2/O2/Ar gas mixture. In addition, scanning probe microscope was used to observe roughness on the etched cobalt surface. Finally, the etching of cobalt films patterned with nanometer-scale in the optimized Cl2/O2/Ar gas mixture was successfully achieved with good etch profile.AcknowledgmentThis research was supported by the Ministry of Trade, Industry & Energy (MOTIE) (20019504) and Korea Semiconductor Research Consortium (KSRC) support program for the development of future semiconductor devices. This work was supported by Korea Institute for Advancement of Technology (KIAT) grant funded by the Korea Government (MOTIE) (P0008458, HRD Program for Industrial Innovation).

Atomic Precision Processing of Two-Dimensional Materials for Next-Generation Microelectronics.

The growth of the information era economy is driving the pursuit of advanced materials for microelectronics, spurred by exploration into "Beyond CMOS" and "More than Moore" paradigms. Atomically thin 2D materials, such as transition metal dichalcogenides (TMDCs), show great potential for next-generation microelectronics due to their properties and defect engineering capabilities. This perspective delves into atomic precision processing (APP) techniques like atomic layer deposition (ALD), epitaxy, atomic layer etching (ALE), and atomic precision advanced manufacturing (APAM) for the fabrication and modification of 2D materials, essential for future semiconductor devices. Additive APP methods like ALD and epitaxy provide precise control over composition, crystallinity, and thickness at the atomic scale, facilitating high-performance device integration. Subtractive APP techniques, such as ALE, focus on atomic-scale etching control for 2D material functionality and manufacturing. In APAM, modification techniques aim at atomic-scale defect control, offering tailored device functions and improved performance. Achieving optimal performance and energy efficiency in 2D material-based microelectronics requires a comprehensive approach encompassing fundamental understanding, process modeling, and high-throughput metrology. The outlook for APP in 2D materials is promising, with ongoing developments poised to impact manufacturing and fundamental materials science. Integration with advanced metrology and codesign frameworks will accelerate the realization of next-generation microelectronics enabled by 2D materials.

Low‐temperature chemical vapor deposition growth of 2D materials

AbstractTwo‐dimensional (2D) materials have atomic thickness, and thickness‐dependent electronic transport, optical and thermal properties, highlighting great promise applications in future semiconductor devices. Chemical vapor deposition (CVD) is considered as an industry‐oriented method for macro‐synthesis of 2D materials. In conventional CVD, high temperatures are required for the synthesis of high‐quality large‐size 2D materials, which is incompatible with of back‐end‐of‐line of the complementary metal oxide semiconductor (CMOS) techniques. Therefore, low‐temperature synthesis of 2D materials is of critical importance for the advancement toward practical applications of 2D materials with the CMOS technologies. In this review, we focus on strategies for the low‐temperature growth of 2D materials, including the use of low‐melting‐point precursors, metal‐organic CVD, plasma‐enhanced CVD, van der Waals‐substrate vapor phase epitaxy, tellurium‐assisted CVD, salt‐assisted CVD, etc., with discussions of their reaction mechanisms, applications, associated advantages, and limitations. We also provide an outlook and perspectives of future low‐temperature chemical vapor deposition growth of 2D materials.

Clarification of Au dimer adsorption sites on Si (111)-7 × 7 surface by AFM/KPFM

Atomic-scale surface adsorption has been a significant research topic in recent years, with a particular emphasis on the adsorption properties of Au/Si(111)-7 × 7, which are vitally important for pioneering future novel semiconductor devices. Here, we investigated the adsorption of Au dimers on the Si(111)-7 × 7 surface with atomic resolution using non-contact atomic force microscopy and Kelvin probe force microscopy at room temperature. Our results show that the Au dimer adsorbs in the vicinity of the Si rest atoms, exhibiting a distinct localized electron distribution. In density functional theory calculations, three candidate Au dimer adsorption sites have been identified, and the most stable site of Au dimer adsorption aligns with experimental findings. Furthermore, the local electron transfer of Au dimer adsorption has been analyzed, confirming the distribution of electrons around the Au dimer adsorption site. This research reveals that the structure and charge transfer of adsorbed Au dimers on Si(111)-7 × 7 provide insight into the mechanism of the metal-semiconductor system.

Controlled lattice deformation for high-mobility two-dimensional MoTe2 growth

Two-dimensional (2D) MoTe2 shows great potential for future semiconductor devices, but the lab-to-fab transition is still in its preliminary stage due to the constraints in the crystal growth level. Currently, the chemical vapor deposition growth of 2D MoTe2 primarily relies on the tellurization process of Mo-source precursor (MSP). However, the target product 2H-MoTe2 from Mo precursor suffers from long growth time and suboptimal crystal quality, and MoOx precursor confronts the dilemma of unclear growth mechanism and inconsistent growth products. Here, we developed magnetron-sputtered MoO3 film for fast and high-mobility 2H-MoTe2 growth. The solid-to-solid phase transition growth mechanism of 2D MoTe2 from Mo and MoOx precursor was first experimentally unified, and the effect mechanism of MSPs on 2D MoTe2 growth was systematically elucidated. Compared with Mo and MoO2, the MoO3 precursor has the least Mo-unit lattice deformation and exhibits the optimal crystal quality of growth products. Meanwhile, the lowest Gibbs free energy change of the chemical reaction results in an impressive 2H-MoTe2 growth rate of 8.07 μm/min. The constructed 2H-MoTe2 field-effect transistor array from MoO3 precursor showcases record-high hole mobility of 85 cm2/(V·s), competitive on-off ratio of 3×104, and outstanding uniformity. This scalable method not only offers efficiency but also aligns with industry standards, making it a promising guideline for diverse 2D material preparation towards real-world applications.

High-Temperature Reliability of Nano-Ag Sintered Joints on Ag-Plated Cu Substrates

As an emerging lead-free packaging interconnect material, Nano-Ag paste exhibits superior high-temperature mechanical, electrical, and thermal properties. It can meet the stringent high-temperature and high-density packaging requirements of future high-power semiconductor devices and is garnering widespread attention. However, research on the high-temperature reliability of sintered joints remains rather limited. In this study, we fabricated high-strength hot-press sintered nano-Ag joints using a hot-press sintering process. These joints underwent aging at high temperatures of 200°C and 300°C, yielding insights into the variations in mechanical properties at different temperatures. The reasons behind joint failure were analyzed by investigating the evolution of joint microstructures and fracture surfaces. The results indicate that even after extended aging at 200°C, the joint strength can still be maintained at 176 MPa. However, after aging for over 100 hours at 300°C, the joint fails. The growth of Cu oxides was observed within the joint microstructure, which constitutes the primary cause of joint failure at 300°C.

Atomic Layer Etching of Al2O3 Using F Radical and Al Precursors: Surface Reaction and Reaction Mechanism Study

In order to overcome the miniaturization of semiconductor devices, devices with a three-dimensional (3D) structure, such as FinFET and 3D vertical NAND devices, were introduced. The manufacturing of 3D devices requires both anisotropic etching in the vertical direction and isotropic etching in the horizontal direction. Therefore, a new technology with atomic-level precision is required for isotropic etching, which is dependent on wet etching. It is the thermal atomic layer etching (ALE) process that meets these requirements. Since the first report in 2016, the thermal ALE processes by alternating exposures to HF vapor and a metal precursor have been reported for various thin films. However, HF has issues with safety and corrosion. Recently, ALE processes using F radicals produced by inductively coupled plasma (ICP) of SF6 or NF3 have been reported [1,2]. However, the study on the reaction mechanism of F radicals is lacking. In this study, the surface reaction was studied for the modification and removal steps by NF3 remote plasma and Al precursors. We used quartz crystal microbalance (QCM) to measure the mass change during the ALE process and X-ray photoelectron spectroscopy (XPS) to analyze the composition of the modified layer. The mechanism of ALE using F radical was different from that using HF, due to the absence of H atoms. Density functional theory (DFT) simulation shows that amorphous carbon or fluorocarbon layer can be formed during the ALE by F radicals. Al precursor with fewer organic ligands was beneficial to suppress the formation of a carbon-containing surface layer. Acknowledgments This research was supported by the MOTIE (Ministry of Trade, Industry & Energy (project number 20012588) and KSRC (Korea Semiconductor Research Consortium) support program for the development of the future semiconductor device.

Controlling Diameter and Morphology of Colloidal-Silica-Abrasives Via Designing Surfactant Functional Group

As the design rule of logic semiconductor has been scaled down toward 5, 3, 2.1, 1.5, and 1.0 nm, the line width of Cu-film as interconnect line of logic semiconductor has been rapidly scaled down toward 36, 32, 24, 20 and 16 nm. The CMP of the Cu-lines is essential fabrication process, challenging an achievement of dishing and erosion during Cu-film CMP. In particular, the dishing and erosion of the Cu-film CMP has been principally affected by the diameter and morphology of colloidal-silica-abrasives in a CMP slurry. In a conventional synthesis method synthesis of colloidal-silica-abrasives, ethoxysilanol was formed via the hydrolysis reaction by Tetraethyl orthosilicate(TEOS) and H2O producing ethoxysilanol, following the condensation reaction between two ethoxysilanol. The diameter of colloidal-silica-abrasives could be obtained by adjusting the concentrations of TEOS, alcohol, and alkali catalyst, but the solid loading of colloidal-silica-abrasives could be varied. Thus, in our study, a novel synthesis method of the colloidal-silica-abrasives was designed by adding a charged functional group surfactant during the conventional colloidal-silica-abrasives synthesis method. The effect of the surfactant having negative charged carboxyl functional group (i.e. Ethylenediaminetetraacetic acid: EDTA) on the diameter and morphology of the colloidal-silica-abrasives were investigated as function of the EDTA concentration; i.e. when the concentration of EDTA increased from 0 to 0.03 wt%, the diameter of colloidal-silica-abrasives increased from 47.0 to 103.8 nm and the solid loading of colloidal-silica-abrasives increased from 2.0 to 2.36 wt%, as shown in Fig. 1. In addition, when the ETDA concentration increased above 0.0025 wt%, the morphology of colloidal-silica-abrasives was transformed from cocoon shape to spherical shape. Furthermore, the effect of the surfactant having the positive charged amine functional group (i.e. Triethanolamine: Tri-ETA, Ethylenediamine: EDA, Diethylenetriamine: DETA, Triethylenetetramine: TETA) were estimated as function of the number of amine functional group in the surfactant, as shown in Fig. 2. When the number of positive charged amine functional groups increased 0 to 4, the diameter of colloidal-silica-abrasives increased from 67.2 to 143.86 nm and the solid loading of colloidal-silica-abrasives increased from 2.0 to 2.2 wt%. In addition, the synthesis with positive charged amine functional group was transformed from cocoon shape to spherical shape. The synthesis mechanism, the enhanced polishing rate of Cu-film surface, dishing and erosion after Cu-film will be presented in detail. Acknowledgement This research was supported by the MOTIE(Ministry of Trade, Industry & Energy (1415180388) and KSRC(Korea Semiconductor Research Consortium) (20019474) support program for the development of the future semiconductor device. Figure 1

Rapid grinding diamond film using a grinding wheel containing nickel-plated diamond abrasives based on mechanochemical effect

The excellent properties of diamond make it a highly promising substrate material for future sensors and semiconductor devices. The surface roughness of the substrate material directly impacts the performance of the devices. Therefore, achieving efficient and low-damage processing of diamonds is crucial. However, diamond has high hardness and chemical inertness, which makes it difficult to process. To tackle the above-mentioned problem, the diamond film was ground using a grinding wheel containing nickel (Ni)-plated diamond abrasives based on the mechanochemical effect. The maximum average material removal rate of the diamond film reached 2469 nm/min under a grinding pressure of 600 N at a speed of 600 rpm, and the minimum average surface roughness of the diamond film reached 3.93 nm under 500 N 600 rpm. The rapid reaction removal of the diamond film can be attributed to the catalytic effect of the Ni plating, inducing graphitization of the diamond film at the interface contact points under the generated high temperature during friction; subsequently, it can be removed under the mechanical action of the abrasives. This work has tremendous potential for the efficient and low-damage grinding of diamond films.

(Invited, Digital Presentation) Low-Temperature Direct Bonding of Wide-Bandgap Semiconductor Substrates

Low-temperature direct bonding technique of semiconductor substrates has been developed to integrate dissimilar materials (e.g. Si, Ge, III-V) regardless of lattice and thermal expansion mismatches. Among the direct bonding techniques, a hydrophilic bonding method, which initiates a dehydration reaction between OH-terminated substrates, is commonly used because wafer-scale bonding can be fabricated under atmospheric conditions. Recently, our research group achieved direct bonding of wide-gap materials, including SiC, GaN, β-Ga2O3, and diamond substrates, by using this bonding method.The hydrophilic bonding of Si wafers has been practically applied for the fabrication of silicon-on-insulator substrates. In the bonding process, the Si substrates are typically irradiated with reactive ion etching using oxygen plasma, which efficiently generates OH groups on the surface. By contacting the substrates under atmospheric conditions, the activated surfaces can adhere to each other by hydrogen bonds across the OH groups. The annealing at ~200 °C causes the dehydration reaction and forms atomic bonds between the substrates, as shown in the following equation.Si-OH + HO-Si → Si-O-Si +H2OThe bonding process generates a sub-10-nm-thick SiOx layer at the bonding interface, which limits thermal and electrical conductance between the bonding substrates.Our research group demonstrated that the diamond substrates can be bonded with other semiconductor substrates (e.g. Si, InP, β-Ga2O3) by the hydrophilic bonding method. The pre-bonding treatment using oxygen plasma is not suitable for the diamond surface because it is easily etched by the strong oxidizing treatment. Meanwhile, the mild oxidizing treatment using H2SO4/H2O2 (i.e. piranha solution) and NH3/H2O2 (i.e. SC1) mixtures enables OH termination of the diamond substrate without a significant increase in the surface roughness. Figure A shows the photograph of the diamond substrate bonded on the Si substrate. At the Si/diamond and InP/diamond bonding interfaces, ~3-nm-thick SiOx and InPOx layers were observed by an electron microscope, respectively, as displayed in Figure B. These oxide layers were formed by the oxidizing treatment at the pre-bonding step.However, when β-Ga2O3 and diamond substrates were bonded, such an oxide intermediate layer was not observed at the bonding interface. This is because diamond never develops the oxide layer and β-Ga2O3 is an oxide material. As shown in Figure C, we achieved the direct bonding of monocrystalline β-Ga2O3 and diamond substrates with an amorphous intermediate layer thinner than 1 nm. As the intermediate layer was atomically thin, efficient electrical and thermal conductance across β-Ga2O3/diamond substrates was possible, as plotted in Figure D.Qiushi Kang et al. demonstrated that the hydrophilic bonding of the SiC substrate is possible by using oxygen plasma. This treatment develops the ~4-nm-thick SiOx layer on the SiC substrate, which possibly became a thermal and electrical barrier at the bonding interface. However, our research group revealed that the SiC substrate dipped into HF acid can form direct bonding with an atomically thin intermediate layer. It is known that the SiC surface is OH terminated after the removal of the native oxide layer by HF acid, unlike the Si substrate. We revealed that the HF-dipped SiC substrate can form direct bonding with the O2-plasma-activated β-Ga2O3 substrate through an intermediate layer as thin as 1 nm. as displayed in Figure E.About the GaN substrate, we have demonstrated that hydrophilic bonding with the Si substrate is possible using oxygen and nitrogen plasma activations. In addition, the GaN substrate dipped into H2SO4/H2O2 and NH3/H2O2 mixtures can also form direct bonding. The thickness of the GaOx layer at the GaN/Si bonding interface was approximately 1 nm.We believe the low-temperature direct bonding technique will contribute to future wide-bandgap semiconductor devices because it is possible to achieve efficient electrical and thermal conduction across dissimilar materials. Figure 1

Metal 3D nanoprinting with coupled fields

Metallized arrays of three-dimensional (3D) nanoarchitectures offer new and exciting prospects in nanophotonics and nanoelectronics. Engineering these repeating nanoarchitectures, which have dimensions smaller than the wavelength of the light source, enables in-depth investigation of unprecedented light–matter interactions. Conventional metal nanomanufacturing relies largely on lithographic methods that are limited regarding the choice of materials and machine write time and are restricted to flat patterns and rigid structures. Herein, we present a 3D nanoprinter devised to fabricate flexible arrays of 3D metallic nanoarchitectures over areas up to 4 × 4 mm2 within 20 min. By suitably adjusting the electric and flow fields, metal lines as narrow as 14 nm were printed. We also demonstrate the key ability to print a wide variety of materials ranging from single metals, alloys to multimaterials. In addition, the optical properties of the as-printed 3D nanoarchitectures can be tailored by varying the material, geometry, feature size, and periodic arrangement. The custom-designed and custom-built 3D nanoprinter not only combines metal 3D printing with nanoscale precision but also decouples the materials from the printing process, thereby yielding opportunities to advance future nanophotonics and semiconductor devices.

A Cleaning Method for Post-Etch Ruthenium Residue Removal Using UV and Liquid Chemical

As semiconductor devices continue to scale, it is important to evaluate alternative metals on narrower wiring or via structures. Ruthenium (Ru) is one promising candidate because of its lower resistivity compared to the conventional metals such as copper (Cu), cobalt (Co) and tungsten (W) on narrow space. To prevent leakage problems between metal layers caused by residues on the bottom and sidewalls after the metal patterning process, a cleaning process for Ru metal lines is necessary. Although the industry standard using Ammonia Peroxide Mixture (APM) is effective for removing residues, it was ineffective for Ru semi-damascene stack. Therefore, a new cleaning method involving UV treatment followed by APM, which was tested on metal pitch 18 nm patterned structure, was developed. This method showed promising results and is expected to be used in manufacturing of future semiconductor devices.

Investigation of high-performance Schottky diodes on a Ga2O3 epilayer using Cu with high barrier height, high temperature stability and repeatability

This work reports on high-performance Schottky barrier diodes (SBDs) fabricated on Ga2O3 epilayers using Cu as Schottky contacts (SCs). The fabricated SBDs exhibited high Schottky barrier heights (SBHs) with values greater than 1.0 eV, near-unity ideality factors, and a high rectification ratio (RR) of 1012 at 300 K. Temperature-dependent current–voltage (I–V–T) and capacitance–voltage (C–V–T) measurements were performed up to 500 K. The SBHs’ , calculated from the IVT characteristics, initially increased with temperature and then decreased with near-unity ideality factors. The increase in with temperatures up to 410 K indicated the spatial inhomogeneity at the metal–semiconductor interface. The observed decrease in above 410 K indicated the enhancement of barrier homogeneity at higher temperatures (⩾410 K). The decrease in above 410 K and decrease in , calculated from the CVT characteristics, with increasing temperature were assigned to the bandgap narrowing of Ga2O3. The IVT measurements were repeated many times, and the SBDs exhibited excellent thermal stability and showed high SBHs >1.0 eV, a high RR, and near-unity ideality factors. All these findings were attributed to the formation of high-work-function copper oxide thin film at the interface between Cu and Ga2O3. X-ray diffraction and x-ray photoelectron spectroscopy revealed the formation of a thin layer of high-work-function copper oxide. These findings provide the possibility to fabricate an SC with a high and homogeneous barrier and thermal stability using cheap, abundant Cu material, enabling low-cost mass production of future power semiconductor devices based on oxide semiconductors.

300 mm-wafer metrology for area-selective deposition in nanoscale patterns: A case study for ruthenium atomic layer deposition

Area-selective deposition (ASD) is a possible enabler for the fabrication of various future semiconductor devices. However, it remains challenging to characterize and optimize ASD processes in patterns with nanoscale dimensions, as required for semiconductor device applications. Therefore, we study Ru ASD on different types of nanopatterns on 300 mm-wafers and assess the role of the pattern geometry and density on selectivity. As selectivity is often improved by means of passivation-deposition-etch cycles, we investigate an ASD cycle consisting of passivation by (N,N-dimethylamino)trimethylsilane, deposition by (ethylbenzyl)(1-ethyl-1,4-cyclohexadienyl)Ru/O2 atomic layer deposition (ALD) and an O/Cl plasma etch. On line-space patterns with a 32 nm critical dimension, the passivation-deposition-etch cycle yields a lower defectivity level than the passivation-deposition approach for a given Ru ASD thickness. The comparison of Ru ASD on line-space and hole nanopatterns reveals the pattern-dependent selectivity, that is explained by accumulation of Ru nanoparticles at pattern edges. 300 mm-wafer uniformity is also investigated and related to reactor design. The investigation of ASD on nanopatterned 300 mm-wafers is enabled by ASD-specific developments of X-ray photoelectron spectroscopy, optical critical dimension scatterometry, and scanning electron microscopy. This research highlights the possibilities and challenges in developing ASD processes in an industrial setting.

Reaction mechanism and film properties of the atomic layer deposition of ZrO2 thin films with a heteroleptic CpZr(N(CH3)2)3 precursor

The surface reaction of a heteroleptic precursor in the atomic layer deposition (ALD) of ZrO2 has been investigated using atomically thin films for scaled-down semiconductor devices. Heteroleptic precursors have been widely used in ALD. Because different ligands in heteroleptic precursors have different reaction pathways, understanding the surface reaction is crucial. In this study, we investigate the growth mechanisms of thin films using a CpZr(N(CH3)2)3 precursor with different reactants, such as H2O and O2 plasma. Chemical composition, surface roughness, film density, and microstructures were analyzed through electron microscopy and X-ray techniques together with quantum chemical calculations to elucidate the ZrO2 growth mechanism. The results showed that the reaction pathway of Zr–Cp ligand exchange with surface hydroxyl groups is less favorable than the Zr–N(CH3)2 reaction pathway. Furthermore, H2O molecules showed less effective oxidation reactions with Cp ligands than with alkyl amide ligands. In contrast, all the ligands were completely removed, resulting in negligible impurity incorporation, as revealed via X-ray photoelectron spectroscopy, when O2 plasma was used, leading to an improved leakage current (30-fold reduction). We believe that these findings on the surface reactions of heteroleptic ALD precursors will be helpful for developing future scaled-down semiconductor devices.

A High-Quality Dopant-Free Electron-Selective Passivating Contact Made from Ultra-Low Concentration Water Solution

Crystalline silicon solar cells produced by doping processes have intrinsic shortages of high Auger recombination and/or severe parasitic optical absorption. Dopant-free carrier-selective contacts (DF-CSCs) are alternative routines for the next generation of highly efficient solar cells. However, it is difficult to achieve both good passivating and low contact resistivity for most DF-CSCs. In this paper, a high-quality dopant-free electron-selective passivating contact made from ultra-low concentration water solution is reported. Both low recombination current (J0) ~10 fA/cm2 and low contact resistivity (ρc) ~31 mΩ·cm2 are demonstrated with this novel contact on intrinsic amorphous silicon thin film passivated n-Si. The electron selectivity is attributed to relieving of the interfacial Fermi level pinning because of dielectric properties (decaying of the metal-induced gap states (MIGS)). The full-area implementation of the novel passivating contact shows 20.4% efficiency on a prototype solar cell without an advanced lithography process. Our findings offer a very simple, cost-effective, and efficient solution for future semiconductor devices, including photovoltaics and thin-film transistors.