Front-end Performance Research Articles

Conceptual framework for enhancing front-end web performance: Strategies and best practices

This review paper presents a conceptual framework for optimizing front-end web performance, emphasizing the critical strategies of code splitting, lazy loading, caching, and other optimization techniques such as minification and image optimization. The paper explores the importance of front-end performance in enhancing user experience, reducing load times, and increasing user engagement, which is vital for driving the digital economy forward. Through a detailed analysis of key performance metrics and the challenges in optimizing front-end performance, the paper underscores how integrating multiple strategies can lead to comprehensive optimization. The discussion includes practical guidelines for prioritizing and implementing these strategies based on specific project needs, ensuring a holistic approach to performance. Furthermore, the paper examines the economic impact of optimized front-end performance, showcasing real-world examples and future trends, such as progressive web apps and machine learning, shaping the next generation of web development.

An Open-Source ML-Based Full-Stack Optimization Framework for Machine Learning Accelerators

Parameterizable machine learning (ML) accelerators are the product of recent breakthroughs in ML. To fully enable their design space exploration (DSE), we propose a physical-design-driven, learning-based prediction framework for hardware-accelerated deep neural network (DNN) and non-DNN ML algorithms. It adopts a unified approach that combines power, performance, and area (PPA) analysis with frontend performance simulation, thereby achieving a realistic estimation of both backend PPA and system metrics such as runtime and energy. In addition, our framework includes a fully automated DSE technique, which optimizes backend and system metrics through an automated search of architectural and backend parameters. Experimental studies show that our approach consistently predicts backend PPA and system metrics with an average 7% or less prediction error for the ASIC implementation of two deep learning accelerator platforms, VTA and VeriGOOD-ML, in both a commercial 12 nm process and a research-oriented 45 nm process.

Effects of tourism resource search on folk sports project development fuzzy front-end performance: The moderating role of environmental dynamics change.

How to improve the success of new project development through the collection of resources in the preliminary stages of new project development is a new area of research. Given the speed and magnitude of changes in the folk sports market environment, this study analyses the impact of tapping folk tourism resources on sports projects at the project development stage. Through stratified regression analyses of 600 Chinese firms engaged in folk sports project development, this paper finds that tapping internal tourism resources positively affects the Fuzzy Front-End Performance of incremental innovative project development. In contrast, tapping external tourism resources positively affects the Fuzzy Front-End Performance of breakthrough innovation projects. The study also indicates that the speed of environmental change (SEC) positively moderates the relationship between exploring external tourism resources (ERS) and Fuzzy Front-End Performance of incremental innovation projects. In contrast, the magnitude of environmental change (MEC) negatively moderated the relationship between internal tourism resource exploration (IRS) and the FFE-P of similar projects.

The influence of the non-uniform airflow on the energy and cooling performance of the simplified electric vehicle front end cooling module

Electric vehicles (EVs) are viable alternatives to reduce greenhouse gas emissions and dependence on fossil energy resources. The front end cooling module (FECM), including the heat exchanger (HX), cooling fan, grille and other components, is indispensable for EVs. As the cooling airflow demand of EVs is smaller than that of traditional vehicles, the grille becomes flat and small so as to reduce the wind drag and improve the driving range, which causes more non-uniform airflow in the FECM. However, the influence of this change on the cooling fan has not been deeply researched so far.Thus, a simplified FECM model in this paper is designed to explore the influence of non-uniform airflow caused by different grilles. This study uses the computational fluid simulation (CFD) to get the numerical results and the airflow distribution inside the FECM, aiming to minimize the negative impact of the non-uniform airflow on the cooling fan and to reduce the power consumption, which has not been discussed by researches before. The results show that the target power consumption can be reduced by 5–18% through optimizing the grille, meanwhile meeting the mass flow rate required for cooling, which provides a reference for designers to refine parameters such as the grille size, and is beneficial for the energy saving and mileage improvement of EVs.

Map point selection for visual SLAM

Simultaneous localisation and mapping (SLAM) play a vital role in autonomous robotics. Robotic platforms are often resource-constrained, and this limitation motivates resource-efficient SLAM implementations. While sparse visual SLAM algorithms offer good accuracy for modest hardware requirements, even these more scalable sparse approaches face limitations when applied to large-scale and long-term scenarios. A contributing factor is that the point clouds resulting from SLAM are inefficient to use and contain significant redundancy.This paper proposes the use of subset selection algorithms to reduce the map produced by sparse visual SLAM algorithms. Information-theoretic techniques have been applied to simpler related problems before, but they do not scale if applied to the full visual SLAM problem. This paper proposes a number of novel information-theoretic utility functions for map point selection and optimises these functions using greedy algorithms. The reduced maps are evaluated using practical data alongside an existing visual SLAM implementation (ORB-SLAM 2). Approximate selection techniques proposed in this paper achieve trajectory accuracy comparable to an offline baseline while being suitable for online use. These techniques enable the practical reduction of maps for visual SLAM with competitive trajectory accuracy.Results also demonstrate that SLAM front-end performance can significantly impact the performance of map point selection. This shows the importance of testing map point selection with a front-end implementation. To exploit this, this paper proposes an approach that includes a model of the front-end in the utility function when additional information is available. This approach outperforms alternatives on applicable datasets and highlights future research directions.

Analysis of Device Mismatches Effect on the Performance of UWB Receiver Front-End in Wireless Body Area Network Sensor Nodes

Today it is important to manufacture high quality integrated circuits which are insensitive to device mismatches. This paper presents an analysis of MOSFET transistors mismatches effect on the performance of UWB receiver front-end which constitute the most important part of Wireless Body Area Network sensor node. The receiver is based on Balun LNA with 25% fully differential double-balanced passive mixer. A PMOS and NMOS transistors mismatch models were proposed to determine LNA output offset voltage and mixer offset current respectively. The analysis result suggests that, to minimize NMOS current mismatch, and thus reducing second-order inter modulation distortion, the overdrive voltage must be maximized. A Monte Carlo and harmonic balance simulations were performed using 0.18µm CMOS process to evaluate the impact of mismatch as well as Vth mismatch on the receiver gain and IIP2. Simulation results show that IIP2 of the receiver is less sensitive to mixer NMOS mismatch but receiver gain is more sensitive. The receiver IIP2 confidence interval in case of NMOS mismatch is [24.674, 24.77]dBm and in case of NMOS Vth mismatch is [24.659, 24.857]dBm. This show the robustness of the proposed UWB receiver front end. Therefore the proposed circuit meets the requirement of UWB system perfectly which make it suitable for WBAN applications.

A 17.7–19.2-GHz Receiver Front End With an Adaptive Analog Temperature- Compensation Scheme

This article presents an eight-element 17.7–19.2-GHz receiver front end with 1–2 concurrent beams in a 65-nm CMOS technology. Each output beam utilizes a temperature-compensation variable-gain amplifier (TC-VGA) to minimize the temperature-induced gain variation. The concept of the proposed TC-VGA and the realization of corresponding adaptive analog control are introduced in detail. The front-end architecture and circuit-level design to enable a flat wideband gain response, precise phase and amplitude control, low power consumption, and adaptive analog temperature compensation are presented. Wafer probing is conducted to measure the performance of the receiver front end. The measured gain-temperature coefficient is ±0.005 dB/°C from −15°C to 85 °C at 17.7–19.2 GHz, while the counterpart without temperature compensation is −0.1 dB/°C. The chip demonstrates a 28-dB power gain, a 26% 3-dB fractional bandwidth, a 3.2–4.1-dB noise figure (NF), and a −27.4-dBm input 1-dB gain compression point (IP <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$_{\mathrm {1\,dB}}$ </tex-math></inline-formula> ) for each element. In addition, each channel provides 7-bit phase-shifting resolution and 6-bit attenuation for a 15.75-dB gain range with a <1.5° root-mean-square (rms) phase error, and a < 0.22-dB rms amplitude error. The chip occupies <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$4.65\times2.77$ </tex-math></inline-formula> mm2 area with pads, equivalent to 1.61 mm2 per element (for two beams), and consumes 37.2 mW per element per beam. To the best of our knowledge, the receiver front end demonstrates the minimum gain variation with temperature among silicon RF-beamforming front ends.

IMPLEMENTASI PERANGKAT PREDICTIVE DIALING SYSTEM DAMPAKNYA TERHADAP KINERJA TIM FRONTEND PADA UNIT COLLECTION, BNI CARD CENTER

This research is to know how much impact the implementation of the PDS device on team Frontend performance, Collection Unit, BNI Card Center, Card Business Center Bandung. On the other hand, a credit card as a form of unsecured loans bad credit has the potential to give birth. BNI Bank as one of the credit card issuer bank has a Collection unit on the Card Business division of one of its tasks to restore the company's assets that minimize the number of Net-Performing Loans (NPL). To support these tasks, the BNI Card Center management implements Predictive Dialing System (PDS) device.&#x0D; In conducting this research, the author uses descriptive research methods Quantitative Analysis. To measure the quality factor of Predictive Dialing System was used Functionality, Usability, Reliability, Performance, and Supportability factor. And to measure Frontend team performance used Kept Account and Kept Payment factor. The Data processing statistics used SPSS 15 for Windows. &#x0D; The Implementation of PDS devices has given a providing impact or effect of 62.1 percent on Frontend team performance, Collection unit, BNI Card Center, Card Business Center Bandung. Based on test results above proved that the implementation of the PDS has a significant impact in increasing the Frontend team performance. The better implementation of the PDS is expected to improve Frontend team performance on Collection unit, BNI Card Center, Card Business Center Bandung, nor vice versa.

Improving Seq2Seq TTS Frontends With Transcribed Speech Audio

Due to the data inefficiency and low speech quality of grapheme-based end-to-end text-to-speech (TTS), having a separate high-performance TTS linguistic frontend is still commonly regarded as necessary. However, a TTS frontend is itself difficult to build and maintain, since it requires abundant linguistic knowledge for its construction. In this paper, we start by bootstrapping an integrated sequence-to-sequence (Seq2Seq) TTS frontend using a pre-existing pipeline-based frontend and large amounts of unlabelled normalized text, achieving promising memorization and generalisation abilities. To overcome the performance limitation imposed by the pipeline-based frontend, this work proposes a Forced Alignment (FA) method to decode the pronunciations from transcribed speech audio and then use them to update the Seq2Seq frontend. Our experiments demonstrate the effectiveness of our proposed FA method, which can significantly improve the word token accuracy from 52.6% to 91.2% for out-of-dictionary words. In addition, it can also correct the pronunciation of homographs from transcribed speech audio and potentially improve the homograph disambiguation performance of the Seq2Seq frontend.

Arbitrary Termination Complex Impedances Tunable Bandpass Filter Using Single and Dual-Mode Resonators

This paper presents a design of microstrip line tunable bandpass filter (BPF) with a transmission zero (TZ) that can accommodate arbitrarily terminated input and output port impedances ( <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Z_s</i> and <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Z_L</i> ≠ 50 Ω). We extracted a new coupling matrix to design the proposed tunable BPF and presented intuitive circuit-level implementation using a single dc-bias controlled single and dual-mode resonators. The proposed tunable BPF integrates the function of tunable filter and matching network into a single circuit. To validate the design, three filter prototypes with different input and output port termination impedances (filter A: 50-to-50 Ω, filter B: 20-to-50 Ω, and filter C: (25+j10)-to-50 Ω) are manufactured and their performances were measured. The experimental results are consistent with the simulation showing that the passband frequency of the BPF can be tuned from 1.65 GHz to 2.08 GHz (23.06%) with the insertion loss variation from 3.40 dB to 4.69 dB. The proposed tunable BPFs achieved frequency selectivity characteristics by locating the TZ at a lower stopband. The proposed arbitrary terminated tunable BPF can allow direct connection between power amplifier (PA)/low noise amplifier (LNA) and antenna without extra matching networks, resulting in smaller circuit size and can enhance overall performance of RF front-end.

Wideband 3-D-Printed Chip Interconnects for DC-Millimeter Wave Applications

Wide band and low-loss interconnects for millimeter wave applications are discussed in this work. The focus is to avoid using conventional techniques such as bond wires and solder bumps as they require matching networks, and are relatively narrow band. An Aerosol Jet 3-D printing technique is utilized to print the interconnects from the bare die chip to the package. These types of wideband, low-loss interconnects can contribute toward improving the overall RF front end performance. The proposed interconnects can operate over a wide frequency range of dc-50 GHz with reasonable insertion loss.

Commissioning of new FHCal at BM@N experiment

The BM@N (Baryonic Matter at Nuclotron) is the fixed target experiment at NICA-Nuclotron (JINR, Dubna, Russia) accelerator complex. The main goal of the experiment is studying the properties of dense nuclear matter produced in ion-ion collisions at the energies of up to 4 AGeV. New Forward Hadron Calorimeter (FHCal) with modular structure and a beam hole in the center has been developed and constructed to measure the collision centrality after the BM@N upgrade. The transverse and longitudinal segmentation of the FHCal allows to perform calibration of the calorimeter with cosmic muons.FHCal modules have lead/scintillator sampling structure with longitudinal segmentation. Light signals from the sections are collected with MPPCs, amplified and read-out by ADC boards. Fast analog signals are collected for trigger system.The status of development and construction of the new FHCal calorimeter for the BM@N experiment is presented. Performance of FHCal front-end and readout systems is discussed.

Design of a prototype analog front-end ASIC for the LGAD readout

Low-gain avalanche detector (LGAD) is being researched and designed in ATLAS and CMS experiments aiming to distinguish collisions that are close in both space and time to meet the challenge of pileup in HL-LHC, through its high resolution in position and time measurement. Considering the high spatial density of the detector channels, the area and power consumption per each channel are quite limited, so a front-end ASIC, instead of discrete-component electronics, is expected to collect and process the signal output by the LGAD. The processed signal is a digital pulse containing the precise information of time of arrival (TOA) and time over threshold (TOT). A prototype analog front-end ASIC for LGAD readout based on 180 nm CMOS technology with low power consumption, called LATIC0, has been designed and tested. As the first prototype, this ASIC aims to study the performance of the analog front-end for the further work. And the test results indicate that a time precision better than 20 ps-rms is achieved (at 10 fC injected charge with 6 pF capacitance), and the curves of TOA and TOT versus charge concord well with expectations.

Effective Current Pre-Amplifiers for Visible Light Communication (VLC) Receivers

Visible light communication (VLC) is an upcoming wireless communication technology. In a VLC system, signal integrity under low illumination intensity and high transmission frequencies are of great importance. Towards this direction, the performance of the analog front end (AFE) sub-system either at the side of the transmitter or the receiver is crucial. However, little research on the AFE of the receiver is reported in the open literature. Aiming to enhance signal integrity, three pre-amplification topologies for the VLC receiver AFE are presented and compared in this paper. All three use bipolar transistors (BJT): the first consists of a single BJT, the second of a double BJT in cascade connection, and the third of a double BJT in Darlington-like connection. In order to validate the performance characteristics of the three topologies, simulation results are provided with respect to the light illumination intensity, the data transmission frequency and the power consumption. According to these simulations, the third topology is characterized by higher data transmission frequencies, lower illuminance intensity and lower power consumption per MHz of operation.

Assessment of early warning signs in hospital projects' front-end phase

PurposeThe front-end phase plays an important role in achieving project success, and establishment of performance measurement systems considering project challenges or pitfalls is a way of keeping track of this phase. Early warning signs, a type of proactive performance indicators, may serve as means for improving decision-making and project processes aiming for short- and long-term project success. In this paper, the authors present findings from a study on early warning signs (EWS) in hospital projects' front-end. A preliminary systematisation of identified signs as a contribution to front-end improvement is provided.Design/methodology/approachThe paper is based on a mixed methods approach, using a sequential, exploratory research design comprising document studies, interviews and a survey.FindingsThe authors identified 62 challenges for hospital projects' front-end performance and further established four categories of EWS as follows: (1) structure and tools, (2) context and frame factors, (3) management and (4) relational factors and properties. This mirrors the presence of hard and soft issues from previous studies. There is need for clarifying terminology and raising consciousness on EWS. Processual approaches to identify EWS are considered more useful than subsequent established indicators.Originality/valueThe findings from this paper provide insight into EWS in hospital projects' front-end phase. This adds to the general understanding of EWS and contributes to more knowledge on the front-end phase in general.

Multi-Feed Antenna and Electronics Co-Design: An E-Band Antenna-LNA Front End With On-Antenna Noise-Canceling and Gₘ-Boosting

This article presents an E-band low-noise amplifier (LNA) co-designed and co-integrated with an on-chip multifeed antenna for antenna-level LNA noise-canceling and gm -boosting. Different from conventional approaches that view antennas as a simple 50-Ω radiation load, we exploit antennas as multi-feed passive radiating networks with direct onantenna signal conditioning and processing capabilities. Such an antenna-electronics co-design concept can potentially advance wireless front-end performance beyond electronics-only designs and opens the door to a plethora of front-end innovations. We also propose equivalent circuits to model multi-feed antenna systems and elucidate on-antenna signal processing operations. As a proof of concept, we propose an antenna-LNA co-designed architecture and explore the interactions among a common-gate (CG) LNA path, a common-source (CS) LNA path, and a pair of near-field coupled folded slot antennas for on-antenna noise-cancellation and g <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">m</sub> -boosting. In the measurements, a true V-factor radiation method is introduced as a new approach to measure the noise figure (NF) of the on-chip multi-feed antenna and LNA/RX integration. Then, we perform the conventional sensitivity-based NF measurement. Both measurements show accurate and consistent NF characterization at high millimeter-wave (mm-Wave). The E-band antenna-LNA front end is implemented in the Globalfoundries 45-nm CMOS SOI process and demonstrates 4.8-dB NF with 2.2-dBm IIP <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> , achieving the best reported FoM at similar frequencies. Furthermore, over-the-air modulation tests are demonstrated, supporting >10-Gb/s high-fidelity high-order QAM signals over an E-band wireless link.

The ATLAS strip detector system for the High-Luminosity LHC

The ATLAS experiment at the Large Hadron Collider is currently preparing for a significant upgrade of the Inner Detector (ID) for the High-Luminosity LHC operation, scheduled to start in 2027. A planned integrated luminosity of 4000 fb−1 implies integrated hadron fluences over 2×1016 neq/cm2, requiring a complete replacement of the existing ID. An all-silicon Inner Tracker is under development with a pixel detector surrounded by a strip detector. The strip detector consists of four barrel layers in the centre, while the forward regions are made of six disks at each end, with silicon-strip modules as basic units. With the production of modules scheduled to begin in 2020, a thorough understanding of the current prototype modules is critical. Electrical characterization of the module aims to assess the front-end performance in terms of input noise and noise occupancy. Results of input noise from modules built with different front-end designs are presented. Tracking resolutions and detection efficiency are evaluated in beam tests. Several module prototypes have been built and tested in 2018 and 2019. In this report, the beam test results from different module types are presented. Included are results from the first double-sided end-cap prototype module. The results focus on hit detection efficiencies and spatial resolution of the modules.

220 GHz wideband integrated receiver front end based on planar Schottky diodes

AbstractIn this article, a 220 GHz wideband receiver front end is proposed, featuring a 220 GHz subharmonic mixer and a 110 GHz wideband tripler integrated in one single block. The 220 GHz subharmonic mixer and 110 GHz tripler are firstly developed separately with proper planar Schottky diodes. According to the simulated and experimental results, the direct combination of independent mixer and tripler will lead to deterioration of the front end's performances, especially for wideband receivers. This indicates the necessity of building matching network between the cascade circuits in wideband submillimeter receivers. To improve the integral performances of the receiver front end and reduce its size, the combination of the subharmonic mixer and the tripler was optimized with load‐pull techniques and realized in one block. Measured results reveal that the single sideband (SSB) conversion loss of the integrated receiver front end is 7.5‐11 dB from 185 to 250 GHz, while the double sideband (DSB) noise temperature is 750‐1600 K within this frequency range. The integrated front end features half size of the combination of independent modules and better performances. Good agreement between the simulated and measured results shows that the integration and optimization techniques can be applied to realize compact terahertz systems in the future.

Performance optimization of agricultural products website front-end based on user experience

With the rapid development of Internet technology, users have higher and higher requirements for the response speed of the website, which makes the performance optimization of the website become extremely important. How to solve this problem is the key to improving the user experience. In this paper, taking the characteristic agricultural product website as an example, we analyze the website front-end performance optimization in CSS optimization, page rendering, HTTP request reduction, Ajax caching and web caching, and offer the corresponding performance optimization methods.

Modeling and Analysis of the Nonideality of LO Pulse Overlap for Multi-Phase Passive Mixer First RF Frontend

Multi-phase passive mixer (PM) first RF frontend has regained great concern for its satisfactory noise performance comparable to LNA-first frontend. Moreover, the re-configurable impedance, bi-directional signal transparency and bi-directional impedance translation performance enable a splendid application future for the multi-phase PM-first RF frontend. However, it still suffers from quite a few nonidealities, among which the adjacent Local Oscillator (LO) pulse overlap is the remaining nonideality lacking deep research, and how the LO pulse overlap decays the impedance matching and noise performance of multi-phase PM-first RF frontend remains unclear. In this work, an accurate model is, for the first time, established and analyzed to reveal how the LO pulse overlap decays the impedance matching and noise performance of multi-phase PM-first RF frontend. The analytical and simulation results demonstrate that the impedance matching will be drastically deteriorated because of LO overlap, and when LO pulse overlap exceeds 2% the impedance matching will be collapsed, while the noise figure (NF) is deteriorated by 3.1 dB when LO overlap ranges from 0% to 2%. Moreover, even a chocking inductor technique and a technique by introducing a synchronous phase-shifted signal have been proposed to suppress the LO overlap, the gain and noise performance can be deteriorated or the power and chip area cost are big. To address this question, a LO pulse overlap suppression technique is proposed furthermore by introducing an overlap safeguard factor (OLSF) in this work. The additional impedance smaller than 2[Formula: see text][Formula: see text] in the main signal path makes the OLSF scheme beneficial for noise and gain improvement, and the proposed OLSF scheme is power, area (0.04[Formula: see text]mm[Formula: see text] and cost efficient compared with existing LO overlap suppression techniques.