Receiver Front-end Research Articles

Reconfigurable MIMO antenna: previous advancements and the potential for future wireless communication

Abstract Future smart reconfigurable antennas (RAs) (Haupt R-L and Lanagan M (2013) Reconfigurable antennas. IEEE Antennas and Propagation Magazine 55, 49–61) will likely be fully multipurpose and controlled by software and equipped with machine learning skills that can discern and respond to alterations in the radio frequency environment. Cognitive radio utilizations will be accomplished using a new generation of antenna technology and communication protocols. The effective use of frequencies and the use of polarization diversity and radiation pattern reconfigurability to send data over existing congested frequencies will be major advantages for such applications. The usage of antennas that can be reconfigured in multiple-input multiple-output (MIMO) channels will enhance channel capacity while simultaneously improving channel efficiency and lowering costs (Christodoulou C-G, Tawk Y, Lane S-A and Erwin S-R (2012) Reconfigurable antennas for wireless and space applications. Proceedings of the IEEE 100, 2250–2261). There are a lot of antennas used both at the transmitter and at the receiver front end in a MIMO system. The benefit of employing such arrangements is that different types of information can be conveyed at a similar time, boosting the spectral efficiency of communication in a multipath situation. The coding rate, modulation level, and transmission signaling method of a MIMO system can all be changed in response to changing channel circumstances and user needs. In a MIMO context, polarization reconfigurable/frequency-reconfigurable/radiation pattern RA increase the degree of freedom and enhancing the system’s performance. The usage of such antennas greatly enhances capacity by enabling a choice of various polarization configurations and pattern diversity. Antenna arrays that can be reconfigured are also an appealing MIMO system solution that needs to retain robust communication channels, particularly in portable gadgets where the area is limited.

Characterization of C-Band Coherent Receiver Front-Ends for Transmission Systems Beyond S-C-L-Band

Characterization of C-Band Coherent Receiver Front-Ends for Transmission Systems Beyond S-C-L-Band

Orthogonal Filter Frequency Followed by LNA Linearity Tuning for Efficient Instinctual GaN Receiver Front-End

Orthogonal Filter Frequency Followed by LNA Linearity Tuning for Efficient Instinctual GaN Receiver Front-End

A Turnstile Quad-Ridge Orthomode Transducer (OMT) for Octave-Bandwidth Receiver Front-Ends (24–51 GHz)

We report on the design, fabrication, and measured results of a turnstile quad-ridge orthomode transducer (OMT) suitable for millimeter-wavelength receivers used in radio telescopes for astronomy. The quad-ridge OMT is directly compatible with a quad-ridge feed horn to implement dual-polarization low-noise receivers that exceed the single-mode bandwidth of a rectangular waveguide. Using a bandwidth of 24–51 GHz, the OMT demonstrated an insertion loss of 0.3–0.4 dB along with cross-polarization leakage and isolation below <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$-$</tex-math> </inline-formula> 40 dB. An OMT is a key part of a dual polarization receiver front-end, and our long-term goal is to realize low-noise, wideband receivers for radio astronomy utilizing ridge waveguides throughout the entire front-end. Design details are provided for each ridge waveguide feature within the OMT, including a quad-ridge waveguide turnstile junction, <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$E$</tex-math> </inline-formula> -plane bend, and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$E$</tex-math> </inline-formula> -plane T-junction. To facilitate future layouts and integration, additional ridge waveguide component designs have been included for a 3-dB coupler, <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$H$</tex-math> </inline-formula> -plane bend, and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$H$</tex-math> </inline-formula> -plane T-junction.

A 10-Gb/s low-power inverter-based optical receiver front-end in 0.13-[formula omitted] CMOS process

In the design of CMOS optical receivers, it is challenging to compromise the bandwidth, noise, and gain of the transimpedance amplifier (TIA). The inverter-based cascaded structure is often used in TIA designs. However, the traditional 3-stage TIA needs bandwidth expansion techniques to get good performance. In the designed front-end, we propose a 5-stage cascaded TIA that achieves performance improvement without using bandwidth expansion technique. Besides, the stability of the main amplifier (MA) is improved by adopting a feed-forward compensation technique. Designed in a 0.13-μm CMOS process, the proposed front-end exhibits a bandwidth of 8.9 GHz, a transimpedance gain of 123.5 dB Ω and an average input-referred noise of 12.2 pA/Hz. The whole circuit consumed 19.1 mW from mixed input of 1 V and 1.5 V supply voltages.

Experimental Study of High Power Microwave Injection in Radar Receiving Front-end

In order to study the tolerance threshold and damage process of radar receiving front end against high power microwave pulse attack, the relationship between the damage of receiving front end and injected signal power, pulse width, and duration was obtained by injection test. The experimental results show that the damage of PIN limiter by high power microwave is a slow worsening process near the damage threshold. Based on the test results, the radar withstanding range of high-power microwave weapon attack is calculated theoretically, which can provide theoretical support for the radar receiving front-end design.

A 103 fJ/b/dB, 10–26 Gb/s Receiver With a Dual Feedback Nested Loop CDR for Wide Bandwidth Jitter Tolerance Enhancement

A 10–26 Gb/s energy-efficient receiver incorporating a dual-feedback nested loop clock and data recovery circuit (DF-CDR) is proposed. Combining a direct modulation path on voltage-controlled oscillator (VCO) and phase interpolator (PI)-based phase rotator inside a phase locked loop (PLL), it improves high-frequency jitter tolerance by 0.15 UI. An edge-first equalization scheme is proposed to reduce power and hardware overhead of decision feedback equalizers. Meanwhile, it facilitates adaptive equalization of continuous time linear equalizer, and background offset calibration of the receiver frontend. A three-stage latch comparator is adopted to enable high-speed direct feedback equalizer. By applying PRBS-31 test pattern through a 32 dB loss channel, the receiver is error-free and features the best energy efficiency of 103 fJ/b/dB at 26 Gb/s.

Blind skew compensation and digital combining with widely linear equalizer for multi-aperture coherent FSO communication.

Coherent digital combining technology using multiple small apertures has a lot of advantages over doing so with a single large aperture, including the effective mitigation of deep fading under strong turbulence, ease of scalability, and potential higher collected optical power. However, the in-phase/quadrature (I/Q) imbalance and I/Q skew induced by manufacturing imperfections of the coherent receiver front end, and the time mismatch caused by the unequal length of multi-aperture branches will induce a high OSNR penalty and reduce the digital combining efficiency, especially when the system scales to a larger number of apertures, such as massive aperture system. In this work, a complex-valued multiple-input multiple-output (MIMO) 4N×2 widely linear (WL) equalizer is designed to combine multi-aperture signals. Using WL complex analysis, a general analytical model is derived and it is indicated that multi-aperture channel equalization and combining operations can be achieved simultaneously using a MIMO equalizer as long as appropriate tap coefficients are selected. Moreover, the feasibility of the proposed WL equalizer is verified by a 10-Gbps PM-QPSK modulation and a 20-Gbps PM-16QAM modulation four-aperture offline simulated turbulence experiment. The four-aperture combining efficiency of PM-QPSK exceeds 96% even at a single-aperture extremely low OSNR of -6 dB, and 80% for PM-16QAM at a single-aperture OSNR of 0 dB.

Prefiltering-based reduced rank multiuser detection in uplink generalized spatial modulation massive MIMO system

Exploiting generalized spatial modulation in massive MIMO system, we develop an efficient uplink multiuser detection scheme. Different from the maximum likelihood detection algorithm, the spatial and temporal data in the proposed detection scheme are decoded in a sequential manner: At the front end of base station receiver, a bank of spatial filters is first employed to mitigate the multiuser interference using the benefits of large-scale antenna array. There then, a reduced rank generalized Eigen-value decomposition-based algorithm is proposed to identify the antennas activated at each user terminal. In the second stage, a least-squares-based multiuser detector is employed to decode the multiplexed temporal symbols. Both theoretical analysis and computer simulations are conducted to evaluate system performance in terms of correct identification probability and overall symbol error rate. Simulation results demonstrate that the proposed algorithm outperforms most of the existing algorithms yet the complexity is extensively reduced.

A 28-GHz eight-element phased-array receiver front-end with compact size in 65-nm CMOS technology for 5G new radio

This article presents an 8-element 24–30-GHz phased-array receiver front-end in 65-nm CMOS technology for the millimeter-wave fifth-generation mobile network (5G). The phased-array receiver front-end is based on the radio-frequency (RF) phase-shifting architecture using RF vector-sum phase shifters with 5-bit phase resolution. The designed front-end can be easily expanded for use in large-scale phased arrays due to its compact size, low manufacturing costs, reasonable power consumption and low complexity. The post-layout simulations show a maximum single-element average gain of 12.85–15.7 dB across 5-bit phase states, with an associated noise figure (NF) of 6.15–7.5 dB and an input third-order intercept point (IIP3) value between –16.5 and –15.4 dBm. The simulated RMS gain and phase errors are less than 0.31 dB and 3°, respectively over 32 phase states and are constant over a 6-bit gain control. The designed eight-element phased-array receiver front-end has a total power consumption of 256±2.5 mW from a 1.2-V supply and occupies a small active area of 0.62 mm2.

A High-Linearity 7–9-GHz Receiver Front End With Strength-Oriented Nonlinearity Cancellation

This letter presents a 7–9-GHz four-element eight-beam receiver front end (FE) in 65-nm CMOS for satellite communications. To boost the linearity and defeat interferences, the FE proposes a strength-oriented nonlinearity cancellation (SoNC) technique based on multigate transistors (MGTRs). It demonstrates a 22-dB single-element gain with a 7-dB noise figure (NF) at 7.5 GHz. The measured input-referred 1-dB gain compression point (IP <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$_{\mathrm{1\, dB}})$</tex-math> </inline-formula> and third-order input interception point (IIP <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$_{3})$</tex-math> </inline-formula> at 7.5 GHz are <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$-$</tex-math> </inline-formula> 12 and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$-$</tex-math> </inline-formula> 7.5 dBm, respectively. The chip occupies 19.8 mm <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$^{2}$</tex-math> </inline-formula> and consumes 1265 mW, and achieves an excellent linearity among silicon-based RF-beamforming receivers.

An 80-Gb/s PAM-4 Simultaneous Bidirectional Transceiver With Hybrid Adaptation Scheme

This paper presents a simultaneous bidirectional (SBD) transceiver with four-level pulse amplitude modulation (PAM-4), employing a novel hybrid adaptation scheme. The possibility of extending bandwidth is explored by applying PAM-4 signaling to SBD. Furthermore, a mismatch compensation method for a hybrid circuit is proposed, which is essential for removing the outbound signal in SBD. The hybrid adaptation is easily implemented by applying the locked condition of the Mueller M|ller phase detector (MMPD) with the data level adaptation. By sharing one error sampler with MMPD and adaptation engine, the presented SBD transceiver is efficient in terms of clocking power consumption and bandwidth of a receiver front-end. A wide linear range hybrid and a data alignment technique guarantee the robust PAM-4 SBD operation. Fabricated in the 28-nm CMOS, the 80-Gb/s SBD transceiver achieves a bit error rate (BER) of less than 10-12 with an energy efficiency of 2.65 pJ/b.

An Energy Efficient Coherent IR-UWB Receiver With Non-Coherent-Assisted Synchronization

This paper presents a non-coherent assisted synchronization mechanism for low data rate coherent () receivers. A two-step coarse and fine acquisition mechanism is utilized to simplify the coherent synchronization and minimize the total required packet length. This hybrid scheme reduces the total power consumption of the receiver. The reception of a UWB packet begins with an energy efficient non-coherent synchronization portion in () modulation non-coherent acquisition. This reduces the search space for the coherent reception by first finding the best integration window that has the most energy of the received signal. Afterwards, the receiver searches coherently in () modulation within only the pre-selected integration window instead of the whole symbol time. Self-mixing and template-based correlation are utilized for the non-coherent and coherent reception, respectively. Most of the front-end blocks are shared between the coherent and non-coherent modes, including the LNA, mixer, and the baseband circuitry that follows to minimize the total power consumption of the receiver. A differential architecture including a (), a mixer, a fast start-up template generator, an integrator, and a differential comparator are utilized for the receiver front-end. A prototype of the proposed receiver operating from 3.5 to 5 GHz over four bands, each spaced by 500 MHz, is implemented in 65-nm CMOS technology. The proposed receiver architecture achieves a <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$-$</tex-math> </inline-formula> 68 dBm, <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$-$</tex-math> </inline-formula> 70.5 dBm, and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$-$</tex-math> </inline-formula> 70.8 dBm sensitivity at a <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$10^{-3}$</tex-math> </inline-formula> BER at 50 MHz () in the non-coherent, coherent, and proposed hybrid synchronization modes, respectively. The receiver consumes 6.8 mW and 8.8 mW in the non-coherent and coherent mode, respectively, when continuously ON. Using its novel synchronization mechanism, the receiver can reduce the ON time of the receiver by 68% and 34% in order to coherently synchronize and receive a 100-bit and 1024-bit payload, respectively. As a result, the () of the receiver is reduced by a factor of 2.9 from 1.24 nJ/b to 422 pJ/b for 100-bit payloads, and by a factor of 1.5 from 309 pJ/b to 204 pJ/b for 1024-bit payloads, increasing energy efficiency while maintaining the sensitivity benefits of coherent detection.

An Ultra-Low-Voltage 2.4-GHz Flicker-Noise-Free RF Receiver Front End Based on Switched-Capacitor Hybrid TIA With 4.5-dB NF and 11.5-dBm OIP3

In this article, an ultra-low-voltage 2.4-GHz radio frequency (RF) receiver front-end architecture targeting the removal of output flicker noise is presented, making it possible to use zero-IF topology for narrow-band communication standards. The trans-impedance amplifier (TIA) is built on the proposed hybrid operational trans-conductance amplifier (OTA) with a switched-capacitor (SC) amplifier as the first gain stage and an active primary–secondary amplifier as the second gain stage, achieving an imperceptible flicker-noise corner frequency. With the SC gain stage, the interstage common-mode voltage can be set to 0 V, which reduces the minimum supply voltage to 0.5 V. As another benefit, dc offset compensation (DCOC) is performed inherently in the interstage sampling and coupling process. Fabricated in 28-nm RF CMOS process, the front-end prototype, including an on-chip matching inductor, occupies a die area of 0.8 mm <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$^{2}$</tex-math> </inline-formula> . Operating in the Industrial Scientific Medical (ISM) frequency band of 2.4 GHz with 1-MHz IF bandwidth, the front end provides a 36–40-dB conversion gain, an 11.5-dBm OIP3, and a flicker-noise corner frequency less than 10 kHz with the supply voltage ranging from 0.5 to 0.6 V. The RF impedance matching network provides passive voltage gain before the low-noise trans-conductance amplifier (LNTA), achieving a 4.5-dB noise figure (NF) with 0.8-mA biasing current in the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$g_m$</tex-math> </inline-formula> stage. With the ultra-low supply voltage and the passive IF gain stage, the power consumption of the proposed front end is only 610 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu $</tex-math> </inline-formula> W under a 0.53-V supply voltage.

1200 GHz High Spectral Resolution Receiver Front-End of Submillimeter Wave Instrument for JUpiter ICy Moon Explorer: Part I - RF Performance Optimization for Cryogenic Operation

The Submillimeter Wave Instrument (SWI) is a spectrometer/radiometer instrument on board of Jupiter Icy Moons Explorer (JUICE) mission operating in two submillimeter heterodyne bands around 530 μm (530 – 625 GHz) and 255 μm (1080 – 1275 GHz). The paper presents the results of acceptance testing and performance optimization carried out on the flight and spare model of the 1200 GHz receiver front-end. The safe operation conditions at 120-150 K ambient temperature, such as maximum authorized input RF power, applied DC bias voltage are determined through the definition of the Schottky junctions dissipated power and current density ranges. A tuning procedure that optimizes the sensitivity of the front-end while keeping it within safe limits at 120-150K temperature operation is discussed. In part II, we present a detailed analysis of reliability and endurance testing.

A PAM4 transceiver design scheme with threshold adaptive and tap adaptive

To meet the demand of low bit error rate and high bandwidth for high-speed links, a reliable 112 Gb/s four-level pulse amplitude modulation (PAM4) transceiver design scheme with adaptive threshold voltage and adaptive decision feedback equalizer is proposed in this paper. In this scheme, three continuous time linear equalizers (CTLEs) at the front end of receiver are used to compensate the high-frequency, mid-frequency and low-frequency signals, respectively, and the variable gain amplifier (VGA) and saturation amplifier (SatAmp) are used to scale the signal amplitude. In addition to the three data samplers, four auxiliary samplers are also used for threshold adaptation. The sign-sign least mean squares algorithm uses the offset between the data sampler and the auxiliary sampler at the receiver side to drive the auxiliary reference voltage to converge to the signal constellation level, thus ensuring that the eye diagram of the PAM4 received signal has equal spacing and a constant signal–noise ratio for the three eyes in the vertical direction. In addition, the adaptive DFE for PAM4 signaling allows the transceiver to better adapt to the channel and thus achieve better equalizer performance. The simulation results show that the PAM4 transceiver design can compensate up to 25 dB of channel loss with an average eye height of 59.6 mv and an average eye width of 0.27 UI at a bit error rate of 10−12 under the condition of 3-tap feedforward equalizer (FFE) transmitter.

Transceiver Designs Approaching the Entanglement-Assisted Communication Capacity

Preshared entanglement can significantly boost communication rates in the high thermal-noise and low-brightness transmitter regime. In this regime, for a lossy bosonic channel with additive thermal noise, the ratio between the entanglement-assisted capacity and the Holevo capacity---the maximum reliable communication rate permitted by quantum mechanics without any preshared entanglement---scales as $\mathrm{log}(1/{\overline{N}}_{S})$, where the mean transmitted photon number per mode, ${\overline{N}}_{S}\ensuremath{\ll}1$. Thus, preshared entanglement, e.g., distributed by the quantum internet or a satellite-assisted quantum link, promises to significantly improve low-power radio-frequency communications. In this paper, we propose a pair of structured quantum transceiver designs that leverage continuous-variable preshared entanglement (generated, e.g., from a down-conversion source), binary phase modulation, and non-Gaussian joint detection over a codeword block, to achieve this scaling law of capacity enhancement. Furthermore, we describe a modification to the aforesaid receiver using a frontend that uses sum-frequency generation sandwiched with dynamically programmable in-line two-mode squeezers, and a receiver backend that takes full advantage of the output of the receiver's frontend by employing a nondestructive multimode vacuum-or-not measurement to achieve the entanglement-assisted classical communication capacity.

A Design of a Miniaturized Receiver Front-end of an X-band Radar

Based on the development and practice of a high-frequency carrier-based aircraft radar receiver front-end, a design of a high-density miniaturized X-band receiver front-end with its environmental adaptability is introduced. The system scheme introduces the key technologies of technical scheme, specifications allocation, circuit realization and test system design. The front-end of the designed receiver has the characteristics of small volume, high density and good maintainability. The practice shows that the environmental adaptability and test features of the receiver meet the requirements of carrier-based aircraft radar.

Design of 6 GHz Variable-Gain Low-Noise Amplifier Using Adaptive Bias Circuit for Radar Receiver Front End

This paper presents a variable-gain low-noise amplifier (VGLNA) based on an adaptive bias (ADB) circuit for the radar receiver front end. The ADB circuit processes the signal separated by a coupler at the LNA output port. First, the ADB circuit rectifies the coupled signal into positive DC voltage through a rectifier, which is then inverted to control a junction-gate field-effect transistor (JFET). The voltage-controlled current of JFET flows through a voltage-divider network and finally produces the DC biasing voltage for the BJT base termination, which decreases with the increase in the input RF power. The proposed VGLNA operates automatically in high gain at low input power and low gain at high input power, providing a wider dynamic range as compared to the constant-bias counterpart. For validation, a prototype is fabricated and measured at 6 GHz. As observed, the base biasing voltage generated by the ADB circuit is changed from 858 mV to 798 mV as the input power increases from −50 dBm to 0 dBm. As a result, the dynamic range represented by the input P1dB point (IP1dB) has an increase of 6.5 dB, while LNA still maintains a high gain of 15.15 dB at low input power.

Ka Band Low Channel Mutual Coupling Integrated Packaged Phased Array Receiver Front-End for Passive Millimeter-Wave Imaging

This paper presents a Ka band eight-channel integrated packaged phased array receiver front-end for a passive millimeter-wave imaging system. Since multiple receiving channels are integrated in a given package, the mutual coupling issue affecting the channel will deteriorate imaging quality. Therefore, in this study, the influence of channel mutual coupling on the system array pattern and amplitude phase error is analyzed, and the design requirements are proposed according to the results. During the design implementation, the coupling paths are discussed, and passive circuits in the path are modeled and designed to reduce the level of channel mutual coupling and spatial radiation. Finally, an accurate coupling measurement method for a multi-channel integrated phased array receiver is proposed. The receiver front-end achieves a 28~31 dB single channel gain, a 3.6 dB noise figure, less than −47 dB of channel mutual coupling. Furthermore, the array pattern of the two-dimensional 1024 channel system composed of the front end of the receiver is consistent with the simulation, and the receiver’s performance is verified by a human-body-imaging experiment. The proposed coupling analysis, design, and measurement methods are also applicable to other multi-channel integrated packaged devices.