Front-end Circuit Research Articles

Development of a compact and portable diamond-based detection system for dosimetry and microdosimetry in ion beam therapy.

Ion beam therapy techniques have advanced significantly in the past two decades. However, the development of dosimetric verification methods has lagged. Traditional dosimetry, which offers a macroscopic view of the absorbed dose, fails to address the micrometric-scale stochastic effects crucial for understanding biological responses. To bridge this gap, microdosimeters are used to assess physical quantities correlated with radiation effects. This work reports on the design and testing of a novel detection system based on synthetic single crystal diamond. The system is capable of simultaneously performing dosimetric and microdosimetric characterizations of clinical ion beams. The detector incorporates two active components configured as diamond Schottky diodes, both integrated on a single crystal diamond substrate. In particular, one very small element (sensitive area 0.0078 mm2) was designed to evaluate microdosimetric metrics, while the other large one (sensitive area 4.2 mm2) was designed to measure the absorbed dose to water. Diamond detectors were characterized using the ion beam induced charge (IBIC) technique, employing a 1MeV protons microbeam. The IBIC map of the diamond detector shows two distinct sensitive areas with quite uniform sensitivity, well contained within the metallic contact regions. Dedicated front-end electronic circuits were designed and implemented for both the dosimetric and microdosimetric signals. These circuits, along with the integrated diamond detector, were embedded in an aluminum waterproof housing to minimize electronic interference. This configuration enables a compact, portable setup compatible with water phantoms. Laboratory tests with alpha particles yielded promising results, demonstrating stable and reproducible responses with a good signal-to-noise ratio.

Noise Analysis and Suppression Methods for the Front-End Readout Circuit of a Microelectromechanical Systems Gyroscope

Circuit noise is a critical factor that affects the performances of an MEMS gyroscope. Therefore, it is essential to analyze and suppress the noises in the key analog circuits, which are the main noise sources. This study presents an optimized front-end readout circuit and noise suppression methods. First, the noise analysis of the front-end readout circuit is carried out with theoretical derivation to clarify the main noise contributors. To suppress the output noise, an improved readout circuit based on the T-resistor networks is proposed, and the corresponding noise equation is derived in detail. In addition, the noise analysis of the critical circuits of the detection and control system, such as the inverting amplifiers, the first-order low-pass filters, and the first-order high-pass filters, is carried out, and the noise suppression strategy with the optimization of the resistances and is proposed. Taking the inverting amplifier as an example, the theoretical derivation is verified by measuring and comparing the output noises of different resistance schemes. In addition, the output noises of the gyroscope before and after circuit optimization are measured. Experimental results demonstrate that the output noise with the circuit optimization is reduced from 60 μV/Hz1/2 to 30 μV/Hz1/2 and the bias instability is reduced from 3.8 deg/h to 1.38 deg/h. In addition, the ARW is significantly improved from 0.035 deg/h1/2 to 0.018 deg/h1/2, which indicates that the proposed noise analysis and suppression methods are effective and feasible.

A Low-Power, High-Resolution Analog Front-End Circuit for Carbon-Based SWIR Photodetector

Carbon nanotube field-effect transistors (CNT-FETs) have shown great promise in infrared image detection due to their high mobility, low cost, and compatibility with silicon-based technologies. This paper presents the design and simulation of a column-level analog front-end (AFE) circuit tailored for carbon-based short-wave infrared (SWIR) photodetectors. The AFE integrates a Capacitor Trans-impedance Amplifier (CTIA) for current-to-voltage conversion, coupled with Correlated Double Sampling (CDS) for noise reduction and operational amplifier offset suppression. A 10-bit/125 kHz Successive Approximation analog-to-digital converter (SAR ADC) completes the signal processing chain, achieving rail-to-rail input/output with minimized component count. Fabricated using 0.18 μm CMOS technology, the AFE demonstrates a high signal-to-noise ratio (SNR) of 59.27 dB and an Effective Number of Bits (ENOB) of 9.35, with a detectable current range from 500 pA to 100.5 nA and a total power consumption of 7.5 mW. These results confirm the suitability of the proposed AFE for high-precision, low-power SWIR detection systems, with potential applications in medical imaging, night vision, and autonomous driving systems.

A Time-over-Threshold based analog front-end in 28 nm CMOS for pixel detectors in future colliders

This work is concerned with the design, in a 28 nm CMOS technology, of an analog front-end processor for the readout of pixel detectors in future high energy physics experiments. The front-end circuit being developed consists of a shaper-less architecture which leverages the Time-Over-Threshold (ToT) technique for the analog-to-digital conversion of the signal from the detector. Post-layout simulation results show that the circuit, operated with a nominal current close to 4 uA and a supply voltage of 0.9 V, is able to operate at a threshold below 1000 electrons.

A Combined Sensor Design Applied to Large-Scale Measurement Systems.

The photoelectric sensing unit in a large-space measurement system primarily determines the measurement accuracy of the system. Aiming to resolve the problem whereby existing sensing units have difficulty accurately measuring the hidden points and free-form surfaces in large components, in this study, we designed a multi-node fusion of a combined sensor. Firstly, a multi-node fusion hidden-point measurement model and a solution model are established, and the measurement results converge after the number of nodes is simulated to be nine. Secondly, an adaptive front-end photoelectric conditioning circuit, including signal amplification, filtering, and adjustable level is designed, and the accuracy of the circuit function is verified. Then, a nonlinear least-squares calibration method is proposed by combining the constraints of the multi-position vector cones, and the internal parameters of the probe, in relation to the various detection nodes, are calibrated. Finally, a distributed system and laser tracking system are introduced to establish a fusion experimental validation platform, and the results show that the standard deviation and accuracy of the three-axis measurement of the test point of the combined sensor in the measurement area of 7000 mm × 7000 mm × 3000 mm are better than 0.026 mm and 0.24 mm, respectively, and the accuracy of the length measurement is within 0.28 mm. Further, the measurement accuracy of the hidden point of the aircraft hood and the free-form surface is better than 0.26 mm, which can meet most of the industrial measurement needs and expand the application field of large-space measurement systems.

A CMOS front-end circuit for capacitive sensors with zero adjustment

A front-end circuit with measurement zero adjustment was designed using 180nm CMOS technology for capacitive sensors. A series-switched capacitor composed of capacitor under test and MOSFETs is controlled by a clock signal to convert capacitance to current. The minimum output current at fixed capacitance can be adjusted by applying different voltage to realize zero adjustment. The test shows that the output current has a monotonic linear relationship with the measured capacitance, with capacitance detection range reaches 50pF-3000pF and an output current range of 0.59mA-22.2mA. The maximum span of multiple measurements was lower than 8.37uA. The stable time is less than 23ms and sensitivity is 19.8uA/pF. This circuit is suitable for long-distance and wide-range capacitance detections.

Development of Phased Array Ultrasonic Testing System Using Distributed Architecture

Abstract With more rigorous requirements for reliability and safety of structures and materials, high resolution and fast imaging have been urgent needs of Phased Array Ultrasonic Testing (PAUT). In order to improve the detection resolution and efficiency of complex structures and materials such as ultra-thick carbon steel and honeycomb plate, a PAUT system is proposed in this paper. The system uses a distributed architecture, which not only divides hardware resources, improves system performance, but also is scalable. PA, single- and multi-channel conventional UT, and TOFD (Time Of Flight Diffraction) modalities are combined, and PA modality is carried by the fully parallel non-multiplexed 128 PE (Pulse Echo) electronics with independently adjustable emitting and receiving parameters. In addition, the ultrasound analog front-end circuit is designed using discrete devices, providing more powerful analog performance than integrated chips. GTX (Gigabit Transceiver) and PCIe (Peripheral Component Interconnect Express) are applied to high-speed data transmission, providing raw ultrasound data. Characterization and verification results indicate that the system is ideal for challenging inspections in many industries.

Numerical harmonic modelling of low wattage LED lamps based on parameter estimation algorithms

This paper presents a numerical harmonic modeling approach for 18 low-wattage Light-Emitting Diode (LED) lamps. The proposed methodology utilizes meta-heuristic algorithms, namely Multi-Stage Ant Colony Optimization (MSACO) and Harris Hawk Optimization (HHO), to estimate optimal parameters for the equivalent circuits. Additionally, the study examines eight different configurations of Electromagnetic Interference (EMI) Filter circuits, including their respective parameters, which function as front-end circuits for the Full Bridge Rectifier (FBR) of the LED drivers. Through extensive investigations, the primary objective is to establish generalized and accurate models for various EMI filter circuits that can be universally applied, with validation through comparison against experimental results. Under both MSACO and HHO, the lowest average total error ranges were observed in the LC-Filter and CL-Filter configurations, with errors ranging from 21.302 % and 22.769 %, respectively. On the other hand, the L-Filter and R-only configurations exhibited the highest average total error ranges, with errors of 42.376 % and 44.648 %, respectively. Notably, this paper introduces a non-intrusive, non-invasive method for estimating optimal parameters based solely on measurements obtained from the input terminals of the LED lamps.

Prospective Review of Magneto-Resistive Current Sensors with High Sensitivity and Wide Temperature Range

Current sensors play a vital role in power systems, industrial production, smart devices and other fields, which can provide critical current information in the systems for the safety and efficiency managements. The development of magneto-resistive effect technology in recent years expedites the research process of the current sensors in industrial-level applications. In the review, starting with the development status of the current sensors, the physical mechanisms of the relevant magneto-resistive effects and their early applications as the current sensors are introduced. Several design methods of the magnetic sensors, as well as their merits and shortcomings, are summarized. The performance parameters of the magnetic sensors based on AMR, GMR, TMR and Hall effects are reviewed, including the front-end amplification circuits and conditioning circuits. The industrial applications of the current sensors in the fields of automobiles and photovoltaic inverters are enumerated. The criterions for the current sensors to be used in different scenarios are discussed. In the future, it is imperative to continue the research and development of novel current sensors in order to satisfy the increasingly stringent demands of the industrial developments, in terms of the performance, cost and reliability of the current sensors.

A Novel Battery-Supplied AFE EEG Circuit Capable of Muscle Movement Artifact Suppression

In this study, the fundamentals of electroencephalography signals, their categorization into frequency sub-bands, the circuitry used for their acquisition, and the impact of noise interference on signal acquisition are examined. Additionally, design specifications for medical-grade and research-grade EEG circuits and a comprehensive analysis of various analog front-end architectures for electroencephalograph (EEG) circuit design are presented. Three distinct selected case studies are examined in terms of comparative evaluation with generic EEG circuit design templates. Moreover, a novel one-channel battery-supplied EEG analog front-end circuit designed to address the requirements of usage protocols containing strong compound muscle movements is introduced. Furthermore, a realistic input signal generator circuit is proposed that models the human body and the electromagnetic interference from its surroundings. Experimental simulations are conducted in 50 Hz and 60 Hz electrical grid environments to evaluate the performance of the novel design. The results demonstrate the efficacy of the proposed system, particularly in terms of bandwidth, portability, Common Mode Rejection Ratio, gain, suppression of muscle movement artifacts, electrostatic discharge and leakage current protection. Conclusively, the novel design is cost-effective and suitable for both commercial and research single-channel EEG applications. It can be easily incorporated in Brain–Computer Interfaces and neurofeedback training systems.

Design and performance analysis of manchester coder-based body channel communication using FPGA

In general, the Body Channel Communication (BCC) is used to transmit human physiological signals over vast distances. Also, the Error-correcting codes can detect and rectify faults in long-range data transmission. Data is encoded in a predetermined manner for secure transmission. In this paper, a Manchester encoding-based high throughput architecture is proposed for a body channel communication system with a low-power operation mode. Further, the Manchester encoder is designed for high throughput performance with a low complexity architecture, and an analog front-end processing circuit which includes two stage pre-amplifiers. Also, the transmission rate on the BCC transceiver side is boosted by the maximum Consecutive Identical Digit (CID), which is limited by Manchester codes. The Manchester code format is generated by encoding the sensed data. Additionally, a full gain buffer is used to reduce data loss and hardware overhead. Results demonstrate that the suggested Manchester encoder is implemented in 90 nano meter (nm) technology, and the 10 Megabits per second (Mbps) data rate is obtained with a configurable operating frequency ranging from 1 to 100 Megahertz (MHz).

Design and Analysis of a High-Gain, Low-Noise, and Low-Power Analog Front End for Electrocardiogram Acquisition in 45 nm Technology Using gm/ID Method

In this work, an analog front-end (AFE) circuit for an electrocardiogram (ECG) detection system has been designed, implemented, and investigated in an industry-standard Cadence simulation framework using an advanced technology node of 45 nm. The AFE consists of an instrumentation amplifier, a Butterworth band-pass filter (with fifth-order low-pass and second-order high-pass sections), and a second-order notch filter—all are based on two-stage, Miller-compensated operational transconductance amplifiers (OTA). The OTAs have been designed employing the gm/ID methodology. Both the pre-layout and post-layout simulation are carried out. The layout consumes an area of 0.00628 mm2 without the resistors and capacitors. Analysis of various simulation results are carried out for the proposed AFE. The circuit demonstrates a post-layout bandwidth of 239 Hz, with a variable gain between 44 and 58 dB, a notch depth of −56.4 dB at 50.1 Hz, a total harmonic distortion (THD) of −59.65 dB (less than 1%), an input-referred noise spectral density of <34 μVrms/Hz at the pass-band, a dynamic range of 52.71 dB, and a total power consumption of 10.88 μW with a supply of ±0.6 V. Hence, the AFE exhibits the promise of high-quality signal acquisition capability required for portable ECG detection systems in modern healthcare.

Development of a low-power SAR ADC for analog front-end readout circuit of hydrophones

A low-power 16 bit 250KSa/s successive approximation analog-to-digital converter (SAR ADC) is designed. The capacitor array consists of a 2-segment sub-capacitor array and high sampling makes the coupling capacitance a unit capacitance, solving the problem of fractional capacitance mismatch. The power consumption is reduced by introducing a common-mode voltage during the switching process of the capacitor array. The circuit uses a 4-stage pre-amplifier and adds a dynamically latched comparator using output misalignment calibration to ensure high accuracy resolution. Simulated in DB Hitek 0.18 μm process, the Fast Fourier Transform(FFT) simulation results for 4096 points show that the signal-to-noise distortion ratio (SNDR) of the ADC can reach 90.2 dB and the effective number of bits (ENOB) can reach 14.69 bit. The average power consumption is 2.507mW at a supply voltage of 5 V, and this holds significant significance for the long-term deep-sea detection capabilities of sonar systems.

Complementary integration of organic electrochemical transistors for front-end amplifier circuits of flexible neural implants.

The ability to amplify, translate, and process small ionic potential fluctuations of neural processes directly at the recording site is essential to improve the performance of neural implants. Organic front-end analog electronics are ideal for this application, allowing for minimally invasive amplifiers owing to their tissue-like mechanical properties. Here, we demonstrate fully organic complementary circuits by pairing depletion- and enhancement-mode p- and n-type organic electrochemical transistors (OECTs). With precise geometry tuning and a vertical device architecture, we achieve overlapping output characteristics and integrate them into amplifiers with single neuronal dimensions (20 micrometers). Amplifiers with combined p- and n-OECTs result in voltage-to-voltage amplification with a gain of >30 decibels. We also leverage depletion and enhancement-mode p-OECTs with matching characteristics to demonstrate a differential recording capability with high common mode rejection rate (>60 decibels). Integrating OECT-based front-end amplifiers into a flexible shank form factor enables single-neuron recording in the mouse cortex with on-site filtering and amplification.

Frontiers and challenges in silicon-based single-photon avalanche diodes and key readout circuits

Single-photon detectors enable the detection of extremely weak light with remarkable temporal precision. This capability provides crucial technological support for precise distance measurements and high-resolution imaging under low-light conditions. Silicon and silicon-based germanium single-photon detectors can operate in a wide spectrum from the visible to the near-infrared region, and exhibit fundamental advantages without needing heterogeneous integration. In recent years, there has been continuous progress in the miniaturization of silicon-based single-photon diodes and corresponding read-out circuits. The integration scheme of 3D stacking has enabled the optimization of the devices and circuits at different process nodes. This evolution has comprehensively enhanced system volumes and performances. Thus, detection systems and applications of silicon-based single-photon technology continue to expand. In this paper, we review the structural evolution, performance characterization, manufacturing processes, and analog front-end circuits of single-photon detectors based on CMOS/CIS technology and silicon-based germanium avalanche photodiodes. Additionally, we provide an overview of the critical circuits in typical application scenarios.

Ultra-low noise front-end design for smart optical sensors with high sensitivity and wide dynamic range.

Ultra-low noise is a critical component in the design of high-precision sensor front-ends. We introduced differential phase-sensitive detection (d-PSD) to mitigate both multiplicative and additive noise in optical sensors, aiming for an enhanced performance and cost-effectiveness. The d-PSD combines a capacitive transimpedance amplifier (C-TIA), a delta-sigma analog-to-digital converter (ΔΣ-ADC), and a software-based lock-in amplifier (s-LIA). The first two components utilize the DDC112 (a dual current input 20-bit ADC) for a minimal analog channel length, thus reducing noise efficiently, while the latter employs a cost-effective 32-bit microcontroller unit (MCU), the HC32F460. This approach was successfully implemented as the front-end for a smart optical sensor. Testing indicated that the sensor achieved an equivalent current noise level of 0.6 nA/√Hz, primarily attributed to the light source driver rather than the sensor's front-end circuit. The sensor exhibited an exceptional performance, with a 3σ measurement precision of 5.4 × 10-4 over a 1-second integration time and a dynamic range of 100 dB, leveraging the proposed method and design. Furthermore, the front-end of the sensor boasts a compact size, low power consumption, and affordability, making it an ideal, versatile solution for ultra-high precision, smart optical sensors.

The CMS Fast Beam Condition Monitor for HL-LHC

The high-luminosity upgrade of the LHC brings unprecedented requirements for real-time and precision bunch-by-bunch online luminosity measurement and beam-induced background monitoring. A key component of the CMS Beam Radiation, Instrumentation and Luminosity system is a stand-alone luminometer, the Fast Beam Condition Monitor (FBCM), which is fully independent from the CMS central trigger and data acquisition services and able to operate at all times with a triggerless readout. FBCM utilizes a dedicated front-end application-specific integrated circuit (ASIC) to amplify the signals from CO2-cooled silicon-pad sensors with a timing resolution of a few nanoseconds, which enables the measurement of the beam-induced background. FBCM uses a modular design with two half-disks of twelve modules at each end of CMS, with four service modules placed close to the outer edge to reduce radiation-induced aging. The electronics system design adapts several components from the CMS Tracker for power, control and read-out functionalities. The dedicated FBCM23 ASIC contains six channels and adjustable shaping time to optimize the noise with regards to sensor leakage current. Each ASIC channel outputs a single binary high-speed asynchronous signal carrying time-of-arrival and time-over-threshold information. The chip output signal is digitized,encoded, and sent via a radiation-hard gigabit transceiverand an optical link to the back-end electronics for analysis. This paper reports on the updated design of the FBCM detector and the ongoing testing program.

An 8-channel low power ASIC for Helium-3 tube position sensitive neutron detectors

The majority of neutron spectrometers designated for use in the China Spallation Neutron Source (CSNS) rely on position-sensitive detectors that utilize Helium-3 tube detector technology. To minimize the impact of air on neutron scattering experiments, detectors must be located inside a vacuum chamber. For these types of spectrometers, it is also advisable to house the readout electronics within the vacuum chamber to limit the number of feed-through cables required and enhance the signal-to-noise ratio. This paper proposes an application-specific integrated circuit (ASIC) dedicated to position-sensitive Helium-3 tube detectors, including front-end amplification, shaping module and readout driving buffer. The 8-channel chip, named HEROCV1 (HElium-3 ReadOut Circuits), achieves an input dynamic range from 10 fC to 1 pC, with a counting rate of up to 100 kHz. The equivalent noise charge (ENC) measurement is 1297e-@15pF, and the power consumption is less than 9.9 mW per channel. The ASIC has replaced the traditional front-end circuit based on discrete components, fundamentally addressing the issue of front-end power consumption and enabling the entire detector system to operate in a vacuum environment.

Research and Optimization of High-Performance Front-End Circuit Noise for Inertial Sensors

Research and Optimization of High-Performance Front-End Circuit Noise for Inertial Sensors

A PVT-Robust and 73.9 mHz High-Pass Corner Instrumentation Amplifier with an SCF-SCR-PR Hybrid Feedback Resistor

Analog front-end (AFE) circuits play an important role in the acquisition of physiological signals with low-level amplitudes (from tens of μV to tens of mV) and broadband low-frequency ranges (from sub-Hz to several hundred Hz). Possessing a high input impedance, an instrumentation amplifier (IA) accurately amplifies signals with low amplitude and low frequency, making it suitable for AFE circuits. This work demonstrates a capacitively coupled IA whose feedback resistance is realized by the proposed hybrid resistor, consisting of a switched-capacitor low-pass filter, a switched-capacitor resistor, and a continuous-time low-pass filter. The capacitively coupled IA achieves tera-ohm (TΩ) resistance and is insensitive to process, voltage, and temperature (PVT) variations. The simulation results show that the proposed IA illustrates a high-pass corner of 73.9 mHz, and the change of its high-pass corner with temperature is 0.05 mHz/°C. With the variation in the PVT corners, the difference between the maximum and minimum values of the high-pass corner of the proposed capacitively coupled IA is only 0.06 Hz. The design was implemented in a 130 nm standard CMOS process. The AFE with the proposed capacitively coupled IA achieves a 53.9 dB signal-to-noise and distortion ratio (SNDR) and 69.5 dB total harmonic distortion (THD).