Unity Current Gain Frequency Research Articles

On-demand performance optimization of AlGaN/GaN high electron mobility transistors using stoichiometric variation of dielectric alloy AlxTayO

The current research investigates the potential advantages of optimally combining wide bandgap Al2O3 with high dielectric constant (high-κ) Ta2O5 for gate dielectric applications. Various compositions of 10 nm AlxTayO oxide films are grown on the Al0.3Ga0.7N/GaN heterostructure by co-sputtering Al and Ta metals, followed by thermal oxidation at 500 °C. The average root-mean-square roughness of the grown oxide films is ∼1.2–1.4 nm compared to 0.4 nm for as-deposited metal. X-ray photoelectron spectroscopy and transmission electron microscopyconfirm the formation and thickness of the grown oxide films. The bandgap (Eg) of the oxide films calculated from O1s electron energy loss spectra show a linear increase from 4.85 eV for pure Ta2O5 to 6.4 eV for pure Al2O3. The dielectric constant (εox) calculated from capacitance–voltage (CG−VG) measurements decreases linearly from 25.7 for Ta2O5 to 7.9 for Al2O3. The interface trap density (Dit) is estimated from the frequency dispersion of capacitance–voltage (CG−VG) characteristics. The DC and radio frequency (RF) characteristics of AlxTayO/Al0.3Ga0.7N/GaN high electron mobility transistor (HEMT) devices are measured and compared with the Schottky HEMT devices (without any gate oxide). Compared to Schottky HEMT devices, AlxTayO/Al0.3Ga0.7N/GaN HEMT devices show superior DC characteristics, which helps us achieve maximum RF output power. Furthermore, the OFF-state measurements show that the AlxTayO/Al0.3Ga0.7N/GaN HEMT devices can sustain higher source-to-drain voltages, from a minimum of 88 V on pure Ta2O5 metal-oxide-semiconductor (MOS)-HEMTs to a maximum of 138 V on pure Al2O3 MOS-HEMTs before the dielectric breakdown happens, compared to a 57 V breakdown voltage on Schottky HEMT devices. An oxide variation of AlxTayO, with Al composition ratio of 0.34, shows an exceptional ION/IOFF ratio of 4 × 1011, a gate leakage current of 8 × 10−12 A/mm, a near-ideal subthreshold slope of 63.8 mV/dec, and the unity current gain frequency (fT) of 25.6 GHz.

Composite channel 100 nm InP HEMT with ultrathin barrier for millimetre wave applications

This study introduces a High Electron Mobility Transistor (HEMT) designed for millimeter-wave applications, utilizing a composite channel structure based on InP and InGaAs-InAs-InGaAs. The proposed device incorporates an ultra-thin 2 nm barsrier layer, a distinctive composite channel topology, and a judicious selection of III-V materials. These features collectively contribute to an improved confinement of electrons within the channel, thereby improving the concentration of two-dimensional electron gas (2DEG), and consequently, enhancing the mobility and speed of the device. The proposed device exhibits a unity current gain frequency (f T) of 249 GHz and a maximum oscillation frequency (f MAX) of 523.9 GHz, accompanied by a current gain of 67.7 dB at 0.1 GHz. The off-state leakage current is maintained within the nanoampere range, and the minimum noise figure (NF MIN) is merely 0.76 dB at 10 GHz. A comparative analysis of DC and RF performance, along with an examination of associated parasitic elements, is conducted among various composite channel HEMTs proposed in recent literature. A quantitative justification is provided for the superiority of InGaAs-InAs-InGaAs channel HEMTs, establishing their heightened f T and f MAX. The proposed InGaAs-InAs-InGaAs channel HEMTs exhibit 1.4 times improved f T and f MAX, coupled with only half the NF MIN in comparison to their InGaAs-InP-InGaAs channel counterparts. To further comprehend the device’s behavior under varying RF conditions, a frequency-dependent intrinsic Field-Effect Transistor (FET) model is presented. This model facilitates the analysis of the device’s performance and allows the identification of the impact of individual parameters on the overall system.

Role of Phonon Scattering on the Transport and Performance of an N-Channel Monolayer Black Phosphorus Transistor

We investigate the influence of phonon scattering on the transport properties and performance metrics of a monolayer n-channel black phosphorus transistor within a four-band tight binding Hamiltonian, employing a recursive Green's function algorithm and Buttiker probe scattering model. Our analysis reveals that electron-phonon scattering significantly degrades the on-state current, while its effects in the subthreshold region are found to be negligible. Further examination identifies optical phonons as the primary contributors to the degradation of on-state current, with acoustic phonons playing a less prominent role. The ballisticity of the device declines from 42% to 24% when transitioning from solely acoustic phonon scattering to the combined influence of acoustic and optical phonons. Expanding the placement of Buttiker probes from beneath the gate region to cover the entire path from source to drain results in a further 48% reduction in on-state current. The on-state current exhibits a parabolic relationship with the inverse Kelvin temperature. To quantify the effects of phonon scattering on device performance, we assess the key parameters, transconductance and unity current gain frequency. Phonon scattering is observed to severely impact both the parameters. The on-state transconductance declines from its ballistic value of 24.9 mS/µm to 3.99 mS/µm when both acoustic and optical phonons are concurrently active. Similarly, the unity current gain frequency decreases from 1.18 to 0.2 THz due to phonon scattering. Additionally, our analysis reveals that approximately 7–9% of the total power dissipated within the device is attributed to phonon scattering effects, while the remainder is released through thermalization in the device's contacts. Phonon scattering is shown to induce both lattice cooling and heating, depending on the presence or absence of potential barriers. When a potential barrier exists in the channel, electrons injected from the source experience lattice cooling before the barrier region and lattice heating after crossing the barrier. Including the source and drain contact resistances in our model unveils that achieving a contact resistance value of approximately 100 Ω-µm is crucial for the effective functioning of black phosphorus devices.

DC and RF Performance of an N-channel Monolayer Black Phosphorus Nanoribbon Transistor

Two-dimensional black phosphorus is a relatively new discovery. There are numerous studies on black phosphorus two-dimensional transistors that focus on analog and RF performance. However, the RF performance of black phosphorus nanoribbon transistors is yet to be explored. We use a four-band tight binding Hamiltonian in conjunction with a non-equilibrium Green's function quantum transport simulator to investigate both the DC and RF performance of a monolayer black phosphorus nanoribbon transistor. We found that electron intra-band tunneling is responsible for current flow in the off-state, while in the on-state, the electrons flow over the top of the channel barrier potential. With a VDD of 0.4 volt and a gate length of 5 nm, our black phosphorus nanoribbon transistor has DC performance metrics of 510 µA/µm on-state current, 105 on/off current ratio, and 65 mV/dec inverse subthreshold slope. The device's RF performance characteristics are as follows: cut-off (unity current gain) frequency of 772.84 GHz, maximum oscillation (unity power gain) frequency of 1.15 THz, and open circuit voltage gain of 26.7 dB with transistor operating in the on-state. The RF performance of the device is found to be significantly impacted by the source and drain contact resistances. With source and drain resistances set to zero, the cut-off frequency increases to 995.23 GHz and the unity power gain frequency increases to 4.16 THz. The device shows unconditional stability above 893 GHz and it is conditionally stable below this frequency.

Improved RF-DC characteristics and reduced gate leakage in GaN MOS-HEMTs using thermally grown Nb2O5 gate dielectric

This work demonstrates the improvement in DC and RF characteristics and a reduction in the gate leakage current for thermally grown Nb2O5 as a gate dielectric in AlGaN/GaN metal–oxide–semiconductor high electron-mobility transistors (MOS-HEMTs). The MOS-HEMTs with an amorphous 10 nm thick Nb2O5 as the gate dielectric show a reduced gate leakage current of 10−9 A mm−1. Nb2O5 thin film creates a tensile strain in the AlGaN layer, enhancing the density of two-dimension electron gas (2-DEG). The performance of the device also improves in terms of saturation drain current, peak transconductance, subthreshold swing, and unity current gain frequency. An increase in the source-to-drain ON/OFF current ratio to 108 and a significant reduction in the subthreshold leakage current by at least two orders of magnitude are measured compared to the control HEMTs.

Performance improvement in NiO x -based GaN MOS-HEMTs

We have illustrated the thermal oxidation of Ni as gate dielectrics to improve the characteristics of GaN-based metal oxide semiconductor high electron mobility transistors (HEMTs). The oxide is formed by a pre-deposition of a thin film followed by oxidation in pure O2 ambient. The formation and thickness of the oxides are confirmed through x-ray photoelectron spectroscopy and transmission electron microscopy. NiO x is found to have an energy band gap of 3.7 eV determined using O 1s energy loss spectra. NiO x is found to provide negative (1.7 eV) valence band offsets with AlGaN. The potential use of the oxides has been confirmed by the significant improvement in drive current, transconductance, subthreshold swing, unity current gain frequency, and gate current leakage over the Schottky barrier HEMTs (SB-HEMTs). We have observed a positive shift in threshold voltage for NiO x -based gate dielectric devices compared to that of the SB-HEMTs.

Improvements From SiC Substrate Thinning in AlGaN/GaN HEMTs: Disparate Effects on Contacts, Access and Channel Regions

We report the positive effects of SiC substrate thinning on the DC and RF performance of AlGaN/GaN high electron mobility transistors (HEMTs). The substrate is thinned down from 500 to ~ 100 μm. This leads to a strain redistribution at the AlGaN/GaN interface confirmed through X-ray diffraction measurements. The contact resistance decreases significantly. The two-dimensional electron gas (2DEG) density decreases, and mobility increases in the source/drain access regions from reduced polarization. The decrease in 2DEG dominates, leading to an increase in the sheet resistance. An opposite trend is manifested in the channel region below the gate contact. The increase in mobility and saturation velocity dominates the decrease in the 2DEG density, which is minimal. The channel resistance decreases. The combined effects of contact, access, and channel regions are further investigated and verified in high-performance AlGaN/GaN HEMTs. The ON-resistance decreases, and saturation drain current increases substantially. The RF performance in critical parameters, including unity-current gain frequency (f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T</sub> ), gain, and output power density, increases significantly. The disparate effects of the contact, access, and channel regions are used in a calibrated TCAD simulator, which shows consistent HEMT performance improvements as observed experimentally.

A 36.7 mW, 28 GHz receiver frontend using 40 nm RFCMOS technology with improved Figure of Merit

High carrier frequency requirement (Sub 6, 28 GHz) to accomplish the high bandwidth specification for millimeter wave band wireless communication, has reduced the ratio of operating carrier frequency (fc) and unity current gain frequency (ft) of MOSFETs in state of the art RFCMOS technology. This poses a challenge for designing a high gain and low noise receiver with better linearity. In an attempt to realize such receiver, this paper presents a 28 GHz receiver front-end in 40 nm RFCMOS technology. It includes 3-stage low noise amplifier incorporating push pull topology, current bleeding down converting gilbert cell based mixer with common gate transconductance stage followed by a standard Gm-C filter. By incorporating these techniques, the performance of the proposed receiver improved in terms of linearity as compared to the state of the art designs. For a comprehensive analysis, the combined effect of performance parameters has been compiled into a single metric i.e. Figure of Merit (FOM). The proposed receiver exhibits conversion gain of 30.5 dB and 2.15 dB noise figure with linearity parameter IIP3 being −21.7 dBm while consuming 36.7mW power resulting in FOM value of 0.27.

Odd-Mode Instability Analysis of f T-Doubler Hybrid Power Amplifiers Based on GaN-HEMT

This brief is aimed to investigate and resolve the odd-mode instability of a hybrid high-frequency power amplifier (PA) based on the f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> T</sub> -doubler technique. A description of odd-mode stability based on pole-zero identification is performed to provide insight into the causes of the odd-mode oscillation. The unwanted right half poles (RHPs) at frequencies less than the unity gain frequency, resulting from the circuit configuration, corrupt the PA operation. Reducing the length of the interconnects and tuning the values of the circuit elements is a conventional approach to get rid of the RHPs. However, in practice, in hybrid technology, there is poor control over interconnects. Besides, changing the circuit elements to prevent the odd-mode instability results in performance degradations such as a reduction in power gain, output power, power added efficiency (PAE), and unity current gain frequency ( f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> T</sub> ). A proposed f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> T</sub> -doubler PA using Wilkinson combiner with a calculated odd-mode resistor is exploited to overcome the odd-mode oscillation and relax the trade-off between odd-mode stability and performance of the PA. The measurement of the modified f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> T</sub> -doubler GaN-HEMT PA with Wilkinson combiner demonstrates a broadband PA with a stable behavior.

Impact of Relative Gate Position on DC and RF Characteristics of High Performance AlGaN/GaN HEMTs

We have investigated the impact of relative gate position between source and drain on the DC and RF characteristics for AlGaN/GaN high electron mobility transistors. Devices with fixed source drain separation ( ${L}_{\text {SD}}$ ) of $5~\mu \text {m}$ , width ( ${W}$ ) of ${2}\times {50}\,\,\mu \text {m}$ and gate length ( ${L}_{G}$ ) of 200 nm are fabricated and characterized. The relative position of the gate is varied with constant ${L}_{\text {SD}}$ . The value of saturation drain current ( ${I}_{\text {DS},\text {sat}}$ ) and maximum transconductance ( ${g}_{m,\text {max}}$ ) change from 740 mA/mm and 168 mS/mm for gate to source separation ( ${L}_{\text {GS}}$ ) of $3.8~\mu \text {m}$ to 1071 mA/mm and 245 mS/mm for ${L}_{\text {GS}} = {0.25}\,\,\mu \text {m}$ , respectively. The corresponding breakdown voltage ( ${V}_{\text {br}}$ ) significantly improves from 65 V (for ${L}_{\text {GS}} = {3.8}\,\,\mu \text {m}$ ) to 189 V (for ${L}_{\text {GS}} = {0.25}\,\,\mu \text {m}$ ). The unity current gain frequency ( ${f}_{T}$ ) is observed to remain constant at 55 GHz for all positions of the gate. However, output power density is found to increase from 3.8 to 5.1 W/mm for the same relative change in the gate position.

The analog/RF performance of a strained-Si graded-channel dual-material double-gate MOSFET with interface charges

The analog/radiofrequency (RF) performance of a strained-silicon (s-Si) graded-channel dual-material double gate (GC-DMDG) metal–oxide–semiconductor field-effect transistor (MOSFET) with interface charges is investigated by using Sentaurus technology computer-aided design (TCAD) software. The analog/RF figures of merit of the proposed s-Si GC-DMDG MOSFET, including the intrinsic voltage gain, transconductance generation factor, early voltage, unity-current gain frequency ( $$f_{\rm t}$$ ), transconductance–frequency product (TFP), gain–frequency product (GFP), and gain–transconductance–frequency product (GTFP), are evaluated for different values of device parameters such as the strain in the silicon, the interface charge density, and the thicknesses of the oxide and substrate layers. The simulation results exhibit that the proposed s-Si GC-DMDG MOSFET device attains lower values of transconductance and output conductance and a higher value of early voltage compared with the s-Si graded-channel double-gate (GC-DG) MOSFET. Besides, the proposed s-Si GC-DMDG MOSFET device provides better performance in terms of $$f_{\rm t}$$ , TFP, GFP, and GTFP in comparison with the s-Si GC-DG MOSFET in the strong inversion region, and vice versa in the subthreshold region.

$\beta$ -Ga2O3 Delta-Doped Field-Effect Transistors With Current Gain Cutoff Frequency of 27 GHz

As an ultra-wide bandgap semiconductor, $\beta $ -Ga2O3 has attracted great attention for high-power, high-voltage, and optoelectronic applications. However, until now, high-frequency performance of gallium oxide devices has been limited to relatively low current gain cutoff frequencies below 5 GHz. Here, we show that highly localized delta-doping designs can enable high-sheet-charge density to enable devices with short gate lengths that allow high-frequency operation. Field-effect transistors with a gate length of 120 nm on such delta-doped $\beta $ -Ga2O3 are reported here with extrinsic unity current gain frequency of 27 GHz. The device has a peak drain current of 260 mA/mm, transconductance (gm) of 44 mS/mm, and three-terminal off-state breakdown voltage of 150 V. These results demonstrate that the potential of $\beta $ -Ga2O3 for future RF and millimeter-wave device applications.

Design and Performance Analysis of Hybrid SELBOX Junctionless FinFET

In this work, the performance of selective buried oxide junction-less (SELBOX-JL) transistor at a FinFET structure is analysed using numerical simulations. The proposed structure exhibits better thermal resistance (RTH), which is the measure of the self-heating effect (SHE). The DC and analog performances of the proposed structure were studied and compared with the conventional and hybrid (or inverted-T) JLFinFETs (JLTs). The ION of the hybrid SELBOX- JLFinFET is 1.43x times better than the ION of the JLT due to the added advantage of different technologies, such as 2D-ultra-thin-body (UTB), 3D-FinFET, and SELBOX. The proposed device is modeled using sprocess and simulation study is carried using sdevice. Various analog parameters, such as transconductance (gm), transconductance generation factor (TGF = gm/IDS), unity current gain frequency (fT), early voltage (VEA), total gate capacitance (Cgg), and intrinsic gain (A0), are evaluated. The proposed device with a minimum feature size of 10nm exhibited better TGF, fT, VEA, and A0 in the deep-inversion region of operation.

Realization of a broadband hybrid X-band power amplifier based on fT-doubler technique

This paper presents the design steps for the fabrication of a hybrid microwave power amplifier (PA) based on fT-doubler technique. The PA is implemented using two 6 W discrete GaN-HEMTs on SiC substrate. The fT-doubler technique is used to enhance the frequency response and bandwidth of the PA as compared to the common source (CS) configuration. Accurate simulation results show about 90% improvement in the unity current gain frequency (fT) for the fT-doubler structure in comparison with a common-source parallel structure. However, the hybrid realization of a high-frequency PA based on fT-doubler technique is challenging mainly due to severe thermal management failures and large parasitic effects of the interconnections such as bond wires and long microstrip lines. The proposed hybrid integrated strategy relieves the thermal problem while the parasitic effects are well controlled. Thermal analysis and accurate 3D thermal simulation of the proposed hybrid integrated structure show that the channel temperature of transistors does not exceed its maximum tolerable value. Implementing the optimal source/load pulls for the transistors and well-designing the input/output matching networks by considering the parasitic effects of the interconnections result in a fabricated PA with a broad bandwidth of 6.5–10.4 GHz, a sufficient small-signal gain of 10 dB, a considerably high output power (Pout) of around 10 W and a power added efficiency (PAE) of 43% at 8 GHz.

Design &amp; Optimization of Gate-All-Around Tunnel FET for Low Power Applications

This paper investigates the performance of tri material gate tunnel field effect transistor (TMGTFET) device designed in gate all around (GAA) configuration. The device performance is analyzed by varying various device related parameters like: drain doping, oxide thickness and radius of silicon core. Simulations are performed using technology computer-aided design (TCAD) tool at 60 nm gate length. Simulation results show that the performance of TMGTFET device can be optimized by proper selection of device parameters so as to achieve improvements in the ON current, OFF current, sub-threshold swing and ambipolar current. The silicon based TMGTFET device demonstrates good performance which makes it a suitable candidate for low power applications with ON current of 0.386 µA/µm, average sub-threshold swing of 32.06 mV/decade, maximum current gain cut off frequency of 41.4 GHz and extremely low OFF current value of the order of 10-20A/µm. We have performed the device optimization to boost the ON current and improve the sub-threshold slope in order to make sure that this device configuration becomes suitable for both low power and high performance applications. The proposed hetero dielectric tri material gate tunnel FET device (HD-TFET) designed in gate all around configuration achieves 19.7 times improvement in ON current as compared to TMGTFET device and excellent average sub-threshold swing of 21.2 mV/decade. The maximum unity current gain frequency is also improved by 3 times indicating its potential for deployment in high frequency applications.

Reduced Contact Resistance and Improved Transistor Performance by Surface Plasma Treatment on Ohmic Regions in AlGaN/GaN HEMT Heterostructures

A significantly reduced contact resistance and an improved DC and RF performance is demonstrated for AlGaN/GaN high electron mobility transistors by surface plasma treatments on ohmic regions in GaN‐based heterostructures. Various plasma processes using BCl3, Cl2, Ar, SF6, and their combinations are considered. While it is known that certain plasma treatments can remove native oxide and thereby reduce the ohmic contact resistance, detailed experiments are performed to further enhance the understanding. In addition, a second aspect of the plasma treatment is shown, where the controlled physical component of the etching process can improve the AlGaN surface morphology. This in turn can reduce the tunneling resistance for the carriers from the alloyed contact to the two‐dimensional electron gas. The contact resistance is found to decrease to 0.10 from 0.65 Ω mm for Ar, Cl2, and BCl3 treated sample in comparison to that of the control sample. The corresponding transconductance, saturation drain current, and unity current gain frequency are found to increase by 30, 37, and 41% for the high electron mobility transistors fabricated on the same sample.

Surface stoichiometry modification and improved DC/RF characteristics by plasma treated and annealed AlGaN/GaN HEMTs

We demonstrate that N2 and O2 plasma treatment followed by rapid thermal annealing leads to surface stoichiometry modification in a AlGaN/GaN high electron mobility transistor. Both the source/drain access and gate regions respond positively improving the transistor characteristics albeit to different extents. Characterizations indicate that the surface show the characteristics of that of a higher band-gap material like AlxOy and GaxOy along with N-vacancy in the sub-surface region. The N-vacancy leads to an increased two-dimensional electron gas density. The formation of oxides lead to a reduced gate leakage current and surface passivation. The DC characteristics show increased transconductance, saturation drain current, ON/OFF current ratio, sub-threshold swing and lower ON resistance by a factor of 2.9, 2.0, 103.3, 2.3, and 2.1, respectively. The RF characteristics show an increase in unity current gain frequency by a factor of 1.7 for a 500 nm channel length device.

Performance improvement and better scalability of wet-recessed and wet-oxidized AlGaN/GaN high electron mobility transistors

We have demonstrated that a thin layer of Al2O3 grown by wet-oxidation of wet-recessed AlGaN barrier layer in an AlGaN/GaN heterostructure can significantly improve the performance of GaN based high electron mobility transistors (HEMTs). The wet-etching leads to a damage free recession of the gate region and compensates for the decreased gate capacitance and increased gate leakage. The performance improvement is manifested as an increase in the saturation drain current, transconductance, and unity current gain frequency (fT). This is further augmented with a large decrease in the subthreshold current. The performance improvement is primarily ascribed to an increase in the effective velocity in two-dimensional electron gas without sacrificing gate capacitance, which make the wet-recessed gate oxide-HEMTs much more scalable in comparison to their conventional counterpart. The improved scalability leads to an increase in the product of unity current gain frequency and gate length (fT×Lg).

Flexible Graphene Field-Effect Transistors Encapsulated in Hexagonal Boron Nitride.

Flexible graphene field-effect transistors (GFETs) are fabricated with graphene channels fully encapsulated in hexagonal boron nitride (hBN) implementing a self-aligned fabrication scheme. Flexible GFETs fabricated with channel lengths of 2 μm demonstrate exceptional room-temperature carrier mobility (μFE = 10 000 cm(2) V(-1) s(-1)), strong current saturation characteristics (peak output resistance, r0 = 2000 Ω), and high mechanical flexibility (strain limits of 1%). These values of μFE and r0 are unprecedented in flexible GFETs. Flexible radio frequency FETs (RF-FETs) with channel lengths of 375 nm demonstrate μFE = 2200 cm(2) V(-1) s(-1) and r0 = 132.5 Ω. Unity-current gain frequencies, fT, and unity-power gain frequencies, fmax, reach 12.0 and 10.6 GHz, respectively. The corresponding ratio of cutoff frequencies approaches unity (fmax/fT = 0.9), a record value for flexible GFETs. Intrinsic fT and fmax are 29.7 and 15.7 GHz, respectively. The outstanding electronic characteristics are attributed to the improved dielectric environment provided by full hBN encapsulation of the graphene channel in conjunction with an optimized, self-aligned device structure. These results establish hBN as a mechanically robust dielectric that can yield enhanced electronic characteristics to a diverse array of graphene-based flexible electronics.

Performance of CMOS With Si pMOS and Asymmetric InP/InGaAs nMOS for Analog Circuit Applications

We propose a novel hybrid CMOS comprising a Si-channel pMOSFET and an asymmetric InP/InGaAs nMOSFET in the nanometer regime for analog applications. The performance of such a CMOS is evaluated in terms of voltage gain and gain-bandwidth (GBW) product at two different channel lengths (L <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">g</sub> ), 50 and 30 nm, using extensive device simulations. Our investigations reveal that the maximum gain of the hybrid CMOS inverter is improved by 37.5% and 92.1% for asymmetric In <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.75</sub> Ga <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.25</sub> As nMOS devices with InP drain at L <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">g</sub> = 30 nm for W <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">p</sub> /W <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</sub> = 3 and 8, respectively, as compared with an equally sized Si inverter having W <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">p</sub> /W <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</sub> = 3. In addition, GBW product of hybrid CMOS (HAS3) comprising asymmetric In <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.75</sub> Ga <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.25</sub> As nMOSFET with InP source and Si pMOSFET is increased by 148.1% and 260.4% at L <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">g</sub> = 30 and 50 nm, respectively, for W <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">p</sub> /W <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</sub> = 3, compared with its Si counterpart. Furthermore, the HAS3 device yields the highest GBW peak, unity current gain frequency, and maximum oscillation frequency as compared with other hybrid and Si CMOS devices at L <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">g</sub> = 30 and 50 nm.