Freewheeling Path Research Articles

A Highly Reliable Three-Level Neutral-Point-Clamped Inverter With Anti-Shoot-Through Capability

In this article, a high-reliability three-level inverter construction method is proposed to address the risks of shoot through in neutral-point-clamped inverter (NPC). Several highly reliable three-level inverters are discussed in brief. Two types of risks are analyzed when capacitors are shot through. Then, two principles for constructing highly reliable inverters are summarized. Besides, a split-inductor hybrid NPC inverter with anti-shoot-through capability is constructed by using the two principles. Power switches and diodes are connected in series to form the inverter legs. Split inductor is inserted in capacitor loops to suppress the short-circuited current. As a result, the novel structure is able to suppress the shoot-through current for all capacitors and power devices. The voltage stress of all switches and diodes is half of the dc voltage and multiple freewheeling paths are maintained. Finally, simulations and experiments are presented to verify the two principles and the shoot-through current suppression performance.

A Novel Dead-Time Elimination Method for Voltage Source Multilevel Converters

Voltage source multilevel converters (MLCs) are widely applied in recent years in a wide range of industrial applications. However, time delay inserted in switching signals to prevent short through can cause the dead-time effects, including output waveform distortion and voltage drop. In many kinds of MLCs, the freewheeling paths during dead time can also produce unexpected output voltage levels, which can cross a few consecutive output levels, introducing large <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">dv</i> / <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">dt</i> . Typical examples of those MLCs are 5L-active neutral-point-clamped, 7L-hybrid-clamped, 4L-nested neutral-point-clamped (NNPC) converter, etc. To solve this problem, a generic dead-time elimination (DTE) method is proposed. This method splits the complementary switches and replaces them with controllable switches coupled with uncontrollable diodes, decomposing the phase-leg of the converter into two basic switching cells, thus obviating the need for dead time. To address the zero-current clamping effect inherent to the DTE method, a second-order generalized integrator frequency-locked loop based current detector is also developed. The proposed DTE method is suitable for various MLCs. It cannot only effectively eliminate the unexpected levels, but also significantly reduce the output distortion and regains the output rms value. An application example of 4L-NNPC converter is given. The effectiveness of the proposed method is verified by both simulation and experiment.

Commutation Scheme of Seven-Level Hybrid-Clamped Converters With Suppressed Deadband-Induced Voltage Spikes

A seven-level hybrid-clamped (7L-HC) converter is a promising option for medium-voltage drives due to its low number of devices and the ability to well balance all the capacitors. However, like other hybrid-clamped multilevel converters, the freewheeling paths during deadtime can produce unexpected output voltage levels. The unexpected output voltage can cross a few consecutive output levels, introducing a large dv/dt to the system. To address this problem, in this article, we conduct a detailed study of the mechanism that produces such undesirable voltages and propose a commutation scheme to coordinate the turn-on/off sequence of switches in the 7L-HC converters. The proposed method is based on an easy-to-implement bitwise operation of switching vectors, where the number of switching actions is not increased. The proposed method is validated by both simulation and experimental results.

A generalized symmetrical MLI topology with improved commutation

A generalized symmetrical multilevel inverter (MLI) topology with an essential feature of smooth commutation during the dead time for inductive loads is presented in this paper. It consists of a level generation unit (LGU) and polarity generation unit (PGU); Both LGU and PGU provide a freewheeling path for load current during the dead time for an inductive load which avoids large voltage spikes across the output. This topology can also generate the required number of levels at the output with a minimum number of components. As it requires fewer components, switching losses, installations space, and cost of the implementation are low. In this paper, a seven-level structure derived from the generalized topology is considered for detailed analysis. Further, to show the effectiveness of the proposed MLI topology over the existing symmetrical topologies in overcoming commutation problem, simulations were performed and are validated with experimental results. A comparative study is made in terms of power switches, power diodes, clamping capacitors, and driver circuits between traditional, recent, and proposed topologies.

Leakage current repression and real-time spectrum analysis with chirp Z-transform for a novel high-efficiency PV-based inverter applicable in micro-grids

One of the most critical elements in the connection of photovoltaic (PV)-based systems used to generate electricity from solar energy is the inverter. The harmonic effects of the inverters to be connected to the grid should be as low as possible, and the total harmonic distortion (THD) should be less than 10%. A high THD value will distort the power quality on the grid side. For this reason, the THD value of the inverters in the grid connection approaches must be determined by spectral analysis to ensure that the necessary protection and improvements are made technically. In this study, a novel inverter topology, including six power switches and two power diodes, is presented, and the voltage data obtained from a grid-connected inverter are acquired in real time, and spectrum analysis is performed with the software developed with LabVIEW. The power efficiency of the proposed inverter is compared with conventional inverter types such as HERIC, H5, and H6 inverters. One of the novelty aspects of the proposed inverter topology is forming a proper freewheeling path including switches and diodes in the inverter branches that can provide a separate DC and ac components, and as a result, this prevents the following the PV side leakage currents to the ac grid side. In the spectrum analysis, the chirp Z-transformation (CZT) was used along the contours of the Z-transformation outside the unit circle. Using CZT, the z-transform was calculated for the inverter output voltage along the spiral lines in the z-plane. Besides, spectrum analysis was performed with fast Fourier transform (FFT) and compared with CZT. The results show that the CZT transformation is more efficient than the FFT algorithm and is useful in calculating a subset of FFT for a sequence. The performance of the proposed inverter is compared with conventional topologies. Hardware implementation and the output signals and the leakage current waveforms are also presented.

DC Fault Current Blocking With the Coordination of Half-Bridge MMC and the Hybrid DC Breaker

In this article, a modified hybrid dc breaker and a half-bridge modular multilevel converter (MMC) are employed to interrupt the dc fault current in a high-voltage direct current transmission system. In the hybrid dc breaker, parallel to the main branch, a series connection of an energy-absorbing capacitor and a Thyristor stack is employed. When a dc fault current is recognized, the Thyristor stack is triggered and the load commutation switch in the main branch is turned off. In addition, in the fault clearing state, the MMC is programmed to generate zero voltages at all arms. Using this mechanism, a second-order RLC circuit with zero input is formed, and the fault current is cleared in a very short time. A freewheeling path is provided to bypass the dc line when the equivalent inductance seen from the dc line is large. In contrast to conventional approaches, the peak of dc fault current is limited to a specific limit and the necessity to ultrafast mechanical switches is avoided. In addition, the amplitude of arms currents and corresponding insulated-gate bipolar transistors are kept in the safe operating area. A detailed circuit analysis of the new method is given and design formulas are extracted. Simulation results are provided in PSCAD/EMTDC environment, and experimental results are presented for a scaled-down prototype.

Analysis and Design Considerations of Efficiency Enhanced Hierarchical Battery Equalizer Based on Bipolar CCM Buck–Boost Units

Compared with the conventional hard switching battery equalizers, hierarchical battery equalizer based on the bipolar continuous-conduction mode buck-boost units could effectively reduce the switching loss and improve the conversion efficiency. This paper mainly addresses the key technical challenges associated with the optimal design of this battery equalizer. The inductor current is controlled to enter into the negative region. Thus, the mosfet body diode provides a freewheeling path for the inductor current during the dead band. This ensures zero-voltage switching turn-on of both power mosfets in each buck-boost unit without auxiliary snubbers. Therefore, the switching losses are significantly reduced. Meanwhile, the integral of the inductor negative current is precisely controlled to minimize the circulating current. This guarantees both minimized conduction losses and suitable equalization speed. Furthermore, an equalization algorithm, which compensates the battery internal resistance induced state-of-charge error, is proposed to improve the equalization accuracy. The operating principles and design considerations are analyzed in detail. An experimental prototype to balance four series-connected lithium-ion battery cells is implemented. The experimental results validate the design of the equalizer and demonstrate obvious efficiency enhancement over the conventional method.

Comparison of SiC Voltage Source Inverters Using Synchronous Rectification and Freewheeling Diode

For power converters with inductive loads, a freewheeling path is needed for the current due to reactive power. The MOSFET synchronous rectification (SR) is widely used to reduce the conduction loss during the freewheeling period. Due to the wide band gap of silicon carbide (SiC), the intrinsic body diode of SiC MOSFET exhibits a high voltage drop. Hence, an antiparallel SiC Schottky diode is normally implemented to eliminate its conduction. However, the external SiC Schottky diode is not fully utilized as it only works during the dead time. In this paper, the hard-switching SR is investigated in an SiC three-phase inverter and compared with a conventional inverter using freewheeling diode (FWD). An improved power loss model for the two inverters has been developed. It is found that the inverter using SR has higher efficiency due to the smaller switching loss. A 7-kW prototype of SiC three-phase inverter is built, which achieves a peak efficiency of 98.8% ( $\pm$ 0.15%) and 98.5% ( $\pm$ 0.15%) at 40 kHz using SR and FWD, respectively. This paper confirms that the SiC MOSFET is an ideal candidate for the SR.

Modeling Bidirectional Contactless Grid Interfaces With a Soft DC-Link

Inductively coupled, bidirectional grid interfaces are gaining popularity as an attractive solution for vehicle-to-grid (V2G) and grid-to-vehicle (G2V) systems. However, such systems conventionally employ a large, electrolytic dc-link capacitor as well as a large input inductor, leading to expensive, bulky, and less reliable systems. Although, matrix converter (MC) based bidirectional inductive power transfer (BD-IPT) grid interfaces have been proposed as an alternative, implementation of safe and reliable MCs in BD-IPT applications is still a challenge, owing to the absence of natural freewheeling paths and higher complexity. As a solution, this paper proposes a new, inductively coupled, bidirectional grid interface, without a dc-link capacitor and an input inductor, consisting of two back-to-back connected converters. In contrast to existing bidirectional grid converters, the proposed system employs a simpler switching strategy with a lower switching frequency. A mathematical model, which predicts the behavior of the introduced system, is also presented. The feasibility of the proposed technique and the accuracy of the mathematical model are demonstrated through both simulations and experimental results of a 1.1-kW prototype system.

A Quasi-Unipolar SPWM Full-Bridge Transformerless PV Grid-Connected Inverter with Constant Common-Mode Voltage

The unipolar sinusoidal pulsewidth modulation (SPWM) full-bridge transformerless photovoltaic inverter with ac bypass brings low conduction loss and low leakage current. In order to better eliminate the leakage current induced by the common-mode voltage, the clamping technology can be adopted to hold the common-mode voltage on a constant value in the freewheeling period. A full-bridge inverter topology with constant common-mode voltage (FB-CCV) has been derived and proposed in this paper, two unidirectional freewheeling branches are added into the ac side of the FB-CCV, and the split structure of the proposed freewheeling branches does not lead itself to the reverse-recovery issues for the freewheeling power switches and as such superjunction MOSFETs can be utilized without any efficiency penalty. The passive clamping branches consist of a capacitor divider and two diodes, is added into the dc side of the FB-CCV, therefore, the weakness of active damping branch has been overcome, and the better clamping performance has been achieved in the freewheeling period. In the dead time between the main switches and the freewheeling switches, the antiparallel diodes of diagonal main switches of the FB-CCV form the freewheeling path to clamp the common-mode voltage at a constant value, and a quasi-unipolar SPWM strategy is presented. The operation principle, differential-mode, and common-mode characteristics of the FB-CCV, Heric, H6, and HB-ZVR topologies are analyzed and compared in detail. Finally, the viability of the FB-CCV is verified by a universal prototype inverter rated at 5 kW.

Optimised full‐bridge transformerless photovoltaic grid‐connected inverter with low conduction loss and low leakage current

The unipolar sinusoidal pulse width modulation (SPWM) full-bridge inverter brings high-frequency common-mode voltage, which restricts its application in transformerless photovoltaic grid-connected inverter. The freewheeling path added in ac side is adopted to restrict leakage current, but the common-mode voltage is variable at switching frequency scale. To solve this problem, an improved full-bridge structure with two switches and a capacitor divider has been proposed, which guarantees that freewheel path is clamped to half of input voltage in freewheel period. Sequentially, the high-frequency common-mode voltage has been avoided in unipolar SPWM full-bridge inverter. The operation mode and the clamping mode are analysed, and several related topologies are discussed. Finally, the differential-mode and common-mode performance of the proposed topology are verified by a universal prototype inverter rated at 1 kW.

Safe-Commutation Strategy for the Novel Family of Quasi-Z-Source AC–AC Converter

A novel quasi-Z-source ac-ac converter for voltage sag/swell compensation in smart grids is proposed in this paper. Derived from the basic ac-ac safe-commutation mechanism, a new voltage-based commutation strategy is developed, which is achieved without snub circuit and only by sampling the output voltage. Therefore, the control circuit is simplified greatly. Two switches in a one-phase loop are always turned on for current freewheel path in dead time, and current spike and voltage spike are solved well. Compared with conventional ac-ac converters, fewer switches conduct with soft switching during operation, resulting in high efficiency. Then, the proposed converter is analyzed, including the operating modes and voltage ration based on a state-space average. The experimental results validate the theoretical predication well. The safe-commutation strategy can also be easily applied to other converters of the proposed family.

Research of One-Step Commutation Strategy in Matrix Rectifier

Due to the absence of natural free-wheeling paths, the commutation in matrix rectifiers is much more complicated than in the other kinds of AC-DC converters. In this paper, based on the measurement of the output current direction and the signs of the input line-to-line voltages, a new one-step commutation strategy is applied in the design of matrix rectifier. Experimental results show that the new method is valid and feasible, founding a basis of further practical application.

An Optimized Transformerless Photovoltaic Grid-Connected Inverter

Unipolar sinusoidal pulsewidth modulation (SPWM) full-bridge inverter brings high-frequency common-mode voltage, which restricts its application in transformerless photovoltaic grid-connected inverters. In order to solve this problem, an optimized full-bridge structure with two additional switches and a capacitor divider is proposed in this paper, which guarantees that a freewheeling path is clamped to half input voltage in the freewheeling period. Sequentially, the high-frequency common-mode voltage has been avoided in the unipolar SPWM full-bridge inverter, and the output current flows through only three switches in the power processing period. In addition, a clamping branch makes the voltage stress of the added switches be equal to half input voltage. The operation and clamping modes are analyzed, and the total losses of power device of several existing topologies and proposed topology are fairly calculated. Finally, the common-mode performance of these topologies is compared by a universal prototype inverter rated at 1 kW.

Dual-Tap Chopping Stabilizer With Mixed Seminatural Switching. Analysis and Synthesis

Onload tap changers based on silicon-controlled rectifiers or triacs are widely used to regulate ac voltage. Response time is bigger than half-cycle due to the natural commutation used during the zero-current crossing. N. Burany proposed a commutation method for direct ac/ac matrix converters based on power transistors, or other switches with active turn-off, by permitting a freewheeling current path during commutation. This can be applicable to tap changers and release commutation from the zero-current crossing, thus allowing a faster voltage regulation. This paper presents a new two-tap chopped ac/ac voltage stabilizer with compensating transformer and PWM frequency in the order of 5 kHz based on this kind of commutation. The circuit proposed, resulted from a topology search guided by an iterative analysis+synthesis cost comparative method, fits well to low voltage stabilizers and regulators in the range of 0.1 to 1000 kVA and 1 ms response time. The switching behavior and the input and output filtering is fully analyzed. An exhaustive synthesis study follows, giving the component rates as a function of the equipment specification. This allows an easy equipment cost evaluation. Experimental results with IGBT switches are obtained in a 1 kVA prototype.

Control of high-frequency AC link electronic transformer

An isolated high-frequency link AC/AC converter is termed an electronic transformer. The electronic transformer has size and cost advantages over a conventional transformer because of high-frequency operation of the magnetic core. Of the various topologies of electronic transformer, the high-frequency AC link electronic transformer achieves high-frequency AC power transformation without a DC link. The circuit uses the standard H-bridge, one on either side of the high-frequency transformer. A novel PWM scheme is proposed, which symmetrically delays and advances the phase of the left and right legs of the front-side converter with respect to the output-side converter. The proposed scheme introduces freewheeling sub-periods, which results in zero voltage switching in the output-side converter. The electronic transformer as an AC automatic voltage regulator (AVR) offers distinct advantages over a conventional servo voltage stabiliser in terms of size and speed of response. The AVR application is discussed and experimental results of a 500 VA AVR are presented. A four-quadrant switch presents difficulties in turning off inductive load current because of the absence of a freewheeling path in the switch. A biasing circuit is proposed to convert the potentially lossy switching transition into lossless transition. Simulation and experimental results with the biasing circuit are presented.

Robust Control of Discrete Bidirectional Switches in Matrix Converters Based on Rectifier Theory

Due to the non-existence of natural freewheeling paths the commutation in matrix converters is more complicated than in voltage source converters. The proposed interlock-free control for the bidirectional switches where both current directions can be controlled independently is based on the knowledge of the signs of the line to line input voltages and the load current directions. The suggested policy is compared with multi-step commutation methods. Finally some measurement results of the forward recovery effect of new reverse and non reverse blocking IGBTs are presented.

Control of Single Phase Induction Motor Using Forced-Commutated Electronic Switches and Free-Wheeling Paths

Single phase induction motors show better performance and have less cost if they are controlled using electronic switches instead of mechanical switches. This paper suggests a semiconductor-based method to start the motor and to control the speed and the direction of rotation. This is achieved by feeding the two stator windings of a split-single-phase motor via two forced-commutated solid-state devices. Meanwhile, each winding is shunted by a free-wheeling path that is controlled as well by a forced-commutated solid-state device. Therefore high starting torques and low starting currents are realized. Speed control is easily achieved at higher motor efficiency, compared with the case of controlling the motor using forced-commutated electronic switches without free-wheeling paths. This paper computes detailed performance characteristics of the motor employing the suggested method. For this purpose, the motor is represented in the dqo reference frame. Then, the performance is described by a developed state space mathematical model taking care of the discontinuities introduced by the electronic switches.

Acoustic noise cancellation techniques for switched reluctance drives

The levels of acoustic noise emitted by switched reluctance motor (SRM) drives are noted as being above those of competing variable speed drives. In other respects, the SRM drive offers distinct advantages. In a previous paper, the authors described a new technique for the cancellation of radial vibrations of the stator. This new technique was limited to power converters offering a zero voltage freewheel path. This paper describes further development of the technique which allows noise cancellation to be achieved with all types of power converter. The techniques disclosed in this paper include a smoothing method, a three-stage commutation method for converters with one switch per phase and a noise cancellation technique suitable for SRM drives incorporating an extended zero-voltage freewheel period for improved efficiency. The techniques are all compared, with experimental and simulated results.

Power Factor of AC Controllers for Inductive Loads

A general relationship for the input power factor of ac controllers with inductive loads is derived in this paper. Its simplified form is given for the phase angle, integral cycle, and symmetrical pulsewidth modulated controllers. The latter may or may not have a freewheeling path for the load.