A Novel Dead-Time Elimination Method for Voltage Source Multilevel Converters

Abstract

Voltage source multilevel converters (MLCs) are widely applied in recent years in a wide range of industrial applications. However, time delay inserted in switching signals to prevent short through can cause the dead-time effects, including output waveform distortion and voltage drop. In many kinds of MLCs, the freewheeling paths during dead time can also produce unexpected output voltage levels, which can cross a few consecutive output levels, introducing large <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">dv</i> / <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">dt</i> . Typical examples of those MLCs are 5L-active neutral-point-clamped, 7L-hybrid-clamped, 4L-nested neutral-point-clamped (NNPC) converter, etc. To solve this problem, a generic dead-time elimination (DTE) method is proposed. This method splits the complementary switches and replaces them with controllable switches coupled with uncontrollable diodes, decomposing the phase-leg of the converter into two basic switching cells, thus obviating the need for dead time. To address the zero-current clamping effect inherent to the DTE method, a second-order generalized integrator frequency-locked loop based current detector is also developed. The proposed DTE method is suitable for various MLCs. It cannot only effectively eliminate the unexpected levels, but also significantly reduce the output distortion and regains the output rms value. An application example of 4L-NNPC converter is given. The effectiveness of the proposed method is verified by both simulation and experiment.