Commutation Scheme of Seven-Level Hybrid-Clamped Converters With Suppressed Deadband-Induced Voltage Spikes

Abstract

A seven-level hybrid-clamped (7L-HC) converter is a promising option for medium-voltage drives due to its low number of devices and the ability to well balance all the capacitors. However, like other hybrid-clamped multilevel converters, the freewheeling paths during deadtime can produce unexpected output voltage levels. The unexpected output voltage can cross a few consecutive output levels, introducing a large dv/dt to the system. To address this problem, in this article, we conduct a detailed study of the mechanism that produces such undesirable voltages and propose a commutation scheme to coordinate the turn-on/off sequence of switches in the 7L-HC converters. The proposed method is based on an easy-to-implement bitwise operation of switching vectors, where the number of switching actions is not increased. The proposed method is validated by both simulation and experimental results.