Fractional Delay Filter Research Articles

High-performance power spectral/bispectral estimator for biomedical signal processing applications using novel memory-based FFT processor

This research paper proposes a novel robust high-performance power spectrum estimator, and bispactral power density analyzer that has outstanding capabilities in estimating noisy biomedical signal's power spectrum, and bispectrum. Biomedical signals usually are exposed to several sources of noises such as electrical noise from environmental noise from external sources, electrical equipment, and biological noise from the body. Therefore, accuracy and reliability are the most important feature of these systems in processing non-stationary biomedical signals. The proposed computationally-efficient architecture is based on a radix-8 memory-based 1024-point Blackman-Tuckey method power spectral density (PSD) estimator. The proposed nonparametric estimator uses a novel shared-resource CORDIC-Ⅱ unit to avoid multiplications in FFT computation, as well as filtering operations implemented in folded architectures. In order to merge two FFTs, the module uses bidirectional fractional delay filters to estimate half delay samples. By using modified safe-scaling, valid final output would be achieved, without any averaging operation. The proposed and competing designs are implemented on Artix-7 FPGA which is an ideal option for DSP applications. As final results demonstrate, the hardware has a remarkable capability in operating in short word-lengths which allows high-performance in low-power applications to compute the power spectrum and bicoherence of a vital signal.

An open-source project for wind instrument modeling using digital waveguides

Digital waveguide methods for time-domain modeling of acoustic structures comprised of interconnected piece-wise one-dimensional cylinders, cones and toneholes have been well reported in the past. In this work, an open-source Matlab class is presented that can be used to model arbitrary wind instrument air column structures, defined by length, radii and hole geometric parameters, using digital waveguide methods. Fractional-delay filtering can be enabled or disabled, with support for both Thiran and Lagrange filter types of specified order. Thermoviscous losses can be modeling using either a discrete-time least squares or a shelf-filter fit, both of arbitrary order. Three different tonehole model options are provided (two-port, three-port or wave digital filter). End boundary conditions include closed, anechoic, ideally open, open flanged and open unflanged. The class object can be used either in single-sample iterative contexts (for example, with an attached excitation model) or with arbitrarily-sized input signals (for example, to compute a reflection function or impedance). The modeled geometry can be constructed manually by iteratively adding segments or holes, or a complete geometry can be specified in a file. This project is bundled together with a parallel and previously reported open-source project for frequency-domain transfer matrix modeling of air columns (https://github.com/garyscavone/acmt).

A Variable Fractional Delay Filter Based True-Time-Delay Array Architecture for Wideband Beamforming

True-time delay (TTD) units are critical in Wideband Large-Scale Antenna Systems (LSASs) for resolving beam squint and frequency selective fading. In this paper, we propose a TTD array architecture for wideband beamforming that addresses the challenges posed by LSASs by utilizing variable fractional delay (VFD) filters and time delay estimations (TDEs). This study introduces a convex optimization problem to develop a novel method for designing VFD filters that can achieve high precision time delay resolution while maintaining an acceptable frequency response peak error. Using these VFD filters, we present a TDE approach with Newton-Raphson iteration update that corrects the difference in arrival time between sensors. Due to the implementation of VFD filters and fast TDE modules, the new architecture can complete beam steering and tracking in 10 ms with MATLAB simulation. Furthermore, an example was designed to demonstrate that the proposed architecture is capable of producing precise beam pointing while maintaining the bit error rate (BER) that is extremely close to the theoretical curve over the entire bandwidth.

Fractional delay Newton structure for Lagrangian interpolation in PV integrated grid connected system

SummaryThis paper proposes a fractional delay (FD) Newton structure for Lagrangian interpolation in single phase grid integrated photovoltaic (PV) system. The structure has been designed for achieving shunt compensation and as a phase locked loop circuit for synchronization. The designed controller performs multiple tasks of feeding the active power to meet the load demand and simultaneously providing reactive power compensation, power factor improvement, and compensating other power quality voltage and load current harmonics. Further, synchronization poses a severe challenge in integrating the PV power electronic converters to the grid. The FD filter is used to discretize the continuous time signal at any time instant using interpolation algorithm employing the non‐integral value of the sampling rate delays. The FD delay filter is made adaptive and self‐learning by using least mean square algorithm. The designed synchronization technique meets the objective of faithfully tracking the phase of the grid voltage under all grid disturbances such as under voltage, overvoltage, frequency variations, and phase angle disturbances in a precise manner.

A Novel Fractional Delay Proportional–Integral Multi-Resonant-Type Repetitive Control Based on a Farrow-Structure Filter for Grid-Tied Inverters

The integer-order delay of proportional–integral multi-resonant-type repetitive control (PIMR-RC) cannot provide excellent control performance for grid-tied inverters when the grid frequency fluctuates. To address this issue and reduce control errors, a fractional delay PIMR-RC (FD-PIMR-RC) scheme is proposed. In addition, to reduce the computational load and memory consumption, a Farrow-structure fractional delay (FFD) filter is adopted. The digital filter with the Farrow structure is flexibly and efficiently used for fractional delay. For each new fractional delay, a large number of calculations and storage for the FFD filter coefficients are avoided, which significantly reduces the computational load and memory consumption. The parameter design of the FD-PIMR-RC scheme is provided in detail, including the implementation of fractional delay based on the Farrow structure. Then, a system stability analysis and parameter optimization are presented. Finally, simulations for the steady-state and dynamic responses are presented, and the validity of the proposed method is demonstrated.

Optimized Design of a Variable Fractional Delay Filter With Delay Error Constraints

A novel algorithm for designing variable fractional delay (VFD) filter coefficients is proposed to improve time delay accuracy. The principle of this method is to model the coefficient design as an optimization problem with fractional delay error constraints (FDECs) and use a linear approach to derive a new FDEC expression for solving the problem. The solution of the FDEC expression can be efficiently obtained through linear programming (LP). Compared with existing algorithms, the design examples show the proposed method achieves a 100-fold improvement in delay accuracy while maintaining the frequency response (FR) error at an acceptable level, and yields a 5 dB reduction in FR error with the same level of delay accuracy.

Real-Time Vocal Tract Model for Elongation of Segment Lengths in a Waveguide Model

A vocal tract model based on a digital waveguide is presented in which the vocal tract has been decomposed into uniform cylindrical segments of variable lengths. We present a model for the real-time numerical solution of the digital waveguide equations in a uniform tube with the temporally varying cross section. In the current work, the uniform cylindrical segments of the vocal tract may have their different lengths, the time taken by the sound wave to propagate through a cylindrical segment in an axial direction may not be an integer multiple of each other. In such a case, the delay in an axial direction is necessarily a fractional delay. For the approximation of fractional-delay filters, Lagrange interpolation is used in the current model. Variable length of the individual segment of the vocal tract enables the model to produce realistic results. These results are validated with accurate benchmark model. The proposed model has been devised to elongate or shorten any arbitrary cylindrical segment by a suitable scaling factor. This model has a single algorithm and there is no need to make section of segments for elongation or shortening of the intermediate segments. The proposed model is about 23% more efficient than the previous model.

Calibration of timing mismatch for TIADC based on error table and fractional delay filter

In this paper, we presents a correcting method based on an error table and fractional delay filter for correcting timing mismatch in a time-interleaved analog-to-digital converter (TIADC). This method uses the ramp signal to estimate timing mismatch and the error table storage error value. A Farrow structure fractional delay filter is utilized to implement the calibration of mismatch. Simulation results show that this method can realize the correction of timing mismatch and suppress the spurious component effectively with a good correction effect.

Sparsity‐optimised farrow structure variable fractional delay filter for wideband array

AbstractIn this paper, a new sparsity‐optimised Farrow structure variable fractional delay (SFS‐VFD) filter is proposed to address the aperture effect in wideband array. Our method is based on coefficient (anti‐)symmetry and optimises the number and orders of its sub‐filters, greatly reducing the non‐zero coefficients. The established cost function is formulated as a parametric minimisation problem with multiple regularisation constraints, and solved by the modified three‐block alternating direction multiplier method (MTB‐ADMM), which is improved by introducing core variable correction items to ensure stable and fast convergence. Experimental results show that the SFS‐VFD filter reduces the complexity of the system by decreasing the use of multipliers and adders while ensuring high delay accuracy. In wideband array, the SFS‐VFD filter effectively corrects the aperture effect and achieves precise beam pointing.

Efficient Digital Implementation of a Multirate-Based Variable Fractional Delay Filter for Wideband Beamforming

In this brief, we propose a FPGA implementation of a novel Variable Fractional Delay (VFD) filter architecture for digital wideband (hundred of MHz or more) beamforming applications. The proposed architecture is based on a multirate structure that allows reaching high performance in terms of amplitude and group delay with a significant reduction in design complexity. Usually, the antenna’s beams are modified by introducing precise delays that can be multiples or fractions of the sampling period. The most used structures for realizing this operation are Farrow filters but, for wideband applications, the classical Farrow structure may require a huge amount of resources. A common solution to simplify the Farrow filter architecture is interpolation. However, this solution requires an increase of the clock frequency which is not always possible. In this context, our multirate approach mitigates the limitations in terms of computational complexity avoiding the requirement to increase of the clock frequency, while still exhibiting great performance. A comparison between a reference design based on the proposed approach and the literature is also provided. The experimental results confirm that the proposed architecture, characterized by a computational complexity similar to other works, exhibits better performance without the need to increase the clock frequency.

A Fractional-Order Multi-Rate Repetitive Controller for Single-Phase Grid-Connected Inverters

The multi-rate repetitive controller (MRC) can achieve zero steady-state error in tracking the reference current signal of grid-connected inverters, save the settling time effectively, and improve the running speed. However, when the grid frequency fluctuates, the harmonic suppression performance of MRC will degrade. Aiming at the problem of harmonic suppression performance degradation, a fractional-order MRC (FOMRC) based on the farrow structure fractional delay (FD) filter is proposed. Firstly, the equivalent digital model of MRC is established, and a Farrow structure fractional delay (FD) filter based on Taylor series expansion is selected as the internal model filter of MRC. The stability analysis and harmonic suppression characteristics of the FOMRC are analyzed. Then, the parameter design of FOMRC applied to an LCL single-phase grid-connected inverter control system is given. Finally, the simulation results show that the proposed method has better transient and steady-state performance than the CRC when the grid frequency fluctuates.

High‐speed, high‐resolution methodology for portable universal radar target‐echo simulator

AbstractIn this paper, digital parallelization and fractional delay‐based novel methods are proposed for the realization of high bandwidth, high‐resolution Ku‐band radar target simulator with 2.5 GHz intermediate frequency. High bandwidth waveform from radar is sampled by high‐speed Analog to Digital Converter, and samples are parallelized in Field Programmable Gate Array (FPGA) to work at the nominal clock frequency. In Digital RF Memory‐based target simulator, for finer range resolution, the FPGA clock frequency needs to be increased, which leads to increased system design complexity. The finer range resolution is accomplished without altering the system clock frequency using variable fractional delay filters and the digital parallelization methodology is proposed in this paper. The maximum target range that can be simulated is 20 km. As a result, memory requirements, computational complexity, and power dissipation are reduced. Finally, simulation and implementation results are presented.

Digital Calibration for Gain, Time Skew, and Bandwidth Mismatch in Under-Sampling Time-Interleaved System

This paper presents an all-digital background calibration method for gain, time skew, and bandwidth mismatch in M-channel under-sampling time-interleaved analog-to-digital converters (TI-ADCs) systems. Firstly, the characteristics of offset, gain, time skew, and bandwidth mismatch on the TI-ADCs system are analyzed. Secondly, a parameter vector is constructed to correct gain, time skew, and bandwidth mismatch. Then, the constructed parameter vector is calculated with the bandpass fractional delay filter and least squares (LS) algorithm. Based on the bandpass fractional delay filter, the proposed technique can work for ultra-high frequency signals. Additionally, the constructed parameter vector has a smaller number of filter taps than the derivative filter or Hilbert filter. Therefore, fewer computing resources are used to correct the input signal after obtaining the proposed parameter vector. Finally, there are matrix inversions in the LS algorithm. Additionally, implementing matrix inversion within FPGA is complex. For this reason, solving a system of linear equations is used to replace matrix inversions. The LS algorithm is affected by quantization error and white Gaussian noise. The simulation results verify the effectiveness of the proposed algorithm when the SNR of sub-ADC is from 30 dB to 100 dB or the ENOB of sub-ADC is from 5-bit to 16-bit. They show that the proposed algorithm is not limited by the first sub-ADC Nyquist. Additionally, the measurement results show that the proposed method is effective in the actual time-Interleaved system.

A Complex Exponential Structure for Low-Complexity Variable Fractional Delay FIR Filters

Variable fractional delay (VFD) filters generally require significantly greater computational resources for implementation than static filters. The motivation of this work is therefore to develop ways for implementation complexity reduction. The Farrow structure is adopted by most of the variable fractional delay (VFD) filters due to their effectiveness. This structure essentially assumes an algebraic polynomial approximation to the continuously varying impulse response. In this paper, we dispense with the polynomial function and instead propose the use of complex exponential functions for approximation. This new approach leads to a Farrow-like implementation structure with complex coefficient subfilters and a shape parameter. The complex exponential (CE) VFD filter is analyzed, and various types of symmetry properties are derived. Accordingly, a simplified implementation structure is obtained. The complexity analysis shows that the design and implementation complexities can be reduced to something comparable to the classical real algebraic polynomial (AP) VFD filters with the same number of subfilters and filter order. However, the CE filters can achieve a better approximation accuracy to the desired fractional delay characteristics, compared to the AP filters. Moreover, this superiority becomes significant, when only a few subfilters are used, or when the filter orders are high. Therefore, the reduction in complexity can be achieved for the same design specification. The design algorithm is developed using a weighted least-squares formulation. Using a matrix-based approach, the closed-form solution is derived firstly for a fixed shape parameter. This is then followed by optimization of the shape parameter using the Golden Cut method. Comprehensive design examples will be presented that compare the CE filters with the AP filters.

A Low Complexity and High Modularity Design for Continuously Variable Bandwidth Digital Filters

ABSTRACT Digital filters with variable bandwidth can be used for a variety of applications. Arbitrary change in the bandwidth of a digital Finite Impulse Response (FIR) filter can be acquired using sampling rate converters. In this paper, a sampling rate converter is proposed which is generated from Pascal structure, a fractional delay filter having low hardware complexity and high modularity. The proposed sampling rate converter requires lesser number of multipliers for implementation when compared with the sampling rate converters in the literature. A low pass filter having a single bandwidth sandwiched between two sampling rate converters can contribute multiple bandwidths in such a way that each bandwidth is an arbitrary variation of the original bandwidth. A two stage Frequency response masking approach (FRM) is used for the hardware efficient design of the original low pass filter. A low complexity and high modularity novel design for a continuously varying bandwidth of a digital FIR filter is proposed in this paper using the proposed sampling rate converter. The modularity of the Pascal structure can be used to control both pass band ripple as well as stop band attenuation of the continuously variable bandwidth FIR filter design. Different communication standards in a Software defined radio (SDR) channelizer is realized using the proposed design of continuously variable bandwidth filter.

Error Detection and Correction of Mismatch Errors in M-Channel TIADCs Based on Genetic Algorithm Optimization

In order to achieve higher system performance, a digital calibration technique for the sub-channel mismatches of time-interleaved ADCs (TIADCs) is proposed in this paper. The sine-fit-based estimation algorithm is introduced to estimate the channel mismatches and a calibration algorithm is proposed to compensate for the mismatches. Subsequently, the genetic algorithm (GA) is firstly utilized to detect the mismatch errors of the outputs of sub-channels after frequency domain filtering. The detected offset error and gain error are then corrected by performing the calibration algorithm, and the time errors are corrected by fractional delay filters based on Farrow structure. The spurious-free dynamic range (SFDR) is enhanced from 19.69 dB to 108.12 dB, and the signal to noise and distortion ratio (SNDR) is enhanced from 16.02 dB to 97.63 dB. The proposed technique is further validated on the FPGA. Compared with existing calibration techniques, the proposed technique has the advantages of simple algorithm structure, low hardware resource consumption, and high calibration accuracy and can be applied to the calibration of high-resolution (18-bit) TIADCs for low-frequency inputs.

Low Complexity Multiplierless Welch Estimator Based on Memory-Based FFT

This paper proposes a novel hardware efficient low power Welch power spectral density (PSD) estimator. The presented multiplier-less hardware uses a combined coefficient selection and shift-and-add implementation (CCSSI) unit in order to prevent multiplications in FFT computation. Two filtering operations, which are implemented in folded architecture, are utilized. The micro-rotation resources of the CCSSI unit can be shared with estimator’s modules simultaneously. The proposed architecture is a nonparametric estimator that operates based on a modified, memory-based, 128-point scalable radix-22 FFT processor. It uses bidirectional fractional delay filter to estimate half delay sample in merging two FFTs. Using modified safe-scaling, the final output would be valid, without any averaging operation. Another important feature of the proposed method is its capability of operating in short word lengths (WL). Artix-7, as an ideal option for DSP applications, is the utilized FPGA in this research. As results demonstrate, the hardware has a high capability in operating in short WLs which results in high performance in low-power applications.

Fractional delay filter based repetitive control for precision tracking: Design and application to a piezoelectric nanopositioning stage

The development of nanotechnology requires a precision tracking of periodic signals in order to complete repetitive industrial or scientific tasks. Although repetitive control is an intuitive choice to realize precisely periodic signal’s tracking, an integer number should match the period of signals for a digital control system otherwise the performance would be deteriorated significantly. Thus, in this paper, a fractional delay filter based repetitive control (FDFRC) is developed to achieve precision signal tracking with arbitrary periods. According to the internal model principle, a fractional delay filter with the spectrum-selection property is designed by using of a Farrow structure to address integer/non-integer delays. The stability of FDFRC is also given and analyzed in frequency domain to facilitate controller implementation. The proposed FDFRC allows an easy, simple and practical realization with only one parameter to be adjusted for different integer/non-integer delays. Comparative experiments with different frequencies of triangular waves for x axis and Lissajous scanning for x–y plane on a piezoelectric nanopositioning stage are conducted to further verify the significant improvements on the tracking performance of the proposed controller.

A Frequency Adaptive Scheme Based on Newton Structure of PRRC for LCL-Type Inverter Connected with Weak Grid

Repetitive control (RC) is gradually used in inverters tied with weak grid. To achieve the zero steady-state error tracking of inverter current and compensate the harmonic distortion caused by frequency fluctuation, a frequency adaptive (FA) control scheme for LCL-type inverter connected with weak grid is proposed. This scheme adopts a proportional resonance (PR) controller in parallel with RC (PRRC) to overcome the disadvantages caused by RC inherent one-cycle time delay. A fractional delay (FD) filter based on the Newton structure is proposed to approximate the fraction item of fs/f, where fs and f are sample frequency and grid frequency, respectively. The structure of the proposed FD filter is relatively simple; moreover, coefficients of the filter maintain constant so as not to need online tuning even when grid frequency fluctuates, which decreases the computational burden considerably. The feasibility and effectiveness of the proposed FA control scheme, named as Newton-FAPRRC, are all verified by the simulation and experimental results.

Parallel simulation method of GNSS multipath signal based on GPU

In order to solve the problems of the traditional GNSS multipath signal simulation methods, such as the complexity increases linearly with the number of multipath signals, inconvenient parameter updating and long operation time, a GPU based GNSS multipath signal parallel simulation method is proposed. Based on Farrow variable fractional delay filter, an independent parallel computing model of multi-channel filter coefficients is established, and a large number of floating-point units in GPU are used for parallel computing and filtering. Aiming at the performance bottleneck of this method, the optimization strategy of asynchronous parallel execution is given. The computer simulation results show that the complexity and operation time of the proposed method will not increase with the increase of the number of multipath signals. For the GNSS direct signal with sampling rate of 75MHz and time length of 1s, the maximum time consuming of the proposed method to generate 50 ∼ 1000 multipath signals is 158.6ms. Compared with the method of serial simulation on CPU, the proposed method speeds up to about 9.5 times, and the real-time simulation of multipath signals in complex environment can be realized.