FR4 Printed Circuit Board Research Articles

CMOS Linear Power Amplifier with Envelope Tracking Operation (Invited Paper)

A differential-cascode CMOS power amplifier (PA) with a supply modulator for envelope tracking (ET) has been implemented by 0.18 μm RF CMOS technology. The loss at the output is minimized by implementing the output transformer on a FR-4 printed circuit board (PCB). The CMOS PA utilizes the 2 nd harmonic short at the input to enhance the linearity. The measurement was done by the 10MHz bandwidth 16QAM 6.88 dB peak-to-average power ratio long-term evolution (LTE) signal at 1.85 GHz. The ET operation of the CMOS PA with the supply modulator enhances the power-added efficiency (PAE) by 2.5, to 10% over the stand-alone CMOS PA for the LTE signal. The ET PA achieves a PAE of 36.5% and an ACLRE-UTRA of ?32.7 dBc at an average output power of 27 dBm.

Resonance frequency effects of an external coil for IOP sensor applications

In this study, we investigate the resonant frequency effects of an external coil for a wireless intraocular pressure (IOP) monitoring system. The phase difference of an IOP sensor is improved using the resonant frequency of the external coil. By means of phasor diagrams, we show that the phase difference is improved as the resonant frequency of the external coil approaches the resonant frequency of the IOP sensor. The IOP sensor and a multi-layered external coil are designed using microfabrication technology and an FR-4 printed circuit board, respectively. The resonant frequency of the external coil is varied using an additional capacitor and by changing the number of layers of the multi-layered inductor pattern. From the measured results, we successfully verify that the resonant frequency of the external coil improves the phase difference of the IOP sensor.

Initial Success on Aluminum Circuit Board Technology

In this paper, aluminum circuit boards (ACBs) were designed, fabricated, and tested to demonstrate the possibility and advantages of the ACB technology. Processes were developed to grow high quality alumina <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$({\rm Al}_{2}{\rm O}_{3})$</tex></formula> on Al boards and coat thick copper (Cu) layer over the alumina to produce an Al/alumina/Cu structure. The measured resistance and breakdown voltage of the as-formed 50 <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$\mu{\rm m}$</tex></formula> alumina layer is <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">${&gt;}{\rm 40}~{\rm M}\Omega$</tex></formula> and 600 VDC respectively. In this design, heat generated by a high power circuit component attached to the Cu layer can conduct through the alumina layer and reach the Al base. Alumina has much higher thermal conductivity than epoxy-glass insulating layer of the popular FR-4 printed circuit boards. The quality of the boards produced in this paper was evaluated rigorously using scanning electron microscope. To test the reliability of the boards, they were put through 500 cycles of thermal cycling test between <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">${-}{40}^{\circ}{\rm C}$</tex></formula> to <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex Notation="TeX">${+}{85}^{\circ}{\rm C}$</tex></formula> and 100 h of high temperature storage test at 250 <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$^{\circ}{\rm C}$</tex></formula> . To ensure its compatibility with soldering operations, 10 mm <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$\times\,$</tex></formula> 12 mm Cu substrates were bonded to the Al boards using a fluxless tin process. The thickness of the joint is 9.4 <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$\mu{\rm m}$</tex></formula> including the intermetallic layers. Despite significant coefficient of thermal expansion mismatch of the structure and large Cu size, the bonded samples show no sign of cracks, breakage, or degradation.

A Wireless Intraocular Pressure Sensor with Variable Inductance Using a Ferrite Material

A wireless intraocular (IOP) pressure sensor based on micro electro mechanical system (MEMS) technology is proposed. The proposed IOP sensor uses variable inductance according to the external pressure. The proposed sensor is composed of two flexible membranes: a ferrite bottom part, an inductor, and a capacitor. The inductance of the sensor varies according to the external pressure. The resonance frequency of the sensor is also varied, and this frequency is detected using an external coil. The external coil is designed with an FR-4 printed circuit board. The feasibility of the proposed sensor structure using variable inductance to detect the external pressure is successfully demonstrated.

Optical Waveguide End Facet Roughness and Optical Coupling Loss

This paper investigates the end facet roughness of multimode polymer channel waveguides fabricated on FR4 printed circuit boards, PCBs, when cut at right angles to their optical axis by milling routers for optical butt-coupling connectors and compares it with that resulting from dicing saws and polishing and proposes a novel end facet treatment. RMS surface roughness of waveguide end facets, measured by AFMs, are compared for a range of rotation speeds and translation speeds of a milling router. It was found that one-flute routers gave significantly less rough surfaces than two or three-flute routers. The best results were achieved for a one-flute router when the milling bit was inserted from the PCB side of the board with a rotation speed of 15,000 rpm and a translation speed of 0.25 m/min which minimized the waveguide core end facet RMS roughness to 183 ± 13 nm and gave input optical coupling loss of 1.7 dB ± 0.5 B and output optical coupling loss of 2.0 dB ± 0.7 dB. The lowest RMS roughness was obtained at chip loads of 16 μm/revolution. High rotation speeds should be avoided as smearing of the end facet occurs possibly due to polymer heating and softening. For the first time to our knowledge, channel waveguide optical insertion loss is shown to be linearly proportional to the ratio of the waveguide core end facet RMS roughness to its autocorrelation length. A new fabrication technique for cut waveguide end facet treatment is proposed and demonstrated which reduces the insertion loss by 2.60 dB ± 1.3 dB which is more than that achieved by the closest available index matching fluid which gave 2.23 dB ± 1.2 dB. The new fabrication method gives a more robust end facet for use in commercial products.

4-Gb/s Parallel Receivers With Adaptive Far-End Crosstalk Cancellation

Two 4-Gb/s parallel receivers with adaptive far-end crosstalk (FEXT) cancellation are presented. By using the highpass filter, the crosstalk cancellation (XTC) signal is generated to compensate the FEXT signal. A power detection loop is adopted to achieve automatic tuning of the XTC coefficient for different channel spacing. The receivers with adaptive XTC are fabricated in 40-nm CMOS technology, and the core area occupies 0.0229 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . The maximum power consumption from a 1.2-V supply is 15.6 mW. For two 4-Gb/s pseudorandom binary sequences of 2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">7</sup> -1 passing through FR4 printed circuit board traces with 5-in length and 8-mil spacing, the measured peak-topeak jitter of the data is reduced by 32.22 ps by using the adaptive XTC. The measured adaptation time of the power detection loop is 63.44 μs.

Electrically Large Dual-Loop Antenna for UHF Near-Field RFID Reader

An electrically large dual-loop antenna is proposed for ultra high frequency (UHF) near-field radio frequency identification (RFID) readers. The proposed antenna is composed of a main loop and a parasitic loop wherein the loops are constructed using segmented lines with distributed capacitors. The parasitic loop enhances and uniforms the magnetic field distribution in the central portion of the larger main loop so that the perimeter of interrogation zone of the dual-loop antenna can be extended up to three operating wavelengths. The measurement shows that a dual-loop antenna prototype printed onto a piece of FR4 printed circuit board (PCB) achieves good impedance matching over the frequency range of 845-928 MHz and produces strong and uniform magnetic field distribution with an interrogation zone of 250 mm 250 mm. A parametric study is carried out to provide the guidelines for the antenna design.

A New Coupler Concept for Contactless High-Speed Data Transmission Monitoring

This paper presents a new concept of a coupler that can be applied to high-speed data transmission contactless measurements. The proposed approach is dedicated for differential signal transmission monitoring in microstrip coupled lines on printed circuit boards (PCBs). The coupler, produced on a separate PCB, is overlayed on the transmission line with the differential signal and delivers decoupled differential signal to the main measurement path. The main advantage of this solution is that no dedicated connectors are required for the measurement process, which results in product cost reduction and design simplification. The complete design methodology of the proposed coupler has been described. Theoretical considerations have been confirmed by the example coupler prototype that was fabricated and measured. The measurement results show that the proposed concept may be advantageous for contactless signal monitoring in widely used high-speed interconnections realized on cheap FR-4 PCBs.

BANDWIDTH IMPROVEMENT OF A COMPACT QUADRATURE HYBRID COUPLER WITH HARMONIC REJECTION USING LUMPED ELEMENTS

A compact quadrature hybrid coupler with harmonic suppression using lumped-element band-stop resonator is proposed for bandwidth improvement. Conventionally, harmonic rejection is realized by three band-stop resonators in lumped hybrids. The using of three band-stop resonators realizes better harmonic suppression while exhibiting narrower frequency response. So as to improve operation bandwidth behavior, the number of band-stop resonator applied in the proposed topology is minimized to one. Trading ofi with acceptable reduction in harmonic rejection, the proposed hybrid enlarges working bandwidth with fewer numbers of lumped devices. Detailed design and theoretical analysis are presented and the expressions of lumped elements with dependence of rejected frequency are obtained. To validate the analysis, three 2.45GHz couplers are fabricated on an FR-4 printed circuit board. The experimental results exhibit 27.3%, 26.9% and 23.3% operation bandwidth with better than 16dB, 17dB, and 21dB harmonic suppressions at 4.9GHz, 6.1GHz, and 7.35GHz, respectively. Less than 0.8dB amplitude imbalance and 2 - phase error are achieved for all the three couplers, which are matched well with theoretical analysis.

Planar ultrawideband fractal antenna with 3.4/5.5 GHz dual band-notched characteristics

A simple and compact coplanar waveguide (CPW)–fed ultra wideband (UWB) antenna is presented. The proposed antenna consists of a circular patch with triangular slot, which is etched onto FR4 Printed Circuit Board (PCB) with overall size of 39.2 × 43.5 × 1.6 mm³. The simulated and measurement results shown that the antenna achieves good impedance matching, consistent gain and stable radiation patterns. Extended UWB antenna with notch band (3.3–3.6 GHz & 5–6 GHz) design are also presented as a desirable feature for UWB application.

A Solder Joint Reliability Model for the Philips Lumileds LUXEON Rebel LED Carrier Using Physics of Failure Methodology

Light Emitting Diodes (LEDs) are quickly evolving as the dominant lighting solution for a wide variety of applications. With the elimination of incandescent light bulbs and the toxic limitations of fluorescent bulbs, there has been a dramatic increase in the interest in high-brightness light emitting diodes (HB-LEDs). Getting the light out of the die, with reliable color, while maintaining appropriate thermal control over a long service life is a challenge. These issues must be understood and achieved to meet the needs of unique applications, such as solidstate-lighting, automotive, signage, and medical applications. These applications have requirements for 15–25 years of operation making their reliability of critical importance. The LUXEON Rebel has been accepted as an industry leading LED product, widely used in Mean-Time-Between-Failure (MTBF) sensitive applications. Customers use various mounting platforms, such as FR4 Printed Circuit Board (PCB), FR4 PCB with thermal via's, Aluminum &amp; Copper Metal Core printed Circuit Boards (MCPCB), Super MCPCB, etc. As in other LEDs, when mounting to a platform where a large Coefficient of Thermal Expansion (CTE) exists between the LED &amp; the PCB, Solder fatigue could become an issue that may affect system level lifetime. In this paper we have examined extreme cases and how a solder joint can impact system level reliability. We have modeled the conditions and formed a means to predict system level reliability. We have compared the prediction modeling with empirical tests for validation of the models. It is vital to understand system level reliability factors to build lighting solutions that match the application and customer expectations. It is impractical to test LEDs and other components for 50k hours ~5 years since the device evolution is much faster than that – on average one LED generation every 12–18 month. Hence we need models and prediction methods …..

Analog Signal Processing for Pulse Compression Radar in 90-nm CMOS

This paper presents a pulse-compression radar baseband analog signal processing integrated in a silicon process for low cost and power dissipation. The analog signal-processing circuitry exhibits the autocorrelation properties of the polyphase codes, maximizes the sensitivity and resolution of a pulse radar system, and alleviates speed and resolution requirements of the analog-to-digital converter (ADC) via an analog correlator. The circuitry includes a two-stage variable gain amplifier (VGA) for high dynamic range, a correlator/integrator circuit, a comparator, and offset calibration circuits. The differential 6-bit VGA is designed to adaptively track the Friis path loss through rapid change of the VGA gain and offset calibration, relaxing the dynamic range requirements of the correlator. The measured performance shows a VGA gain variation of 52 dB and a VGA group-delay imbalance of 50 ps over 64 states. The high-speed pulse compression/correlation is performed in analog current domain and the speed requirement on the ADC is reduced by a factor equal to the duty cycle lowering the ADC power consumption. The chip is fabricated in a 90-nm process, wire bonded on the FR4 printed circuit board, and tested with a Stratix IV field-programmable gate-array board to evaluate the system performance for different radar polyphase codes.

An alternative implementation for fabricating a Schiffman phase shifter

AbstractThis article presents an alternative implementation for fabricating a Schiffman phase shifter. The method consists of initially deciding the gap width between the coupled microstrip lines and using the derived equation to determine the width of the coupled microstrip lines. The proposed approach does not have to remove the ground plane underneath the coupled microstrip lines and install an additional isolated rectangular conductor under them. One Schiffman phase shifter is designed and fabricated on a double‐sided FR4 printed circuit board as an example to verify the performance of the proposed approach, and the design is simulated using Ansoft HFSS and validated by the measurements. The simulated and measured return losses are found to be better than −15 dB over the frequency band from 1.0 to 4.0 GHz and the insertion loss is within −2 dB. The bandwidth in 90° phase difference from 1.6 to 3.4 GHz is about 72%. © 2012 Wiley Periodicals, Inc. Microwave Opt Technol Lett 55:9–12, 2013; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.27266

Design of Antenna for UHF Near-Field RFID Reader

A segmented loop antenna is presented for ultra-high frequency (UHF) near-field radio frequency identification (RFID) reader. The segmented antennas have been constructed that can operate at resonant diameters while still providing good magnetic coupling. The antenna printed on a FR4 printed circuit board (PCB) with an overall size of 170× 170 × 1 mm3 achieves good impedance matching and uniform magnetic field distribution over an operating bandwidth of 840–1120 MHz, which is desirable for UHF near-field RFID reader applications.

Compact Design of an UWB Antenna with Dual Band-Notched Characteristic

An ultra-wideband (UWB) printed antenna with dual band-notched characteristic is presented in this paper. The proposed antenna is composed of a semi-circular patch fed by a tapered coplanar waveguide (CPW) and an unclosed ground plane, which are printed onto the same side of a FR4 printed circuit board (PCB) with an overall size of 30 mm × 30 mm × 1.5 mm. By embedding a simple arc-shaped slot in the patch and adding a T-shaped strip on the top of the patch, two notched frequency bands for rejection of WiMAX and WLAN system can be realized. The characteristics of the proposed antenna are investigated by using the software HFSS and validated experimentally, both simulated and measured results show that the proposed antenna prototype achieves good impedance matching over an frequency band from 2.1011.40 GHz for VSWR2 with two notched bands over the frequency range of 5-5.95 GHz and 3.1-3.9 GHz. Furthermore, a relatively stable gain and suitable radiation patterns are also achieved in both lower and upper UWB frequency band.

A Zero-Voltage-Switching Contour-Based Outphasing Power Amplifier

A parallel class-E modified Chireix outphasing power amplifier (PA) that can maintain high efficiency across a wide output power range is presented. The architecture presented essentially implements a zero voltage switching (ZVS) contour-based PA using a modified Chireix outphasing structure. It utilizes the inherent load modulation present in the outphasing scheme and combines it with duty cycle modulation to satisfy ZVS conditions over a wide range of output powers. Thus, a ZVS contour-based PA is realized, and the amplifier maintains high efficiency for about 9-dB back-off of output power. Beyond the 9-dB range, simple outphasing is performed to extend the dynamic range up to about 30 dB. The proposed PA, implemented using discrete components on an FR4 printed circuit board, achieves a dynamic range of 30 dB with a peak power of 29 dBm and a peak drain efficiency of 65% at about 6-dB back-off from the peak output power at 100 MHz from a 3-V supply.

Compact planar ultrawideband wide-slot antenna with an assembled band-notched structure

A simple and compact wide-slot antenna and its extended band-notched design are presented.The proposed antenna is etched on a piece of FR4 printed circuit board with an overall size of 30 × 28 × 0.8 mm3. It consists of a polygonal wide slot, a coplanar waveguide feeding line, and a circular metal ring. The antenna prototype achieves good impedance matching, a constant gain, and stable radiation patterns over an operating bandwidth of 3.1–10.6 GHz. Furthermore, after the addition of an assembled band-notch structure, which is formed by a pair of inverted L-shaped slits embedded in the ground plane and a T-shaped stub inside the metal ring, the proposed antenna exhibits band-notched characteristics and achieves a much sharper notch band at 5–6 GHz. © 2012 Wiley Periodicals, Inc. Microwave Opt Technol Lett 54:1654–1659, 2012; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.26864

Design of CPW-Fed Small Multi-Band Antenna by Using Band Rejection Semicircle Slot

This paper presents a CPW-fed antenna with three slots. The proposed antenna can operate at 1.9~2.1 GHz and 2.9~3.3 GHz which are generated by the two rectangular slots, and 4.5~11.6 GHz which is generated by the main patch. The semicircle-slot is used as a band-notched filter to stop at a desired band (5.150~5.825 GHz) limited by IEEE 802.11a or HIPERLAN/2 applications. The currents concentrate around corresponding slots at the desired band. The proposed antenna is very small in size, with overall dimensions of <TEX>$27{\times}32{\times}1\;mm^3$</TEX> etched onto an FR4-printed circuit board (PCB).

Polydimethylsiloxane (PDMS) based optical interconnect with copper-clad FR4 substrates

PDMS based optical interconnect has been developed based on a combination of PDMS waveguide fabrication technique and a process for efficient interfacial bonding between PDMS optical layers and standard copper-clad FR4 printed circuit boards (PCB) materials, in order to avoid outgas influences from epoxy based FR4 on waveguide loss of optical interconnect at 850 nm. The optimal bonding conditions between PDMS and copper-clad FR4 have been identified by applying a specifically developed surface adhesion promoter and surface treatment on copper-clad FR4. The optical and mechanical properties of the PDMS waveguide layer remained unchanged by the addition of the SAP and surface treatment on copper-clad FR4 as well as the environmental stability of realized optical interconnect.

A Zero-Voltage-Switching Contour-Based Power Amplifier With Minimal Efficiency Degradation Under Back-Off

A switching power amplifier (PA) architecture that offers up to 13 dB of output power back-off without any drain efficiency degradation is presented. The proposed zero-voltage-switching (ZVS) contour-based PA employs a series class-E PA in conjunction with duty cycle modulation and a proposed tunable impedance transformation network. So-called ZVS conditions that ensure ideally 100% drain efficiency are satisfied not just at peak output power, but over the 13-dB back-off range. Theoretical analyses of losses in the PA and the impedance transformation network are also presented to prove that drain efficiency actually improves with back-off. Measurement results of a 100-MHz PA built using discrete components on an FR4 printed circuit board showing drain efficiency greater than or equal to the peak efficiency (40%) at all output power levels are also presented.