Forward Blocking Research Articles

Carbon nanotube p-n junction diodes

We demonstrate a single-walled carbon nanotube p-n junction diode device. The p-n junction is formed along a single nanotube by electrostatic doping using a pair of split gate electrodes. By biasing the two gates accordingly, the device can function either as a diode or as an ambipolar field-effect transistor. The diode current–voltage characteristics show forward conduction and reverse blocking characteristics, i.e., rectification. For low bias conditions, the characteristics follow the ideal diode equation with an ideality factor close to one.

스마트 파워 IC를 위한 트렌치 파워 MOSFET의 전기적 특성에 관한 연구

In this paper, a new small size Lateral Trench Electrode Power MOSFET is proposed. This new structure, called "LTEMOSFET"(Lateral Trench Electrode Power MOSFET), is based on the conventional MOSFET. The entire electrode of LTEMOSFET is placed in trench oxide. The forward blocking voltage of the proposed LTEMOSFET is improved by 1.6 times with that of the conventional MOSFET. The forward blocking voltage of LTEMOSFET is 250V. At the same size, a increase of the forward blocking voltage of about 1.6 times relative to the conventional MOSFET is observed by using TMA-MEDICI which is used for analyzing device characteristics. Because the electrodes of the proposed device are formed in trench oxide, the electric field in the device are crowded to trench oxide. We observed that the characteristics of the proposed device was improved by using TMA-MEDICI and that the fabrication of the proposed device is possible by using TMA-TSUPREM4.

Forward and backward blocking of causal judgment is enhanced by additivity of effect magnitude.

When two causes for a given effect are simultaneously presented, it is natural to expect an effect of greater magnitude. However many laboratory tasks preclude such an additivity rule by imposing a ceiling on effect magnitude-for example, by using a binary outcome. Under these conditions, a compound of two causal cues cannot be distinguished from a compound of one causal cue and one noncausal cue. Two experiments tested the effect of additivity on cue competition. Significant but weak forward blocking and no backward blocking were observed in a conventional "allergy" causal judgment task. Explicit pretraining of magnitude additivity produced strong and significant forward and backward blocking. Additivity pretraining was found to be unnecessary for another cue competition effect, release from overshadowing, which does not logically depend on additivity. The results confirm that blocking is constrained when effect magnitude is constrained and provide support for an inferential account of cue competition.

Backward and forward blocking in human electrodermal conditioning: blocking requires an assumption of outcome additivity.

Blocking was observed in two human Pavlovian conditioning studies in which colour cues signalled shock. Both forward (Experiment 1) and backward (Experiment 2) blocking was demonstrated, but only when prior verbal and written instructions suggested that if two signals of shock (A+ and B+) were presented together, a double shock would result (AB++). In this case, participants could assume that the outcome magnitude was additive. Participants given non-additivity instructions (A+ and B+ combined would result in the same outcome, a single shock) failed to show blocking. Modifications required for associative models of learning, and normative statistical accounts of causal induction, to account for the impact of additivity instructions on the blocking effect, are discussed. It is argued that the blocking shown in the present experiments resulted from the operation, not of an error-correction learning rule, nor of a simple contingency detection mechanism, but of a more complex inferential process based on propositional knowledge. Consistent with the present data, blocking is a logical outcome of an A+/AB+ design only if participants can assume that outcomes will be additive.

인텔리전트 파워 IC의 구현을 위한 횡형 트렌치 전극형 IGBT의 제작 및 그 전기적 특성에 관한 연구

A new small size Lateral Trench Electrode Insulated Gate Bipolar Transistor (LTEIGBT) is proposed and fabricated to improve the characteristics of device. The entire electrode of LTEIGBT is placed to trench type electrode. The LTEIGBT is designed so that the width of device is 19w. The latch-up current density of the proposed LTEIGBT is improved by 10 and 2 times with those of the conventional LIGBT and LTIGBT. The forward blocking voltage of the LTEIGBT is 130V. At the same size, those of conventional LIGBT and TIGBT are 60V and 100V, respectively. Because the electrodes of the proposed device is formed of trench type, the electric field in the device are crowded to trench oxide. When the gate voltage is applied 12V, the forward conduction currents of the proposed LTEIGBT and the conventional LIGBT are 80mA and 70mA, respectively, at the same breakdown voltage of 150V.

효율적인 p+ 다이버터를 갖는 수평형 트렌치 전극형 IGBT의 제작에 따른 전기적 특성에 관한 연구

A new lateral trench LTEIGBT with p+ diverter was proposed to suppress latch-up of LTIGBT The p+ diverter was placed between the anode and cathode electrode. The latch-up of LTEICBT with a p+ diverter was effectively suppressed to sustain an anode voltage of 8.7V and a current density of 1453A/<TEX>$\textrm{cm}^2$</TEX> while in the conventional LTIGBT, latch-up occured at an anode current density of 540A/<TEX>$\textrm{cm}^2$</TEX>. In addition, the forward blocking voltage of the proposed LTEIGBT with a p+ diverter was about 140V. The forward blocking voltage of the conventional LTIGBT of the same size was no more than 105V, We fabricated the proposed LTEIGBT with a p+ diverter after the device and process simulation was finished. When the gate voltage is applied 12V, the forward conduction currents of the proposed LTEIGBT with a p+ diverter and the conventional LIGBT are 90㎃ and 70㎃, respectively, at the same breakdown voltage of 150V.

고내압 특성을 위한 진성영역과 트렌치 구조를 갖는 베이스 저항 사이리스터

In this paper, we haute proposed a novel trench electrode Base Resistance Thyristor(BRT) and trench electrode BRT with a intrinsic region. New power BRTs have shown superior electrical characteristics including the snab-back effect and the forward blocking voltage more than the conventional BRT. Especially, the trench electrode BRT with the intrinsic region has obtained high blocking voltage of 1600V. The blocking voltage of conventional BRT is about 400V at the same size. Because the breakdown mechanism of the BRT is the avalanch breakdown by impact ionization, the trench electrode BRT with intrinsic region has suppressed impact ionization, effectively. If we use this principle, we can develop a super high voltage power device and it applies to another power device including IGBT, EST and etc.

Fabrication and Experimental Results of Lateral Trench Electrode IGBT

A new small size Lateral Trench Electrode Insulated Gate Bipolar Transistor (LTEIGBT) is proposed and fabricated to improve the characteristics of device. The entire electrode of LTEIGBT is placed to trench type electrode. The LTEIGBT is designed so that the width of device is 19 . The Latch-up current densities of LIGBT, LTIGBT and LTEIGBT are 120A/cm, 540A/cm and 1230A/cm, respectively. The latch-up current density of the proposed LTEIGBT is improved by 10 and 2 times with those of the conventional LIGBT and LTIGBT. The forward blocking voltage of the LTEIGBT is 130V. At the same size, those of conventional LIGBT and TIGBT are 60V and 100V, respectively. Because that the electrodes of the proposed device is formed of trench type, the electric field in the device are crowded to trench oxide.

A small sized lateral trench electrode IGBT for improving latch-up and breakdown characteristics

A new small sized lateral trench electrode insulated gate bipolar transistor (LTEIGBT) was proposed to improve the characteristics of conventional lateral IGBT (LIGBT) and lateral trench gate IGBT (LTIGBT). The entire electrode of LTEIGBT was replace with trench-type electrode. The LTEIGBT was designed so that the width of device is no more than 19 μm. The latch-up current densities of LIGBT, LTIGBT and LTEIGBT were 120, 540, and 1230 A/cm 2, respectively. The enhanced latch-up capability of the LTEIGBT was obtained through holes in the current directly reaching the cathode via the p+ cathode layer underneath n+ cathode layer. The forward blocking voltage of the LTEIGBT was 130 V. Conventional LIGBT and LTIGBT of the same size were no more than 60 and 100 V, respectively. Because the proposed device was constructed of trench-type electrodes, the electric field moved toward trench-oxide layer, and punch through breakdown of LTEIGBT is occurred, lately.

A Small-Sized Lateral Trench Electrode Insulated Gate Bipolar Transistor for Improving Latch-up and Breakdown Characteristics

A new small-sized lateral trench electrode insulated gate bipolar transistor (LTEIGBT) was proposed to improve the characteristics of the conventional lateral IGBT (LIGBT) and the lateral trench gate IGBT (LTIGBT). The entire electrode of the LTEIGBT was replaced with a trench-type electrode. The LTEIGBT was designed so that the width of the device was no more than 19 µm. The latch-up current densities of LIGBT, LTIGBT and LTEIGBT were 120 A/cm2, 540 A/cm2, and 1230 A/cm2, respectively. The enhanced latch-up capability of the LTEIGBT was obtained due to the holes in the current directly reaching the cathode via the p+ cathode layer underneath the n+ cathode layer. The forward blocking voltage of the LTEIGBT was 130 V. Those for conventional LIGBT and LTIGBT of the same size were no more than 60 V and 100 V, respectively. Because the proposed device was constructed of trench-type electrodes, the electric field moved toward the trench-oxide layer, and punch-through breakdown of LTEIGBT occurred late.

A Latch-up Immunized Lateral Trench Insulated Gate Bipolar Transistor with a p+ Diverter Structure for Smart Power Integrated Circuit

A new lateral trench insulated gate bipolar transistor (LTIGBT) with a p+ diverter was proposed to improve the characteristics of the conventional LTIGBT. The p+ diverter layer was placed between the anode electrode and the cathode electrode. As the conventional LTIGBT has a p+ divert region, the forward blocking voltage was decreased significantly because the n-drift layer corresponding to the punch-through region was reduced. However, the forward blocking voltage of the proposed LTIGBT with a p+ diverter was about 140 V. That of the conventional LTIGBT of the same size was 105 V. Because the p+ diverter region of the proposed device was enclosed in a trench oxide layer, the electric field moved toward the trench-oxide layer, and punch-through breakdown of LTIGBT with p+ diverter occurred late. Therefore, the p+ diverter of the proposed LTIGBT had no effect on the breakdown voltage unlike the conventional LTIGBT. The latch-up current densities of the conventional LTIGBT and LTIGBT with a p+ diverter were 540 A/cm2, and 1453 A/cm2, respectively. The enhanced latch-up capability of the proposed LTIGBT with a p+ diverter was obtained due to the holes in the current directly reaching the cathode via the p+ divert region and p+ cathode layer beneath the n+ cathode layer.

Simulation of a new lateral trench IGBT employing effective p+ diverter for improving latch-up characteristics

A new lateral trench insulated gate bipolar transistor (LTIGBT) with p+ diverter was proposed to improve the characteristics of the conventional LTIGBT. The p+ divert layer was placed between the anode electrode and the cathode electrode. Generally, as the conventional LTIGBT had a p+ divert region, the forward blocking voltage was decreased greatly because the n-drift layer corresponding to the punch-through region was reduced. However, the forward blocking voltage of the proposed LTIGBT with p+ diverter was about 140V. That of the conventional LTIGBT of the same size was 105V. Because the p+ diverter region of the proposed device was an enclosed trench oxide layer, the electric field moved toward the trench-oxide layer, and punch through breakdown of LTIGBT with p+ diverter occurred. Therefore, the p+ diverter of the proposed LTIGBT did not relate to breakdown voltage in a way different to the conventional LTIGBT. The latch-up current densities of the conventional LTIGBT and LTIGBT with p+ diverter were 540, and 1453A/cm2, respectively. The enhanced latch-up capability of the proposed LTIGBT with p+ diverter was obtained through holes in the current directly reaching the cathode via the p+ divert region and the p+ cathode layer beneath the n+ cathode layer.

A new trench electrode IGBT having superior electrical characteristics for power IC systems

A new small-size Lateral Trench Electrode Insulated Gate Bipolar Transistor (LTEIGBT) is proposed to improve the characteristics of other devices. The entire electrode of the LTEIGBT is replaced with a trench-type electrode. The LTEIGBT is designed so that it has a width of 19μm. While the latch-up current densities of an LIGBT, LTIGBT and LTEIGBT are 120, 540 and 1230Acm−2, respectively, that of the proposed LTEIGBT is 10 and two times better than that of the conventional LIGBT and LTIGBT, respectively. The enhanced latch-up capability of the LTEIGBT is obtained due to the fact that the hole current in the device reaches the cathode directly via the p+ cathode layer underneath the n+ cathode layer. The forward blocking voltage of the LTEIGBT is 130V, while those of the conventional LIGBT and TIGBT of the same size are 60 and 100V, respectively. Since the electrodes of the proposed device are of a trench type, the electric field accumulates in the trench oxide of the device. Thus, the punch-through breakdown of LTEIGBT occurs. While the conventional LIGBT and LTIGBT both have a turn-off time of 4μs, that of the LTEIGBT is 0.2μs.

Physical Insight into Thermal Behaviour of Power DMOSFET and IGBT: A Two-Dimensional Computer Simulation Study

To acquire a physical understanding of the influence of temperature on the electrical characteristics of power DMOSFET (double-diffused metal-oxide-semiconductor field effect transistor) and IGBT (insulated gate bipolar transistor), and to understand their failure mechanisms, a comprehensive thermal characterization of DMOSFET and IGBT unit cells of various structural parameters and impurity diffusion profiles has been carried out as a function of lattice temperature, encompassing the broad temperature range from 200 to 600 K. Device electrical characteristics have been generated in the steady-state forward conduction, blocking and transfer modes of operation using the computer program ISE-TCAD tools and incorporating the relevant temperature-dependent physical models of carrier transport properties and recombination mechanisms during the analysis. This computer-aided analysis has revealed that at a given temperature, within their respective operating ranges, for a particular forward voltage, the IGBT cell always yielded a much higher current than its DMOSFET cell counterpart. DMOSFET behaviour has been found to be maintained from 200 to 450 K with changes in terminal electrical parameters like ON-resistance, transconductance, saturated drain current, threshold voltage, blocking voltage and leakage current. On the contrary, IGBT cells have shown to be capable of working up to 600 K, much higher than and in striking dissimilarity to the DMOSFET cells. Unlike the DMOSFET cell characteristic, the IGBT cell forward characteristics did not fail completely with temperature. Their partial failure has been observed as a more rapid increase in current at a given voltage so that the curve for higher temperature intersected the one at lower temperature. The current density of failure has been found to decrease with increasing temperature. This was ascribed to latching of the parasitic bipolar thyristor. In addition, a moderate variation of IGBT cell forward characteristics with temperature has been observed, distinguishing them from DMOSFET cells. Further, the transfer characteristic of the IGBT cell has not exhibited collector current saturation at high gate voltages. This saturation behaviour was a notable feature of the DMOSFET cell with the current saturation level depending on temperature. The simulated results have been interpreted in terms of the physics of device operation by invoking the power DMOSFET ON-resistance model, and combinational bipolar transistor-DMOSFET model of the IGBT. Physical explanation of the higher operating temperature capability of IGBT involves the simultaneous action of oppositely-directed thermally varying forward voltage drops in the p–i–n rectifier and the DMOSFET. The simulation study has also established that a distinct correlation of the maximum safe operating temperature with device structural and profile design parameters was possible for the IGBT but was not so apparent for the DMOSFET, making it an inherent device property. Controllability of latching current density and hence peak temperature-withstanding capability of IGBT cells by design parameter modification has been demonstrated by enhancing the current density of safe operation of IGBT cell at a given temperature with the adoption of suitable design techniques.

A novel high performance stacked LDD RF LDMOSFET

A novel silicon RF lateral double-diffused metal oxide semiconductor field effect transistor (LDMOSFET) structure, using a simple yet effective concept of stacked lightly doped drain (LDD), is proposed. The stacked layers of LDD minimizes the on-state resistance of the transistor due to the n+ doping used in the top LDD layer, and also raises the device breakdown voltage due to the charge compensation in the composite LDD region. Therefore, for the same blocking voltage rating, the stacked LDD structure allows the LDMOSFET to have a higher current handling capability. This in turn causes the transconductance Gm to be higher, leading to higher RF performance for the power device. Measured results show that a 67% improvement in I/sub dsat/ and a 16% improvement in forward blocking voltage are obtained. Furthermore, the new device achieves an increase in transconductance of 145% and improves cut-off frequency by 108% at a gate voltage of 10 V.

Silicon carbide distributed buffer gate turn-offthyristorstructure for blocking high voltages

Silicon carbide gate turn-off thyristor simulations indicate that including within the drift region an n-type layer, doped 5 × 1016 cm-3 and located 3 µm below the top of the drift region, improves the forward blocking state electrostatic field profile. This structure, with a 15 µm total drift region thickness and no other field termination, blocks 2211 V, against 757 V if the n-type buffer layer is left out.

Optimization of vertical 600 and 1500 V SOI-ESTs with low on-state voltages

For the first time, SOI-emitter switched thyristors (SOI-ESTs) with forward blocking capability of 600 and 1500 V have been fabricated. In these devices, the lateral turn-off transistor of the EST is separated dielectrically from the vertical thyristor using SIMOX Separation by Implanted Oxygen technology. By this method, the parasitic thyristor inherent to other ESTs is totally eliminated. The effects of parametrical variations on the output characteristics of the SOI-EST are discussed.

Silicon planar ACCUFET: improved power MOSFET structure

An improved power MOSFET structure in silicon. Called the planar ACCUmulation channel field effect transistor (planar ACCUFET) is proposed. In this device, the P base and the deep P/sup +/ regions of the conventional DMOSFET are replaced by a depleted N-type base region created using a buried P/sup +/ region. Numerical simulations show that the planar ACCUFET has good forward blocking characteristics with low leakage current. The specific on-resistance, as well as the gate charge of the planar ACCUFET are lower than those of a DMOSFET with the same voltage rating. Furthermore, the planar ACCUFET requires a smaller thermal budget for fabrication than the DMOSFET.

On-line particulate detection in molten polymer streams

Polymer-based businesses face productivity losses due to unwanted particles, gels, agglomerates and other contaminates. The ability to detect, reduce and eliminate them directly impacts product properties, product quality, recycle, waste generation, manufacturing equipment downtime and human resources. A commercial instrument which has the capability to monitor (detect, size and count) these contaminates is the Kayeness/Flow Vision Polymer Event Detector and its replacement the Continuous On-Line Analyzer (COLA 2000). Both instruments use visible light in a forward light blocking technique to obtain images of events that are analyzed for size and number count. Probes that withstand high temperature and pressure may be installed in a number of process locations. Examples of off-line and in-line applications will be discussed.

Design of a 600 V silicon carbide vertical power MOSFET

Silicon carbide (SiC) owns very interesting properties to fulfil the requirements of new power electronic applications. This paper reports the design of two vertical power MOSFETs, able to sustain a forward blocking voltage of 600 V. In order to evaluate the performance, 2D-simulations were performed taking into account the current technological constraints and the SiC materials parameters.