Finite State Machine Model Research Articles

The Bajau-Tainment: An AI-Powered Puzzle Game for Learning the Bajau Language Using Finite State Machine and Shuffle Techniques

The research titled "Bajau-tainment" Educational Game (Edu-game) is a research project that focuses on the development of a Puzzle Game designed to improve memory, specifically in language learning. In this game, players must arrange randomized letters to form a word in the Bajau language. This research applies the shuffle random algorithm, which aims to ensure that the arrangement of letters is always shuffled, making the gameplay dynamic, non-monotonous, and engaging. AI Artificial Intelligence (AI) technology will also be applied in this research. Using the Finite State Machine (FSM) model method, the game will feature a game agent character that will accompany children during gameplay, like how a friend accompanies students in a classroom. This virtual friend can display emotions such as happiness or sadness based on the game environment. The research aims to make this edu-game more appealing and interactive for children. The AI game agent will act as a friend who accompanies the child throughout the game.

A Finite State Machine Model for Business Flow in Active Distribution Networks Considering the Multi-flow Fusion Process

A Finite State Machine Model for Business Flow in Active Distribution Networks Considering the Multi-flow Fusion Process

SYNTHESIS OF VHDL-MODEL OF A FINITE STATE MACHINE WITH DATAPATH OF TRANSITIONS

Context. The problem of building a program model of a finite state machine with datapath of transitions using VHDL language is considered. The model synthesis process is identified with the synthesis of this type of finite state machine, since the built model can be used both for the analysis of the device’s behavior and for the synthesis of its logic circuit in the FPGA basis. The object of the research is the automated synthesis of the logic circuit of the finite state machine with the datapath of transitions, based on the results of which numerical characteristics of the hardware expenses for the implementation of the state machine circuit can be obtained. This makes it possible to evaluate the effectiveness of using this structure of the finite state machine when implementing a given control algorithm.
 Objective. Development and research of a VHDL model of a finite state machine with datapath of transitions for the analysis of the behavior of the state machine and the quantitative assessment of hardware expenses in its logic circuit.
 Method. The research is based on the structural diagram of a finite state machine with datapath of transitions. The synthesis of individual blocks of the structure of the state machine is carried out according to a certain procedure by the given graph-scheme of the con-trol algorithm. It is proposed to present the result of the synthesis in the form of a VHDL description based on the fixed values of the states codes of the state machine. The process of synthesizing the datapath of transitions, the block of formation of codes of transitions operations and the block of formation of microoperations is demonstrated. VHDL description of that blocks is carried out in a synthesizable style, which allows synthesis of the logic circuit of the finite state machine based on FPGA with the help of modern CAD and obtaining numerical characteristics of the circuit, in particular, the value of hardware expenses. To analyze the correctness of the synthesized circuit, the process of developing the behavioral component of the VHDL model, the function of which is the generation of input signals of the finite state machine, is considered. The classical combination of the synthesizable and behavioral parts of the model allows presenting the results of the synthesis of a finite state machine with datapath of transitions as a separate project that can be used as a structural component of the designed digital system.
 Results. Using the example of an abstract graph-scheme of the control algorithm, a VHDL model of a finite state machine with datapath of transitions was developed. With the help of CAD AMD Vivado, a synthesis of the developed model was carried out and behavioral modeling of the operation of the finite state machine circuit was carried out. The results of the circuit synthesis made it possible to obtain the value of hardware expenses when implementing the circuit in the FPGA basis. According to the results of behavioral modeling, time diagrams were obtained, which testify to the correctness of the implementation of the functions of transitions and outputs of the synthesized state machine.
 Conclusions. In traditional VHDL models of finite state machines, the states do not contain specific codes and are identified using literals. This allows CAD to encode states at its own discretion. However, this approach is not suitable for describing a finite state machine with datapath of transitions. The transformation of states codes using a set of arithmetic and logic operations requires the use of fixed values of states codes, which determines the specifics of the VHDL model proposed in this paper. This and similar models can be used, in particular, in the study of the effectiveness of a finite state machine according to the criterion of hardware expenses in the device circuit.

Defect Prediction of Finite State Machine Models Based on Transfer Learning

Defect Prediction of Finite State Machine Models Based on Transfer Learning

Separation of Input Variables for Optimization of the Mealy FSM Circuit

Introduction. One of the most important blocks of almost any digital system is the control device (CU), since the characteristics of the CU largely determine the characteristics of the system as a whole. In the practice of engineering design, the behavior of the CU is often specified using the Mealy finite state machine (FSM) model. A feature of Mealy FSM is the dependence of systems of Boolean functions that define the circuit on FSM inputs and states. In this article, this feature is taken into account when optimizing the characteristics of FSM circuit in the basis of FPGA chips. When developing FSM circuits, it is necessary to optimize its characteristics, such as performance and hardware costs. FPGAs are one of the most common logic bases for implementing digital systems. FPGA components such as look-up table (LUT) elements, programmable flip-flops, embedded memory blocks (EMBs), and programmable interconnects are sufficient to implement the CU circuit. The purpose of the article. In this paper, we propose a method for reducing hardware costs in the Mealy FSM cirucit implemented in the FPGA basis. In this case, the problem of implementing a circuit in a mixed elemental basis is considered. A mixed basis is understood as the joint use of LUTs and EMBs. The situation is considered when the number of available EMBs is extremely limited, which is quite possible, since EMBs are widely used to implement various operating blocks of digital systems. The main disadvantage of LUTs is the small number of inputs. Modern digital systems can generate signals of logical conditions entering the CU, the number of which is tens of times greater than the number of LUT inputs. This discrepancy between the characteristics of the control algorithm and the number of inputs of the LUTs leads to multilevel CU circuits with an irregular structure of programmable interconnections. To optimize multilevel schemes, the method of replacing input variables is used with the joint use of LUTs and EMB blocks. Results. The analysis of the effectiveness of the proposed method was carried out using the libraries of standard benchmarks FSMs and the Vivado CAD platform. Studies have shown that the proposed method makes it possible to reduce the number of LUTs in the range from 100% to 82%. For 37% of automata, the method of replacing input variables can be applied only in conjunction with the separation of input variables. Conclusions. The proposed method makes it possible to reduce hardware costs (the number of LUTs and their interconnections), delay time, and power consumption. The article shows the conditions for applying the proposed method. The results of studies of the effectiveness of the proposed method for standard automata using chips of the Virtex-7 family and the Vivado industrial package are presented. Keywords: finite state machine, synthesis, FPGA, EMB, LUT, input replacement.

Using SAT Solvers to Reverse-Engineer FSM Models of Digital Devices

Inferring a functional specification from an existing digital design is a challenge that is suitable with reverse-engineering methods. One of the most widely used functional specification formats is a finite state machine (FSM). This article studies the possibility of blind passive specification mining for a digital device, where the device is treated as a “black box”. The presented approach treats an input and output signal waveform as the transition graph of an incomplete deterministic FSM and learns the FSM through FSM minimization. It employs a Boolean satisfiability problem (SAT) solver to find a minimal FSM that complies with observed object behavior. The known approach to identifying state machines in discrete event systems is adapted to operate with variables in the form of coloring and transition tables. The developed implementation produces a synthesizable specification in hardware description language (HDL) and a state diagram in unified modeling language (UML). The proposed approach for inferring an FSM from a waveform trace can serve as a supplementary tool during reverse engineering to provide developers with meaningful insight regarding the analyzed device. The presented case study defines metrics of successful FSM inference and applies them to a synthetic FSM and a real-world example FSM to demonstrate the applicability of the approach.

Structural Models for Failure Detection of Moore Finite-State Machines

Fault detection is an important task in the design of fault-tolerant state machines. Structural models of Moore finite-state machines are proposed to detect multiple faults in various elements of the finite-state machine and prevent their negative impact on the controlled object. The structural models under consideration make it possible to detect invalid input and output vectors both in each state and for the entire automaton, invalid code of the current and next state of the automaton, and invalid transitions between states. The costs of implementing the proposed structures by area range on average from 3 to 26%, and the speed of the machine either does not change or even increases by an average of 24–30%. Estimates of the area and performance of the proposed structural models of finite-state machines are given, and recommendations for their practical use are given. It is shown that the choice of a suitable structure allows us not to increase the area, and in some cases even leads to an increase in the performance of the finite-state machine.

Implementation of Finite State Machine Models on the Artificial Intelligence System of Characters in The Game "MMORPG" using RPG Maker

Technological developments are the main drivers of global social, economic, and cultural change, including in the rapidly growing gaming industry. The Role-Playing Game (RPG) genre, in which players portray characters in the game's story, is gaining popularity. The application of FSM Models and AI technology in character development and RPG game interaction not only resulted in exciting entertainment, but also inspired similar uses in various fields. With AI, characters interact dynamically with players and environments, and FSM Models govern complex character behavior, the game experience is even more immersive. RPG Maker, one of the popular engines, simplifies the process of creating RPG games with an easy user interface. The implementation of the FSM Model is done through events and switches, directing storylines and character situations with structured logic. This study analyzes the application of FSM Model in MMORPG RPG games. Through the design, testing, and analysis stages, FSM proved effective in creating games that combine entertainment with learning. This game invites players to look for requirements and challenges to proceed to the next level. The result is an MMORPG game played on a PC with a Windows operating system, providing an educational and entertaining gaming experience.

NFT-Vehicle: A Blockchain-Based Tokenization Architecture to Register Transactions over a Vehicle’s Life Cycle

The sale of second-hand vehicles is a popular trade worldwide, and vehicle fraud is currently a common issue, mainly because buyers can lack a complete view of the historical transactions related to their new acquisition. This work presents a distributed architecture for stakeholders to register transactions over a vehicle’s life cycle in a blockchain network. The architecture involves a non-fungible token (NFT) linked to a physical motorized vehicle after a tokenization process, which denote as the NFT-Vehicle. The NFT-Vehicle is a hierarchical smart contract designed using an object-oriented paradigm and a modified version of the ERC721 standard. Every stakeholder engages with the NFT-Vehicle through distinct methods embedded within a smart contract. These methods represent internal protocols meticulously formulated and validated based on a finite-state machine (FSM) model. We implemented our design as a proof of concept using a platform based on Ethereum and a smart contract in the Solidity programming language. We carried out two types of proof: (a) validations, following the FSM model to ensure that the smart contract remained in a consistent state, and (b) proofs, to achieve certainty regarding the amount of ETH that could be spent in the life cycle of a vehicle. The results of the tests showed that the total transaction cost for each car throughout its life cycle did not represent an excessive cost considering the advantages that the system could offer to prevent fraud.

About Some Aspects of Finite State Machine Models Application to Group Control

The article discusses using discrete-event models to control the coordinated behavior of groups of agents and proposes a mechanism for organizing behavior control based on a hierarchy of finite state machines (FSM). The basic level of agent movement control uses a continuous model of joint movement — the method of potentials, in which the direction of movement is determined by the total sum of the forces of "repulsion", "attraction" and "course alignment". The paper describes a set of independent rules for the group movement of agents — cohesion, distribution, leader following, movement along a chain of landmarks, pursuit, etc. Moreover, all of them are interpreted in terms of the results of the operation of FSM models. Mathematical modeling of controlling a group of agents was carried out using the independent rules of group movement, which confirmed their efficacy. Computational experiments were also carried out using the Gazebo 3D simulator. In addition, the paper describes an experimental group of three underwater vehicles that were used to test the independent rules of group movement: cohesion, distribution, leader following. Communication between the devices was carried out using a system of infrared transceivers via a pseudo-analog channel. The experiments were carried out in a laboratory pool and were successful.The paper shows that the technology for creating group control systems based on the hierarchy of FSM (meta-FSM) allows solving control problems not only at the level of abstract models and simulation modeling, but also at the level of creating real robotic complexes.

Reinforcement Learning-Based Lane Change Decision for CAVs in Mixed Traffic Flow under Low Visibility Conditions

As an important stage in the development of autonomous driving, mixed traffic conditions, consisting of connected autonomous vehicles (CAVs) and human-driven vehicles (HDVs), have attracted more and more attention. In fact, the randomness of human-driven vehicles (HDV) is the largest challenge for connected autonomous vehicles (CAV) to make reasonable decisions, especially in lane change scenarios. In this paper, we propose the problem of lane change decisions for CAV in low visibility and mixed traffic conditions for the first time. First, we consider the randomness of HDV in this environment and construct a finite state machine (FSM) model. Then, this study develops a partially observed Markov decision process (POMDP) for describing the problem of lane change. In addition, we use the modified deep deterministic policy gradient (DDPG) to solve the problem and get the optimal lane change decision in this environment. The reward designing takes the comfort, safety and efficiency of the vehicle into account, and the introduction of transfer learning accelerates the adaptation of CAV to the randomness of HDV. Finally, numerical experiments are conducted. The results show that, compared with the original DDPG, the modified DDPG has a faster convergence velocity. The strategy learned by the modified DDPG can complete the lane change in most of the scenarios. The comparison between the modified DDPG and the rule-based decisions indicates that the modified DDPG has a stronger adaptability to this special environment and can grasp more lane change opportunities.

DpGuard: A Lightweight Attack Detection Method for an Industrial Bus Network

In industrial control systems (ICSs), the PROFIBUS-DP (decentralized peripherals) protocol is widely used for communication between devices. Because PROFIBUS-DP is an unencrypted and insecure bus protocol, attackers can connect to the PROFIBUS-DP system and arbitrarily manipulate I/O process values, which may interrupt the normal operation of industrial equipment, or have more serious consequences. However, due to the complex structures of bus networks and the large number of attack areas, the existing scheme does not monitor all the messages in the industrial head office network and cannot effectively detect semantic attacks. To solve this problem, we propose a novel attack detection system DpGuard. DpGuard automatically builds a finite-state machine model of normal ICS behavior through a large number of historical ICS traffic data. The model includes state events, state transitions, state transition probability, and other normal behavior information. In addition, DpGuard records the execution status of the context data package, uses the real-time captured data package as the input of the model, and judges whether the state event and state transition probability conform to the constraints of the finite-state machine model, so as to identify the legitimate normal behavior of the ICS. Our proposal was evaluated using two Siemens PLCs (programmable logic controllers) deployed on the PROFIBUS-DP system. The experimental results demonstrated that the scheme could accurately detect fault injection and semantic attacks. Compared with other detection models, our scheme presented an improved detection performance, with a detection accuracy of 99.80%.

Design and Control of a Size-Adjustable Pediatric Lower-Limb Exoskeleton Based on Weight Shift

Lower-limb exoskeletons have been proven to be beneficial for motor function disability patients, in both clinical rehabilitation settings and daily activities. However, exoskeletons for the pediatric field are still very limited. In this paper, a novel lower-limb exoskeleton design for children is presented. Based on the anthropometric data of the target group, the size of the exoskeleton is designed adjustable to suit children from 8 to 12 years old. It employs six active joints on the knee and hip, actuated by Brushless DC motors and Harmonic Drive gears. The controller is based on a finite state machine model and the weight shift between two feet to generate the gait trajectory. An innovative automatic step-triggering mechanism is also proposed, based on the feedback from the ground reaction force sensor on the foot. Two user interfaces on the exoskeleton and the host PC are designed for easily operating the exoskeleton by clinicians and engineers. Experiments have been conducted with three healthy volunteers following the predesigned rehabilitation session protocol. Results show that the exoskeleton can well follow the gait trajectory generated by the control algorithm. All volunteers can fulfill all tasks in the test protocol with reduced efforts and the steps are automatically triggered by the presented controller.

Modeling and TOPSIS-GRA Algorithm for Autonomous Driving Decision-Making Under 5G-V2X Infrastructure

This paper is to explore the problems of intelligent connected vehicles (ICVs) autonomous driving decision-making under a 5G-V2X structured road environment. Through literature review and interviews with autonomous driving practitioners, this paper firstly puts forward a logical framework for designing a cerebrum-like autonomous driving system. Secondly, situated on this framework, it builds a hierarchical finite state machine (HFSM) model as well as a TOPSIS-GRA algorithm for making ICV autonomous driving decisions by employing a data fusion approach between the entropy weight method (EWM) and analytic hierarchy process method (AHP) and by employing a model fusion approach between the technique for order preference by similarity to an ideal solution (TOPSIS) and grey relational analysis (GRA). The HFSM model is composed of two layers: the global FSM model and the local FSM model. The decision of the former acts as partial input information of the latter and the result of the latter is sent forward to the local path-planning module, meanwhile pulsating feedback to the former as real-time refresh data. To identify different traffic scenarios in a cerebrum-like way, the global FSM model is designed as 7 driving behavior states and 17 driving characteristic events, and the local FSM model is designed as 16 states and 8 characteristic events. In respect to designing a cerebrum-like algorithm for state transition, this paper firstly fuses AHP weight and EWM weight at their output layer to generate a synthetic weight coefficient for each characteristic event; then, it further fuses TOPSIS method and GRA method at the model building layer to obtain the implementable order of state transition. To verify the feasibility, reliability, and safety of the HFSM model as well as its TOPSIS-GRA state transition algorithm, this paper elaborates on a series of simulative experiments conducted on the PreScan8.50 platform. The results display that the accuracy of obstacle detection gets 98%, lane line prediction is beyond 70 m, the speed of collision avoidance is higher than 45 km/h, the distance of collision avoidance is less than 5 m, path planning time for obstacle avoidance is averagely less than 50 ms, and brake deceleration is controlled under 6 m/s2. These technical indexes support that the driving states set and characteristic events set for the HFSM model as well as its TOPSIS-GRA algorithm may bring about cerebrum-like decision-making effectiveness for ICV autonomous driving under 5G-V2X intelligent road infrastructure.

A Simplifying-Matrix Method to Reduce the Storage Complexity in Studying Finite State Machines in the Framework of STP

The storage complexity problem is one of the severe challenges faced by research of finite state machines (FSMs) in the framework of STP, which must be overcome to make theoretical methodologies applicable to real applications. In this brief we propose a simplifying-matrix method to reduce the complexity of storing the dynamic matrix of an FSM when using computers to deal with problems. This method consists of three key components. Firstly, a mapping from logical matrices to logical vectors is proposed to retain effective information and remove large quantities of useless information from dynamic matrices of FSMs. Secondly, an alternative simplified dynamic matrix is constructed. Finally, a mapping from scalars to logical vectors is proposed to optimize the original model of FSMs and preserve the bilinear feature. In addition, we show that the proposed method is also applicable to reduction of the storage complexity of various logic dynamic systems in the framework of STP, such as, game systems, Boolean control networks, fuzzy systems and graphs.

SYNTHESIS OF THE FINITE STATE MACHINE WITH DATAPATH OF TRANSITIONS ACCORDING TO THE OPERATIONAL TABLE OF TRANSITIONS

Context. The problem of formalizing the description of a microprogram finite state machine based on the principle of operational transformation of state codes with the help of a modified transition table is considered. The object of research was a model of a microprogram finite state machine with datapath of transitions.
 Objective. The goal of the work is development and research of a method for formally specifying a microprogram finite state machine with datapath of transitions in the form of a modified table of transitions containing sufficient information for synthesizing the logic circuit of the finite state machine in the basis of programmable logic devices.
 Method. A new way of representing the formal solution of the problem of algebraic synthesis of a microprogram finite state machine with datapath of transitions in the form of an operational table of transitions is proposed. This table is a modification of the direct structural table traditionally used in the synthesis of microprogram finite state machines. The use of the previously known representation of the formal solution of the problem of algebraic synthesis in the form of a system of isomorphisms of automaton algebras is too formalized and makes it difficult to synthesize the logical circuit of the finite state machine due to the separate description of the transition and output functions. It is shown that the structure of a microprogram finite state machine with datapath of transitions requires information about the set of interpretations of state codes and the transition operations used to be entered into the traditional table of transitions. It is noted that the proposed operational table of transitions contains sufficient information for the synthesis of the logical circuit of the finite state machine. An example of constructing an operational table of transitions for a finite state machine given by a graph-scheme of the implemented control algorithm is shown. The example demonstrates various ways to interpret state codes. The procedure for synthesizing the circuit for generating codes of transition operations and the circuit for generating microoperations according to the operational table of transitions is proposed.
 Results. An example of the implementation of the main stages of the synthesis of a finite state machine with datapath of transitions according to the operational table of transitions is considered. Examples of synthesized finite state machine models in the VHDL language are given, which take into account the peculiarities of the representation of finite state machine models in Xilinx Vivado CAD. The results of the synthesis of the finite state machine according to VHDL models in FPGA basis are shown.
 Conclusions. The experiments carried out confirmed the sufficiency of the operational table of transitions for describing a microprogram finite state machine with operational transformation of state codes for the purpose of further synthesizing its logic circuit. Prospects for further research are the use of the proposed operational table of transitions in the development of various methods for the synthesis and optimization of microprogram finite state machine with operational transformation of state codes.

VERIFICATION OF AUTOMATONS BY MODEL CHECKING METHOD

The article analyzes software verification of control systems based on finite state machines, presents a classification of software correctness checks, advantages and disadvantages of various approaches to software verification, and, as a result, justifies the use of static verification methods, namely the model checking method. To solve applied problems, it is proposed to use the NuSMV software verifier. A brief overview of NuSMV verifier is given. The route of verification of software written in automaton style by the method of model checking is described. Each stage is described in the example of two interacting automata method. The construction of the model is described from a verbal description of its transformation into a finite state machine model with intermediate states and the transformation of the automaton into a formal finite state machine model in the SMV language, which is the input data for the NuSMV verifier. A description of the requirements for the model is presented, ranging from a verbal description of the requirements to the formalization of requirements in language of the temporal logic CTL. Based on the obtained model in SMV language and the obtained formalization of the requirements in CTL temporal logic language, NuSMV verifier checks the feasibility of the obtained requirements on the obtained model of the automata system. An analysis of the results of verification according to the specified requirements is given. For verification, an error was introduced into the model, leading to a negative result of the feasibility of the specified requirements. The verifier indicated the presence of an error and the path leading to it. Based on the results of the analysis of the results, a conclusion is made about the need to use this verification method in tasks of responsible applications. Further steps for the development and implementation of this method are described.

Verification Approach for Refactoring Transformation Rules of State-Based Models

With the increased adoption of Model-Driven Engineering (MDE), where models are being used as the primary artifact of software, it is apparent that greater attention to the quality of the models is necessary. Traditionally, refactoring is used to enhance the quality of software systems at the source-code level; however, applying refactoring at the model level will have a more significant improvement on the system. After refactoring a model, proving that it still preserves its original behavior is crucial. In this paper, we present a process for applying refactoring transformations to the Extended Finite State Machine (EFSM) models using verified transformation rules that have been proven to preserve the model's original behavior. We provide a simplified three-step verification approach that can be used to prove that a transformation rule will generate a transformed model that is semantically equivalent to the original model. To do this, we formally define semantical equivalence at three different levels of granularity: models, sub-models, and transitions. Additionally, we introduce five model transformation rules and we demonstrate how our verification approach is used to prove the correctness of these rules. Finally, we present two case studies where we apply the proposed transformation process which adopts the five verified transformation rules. Using model testing, we show that applying a sequence of transformations using the verified transformation rules will keep both the original and the transformed model semantically equivalent. Additionally, the case studies show that model transformation can be used to enhance certain pre-defined model characteristics.

A formal verification approach for composite smart contracts security using FSM

Many of today's companies use Smart Contracts to represent and execute their business processes. Smart contracts are self-executed programs running over blockchain. In this context, composite smart contracts are used to represent collaborative business processes. A composite smart contract is a smart contract that needs to execute other contracts using external calls to achieve its tasks. Composite smart contracts, through the use of external calls and the execution of other smart contracts that might belong to other owners or companies, bring many challenges with regard to security requirements. As a result, special efforts must be done to ensure composite smart contracts security verification. In this paper, we propose a novel approach to verify the security and the correctness of the composite smart contracts written in solidity in Ethereum blockchain. This approach is based on the finite state machine models and model checking method for modeling and verifying the composite smart contracts respectively. We consider seven security properties as well as the security issues that depend on the contract context to be checked in the composite smart contract. For this, we provide two different yet complementary types of verification. The first type of verification is applied to all smart contracts with properties called in our approach “standard properties” that represent the generic ones, while the second type considers the context-dependent properties that we called “specific properties” varying from one smart contract to another. Finally, we express all properties using computation tree logic formulae and we use the nuXmv symbolic model checker to verify the model against all properties. This approach is validated using a different set of solidity smart contracts.

Self-Adaptive Framework With Master–Slave Architecture for Internet of Things

The Internet of Things (IoT) connects a wide range of entities and can be applied to various types of environments. In addition, IoT environments can be dynamically changed at runtime; thus, IoT systems can be deployed in various environments. To support stable operation, IoT systems must adapt to dynamic environmental changes. The self-adaptive software aims to adjust various artifacts or attributes of software to adapt the detected context by itself, and various studies have applied self-adaptive methods in IoT-related research. In this study, we proposed a self-adaptive software framework with master–slave architecture-based finite-state machine modeling. In addition, model checking is applied, which is a formal method to verify IoT systems at runtime, and a cache-based mechanism is applied to reduce the computational time required for verification. To demonstrate the efficiency of the proposed framework, an empirical evaluation was performed with several model-checking tools (RINGA, NuSMV, nuXmv, and CadenceSMV), and the results showed the efficiency of the proposed framework with the cache-based mechanism. In addition, an example application was investigated with smart greenhouse scenarios, and the application was implemented on Android and Arduino. The application was operated in physical environments, and the results showed the practical usability of the proposed framework with verification at runtime.