Field-effect Transistor Memory Devices Research Articles

Large-Area Arrays of Polymer-Tethered Gold Nanorods with Controllable Orientation and Their Application in Nano-Floating-Gate Memory Devices.

In this work, it is reported that large-area (centimeter-scale) arrays of non-close-packed polystyrene-tethered gold nanorod (AuNR@PS) can be prepared through a liquid-liquid interfacial assembly method. Most importantly, the orientation of AuNRs in the arrays can be controlled by changing the intensity and direction of electric field applied in the solvent annealing process. The interparticle distance of AuNR can be tuned by varying the length of polymer ligands. Moreover, the AuNR@PS with short PS ligand are favorited to form orientated arrays with the assistance of electric field, while long PS ligands make the orientation of AuNRs difficult. The orientated AuNR@PS arrays are employed as the nano-floating gate of field-effect transistor memory device. Tunable charge trapping and retention characteristics in the device can be realized by electrical pulse with visible light illumination. The memory device with orientated AuNR@PS array required less illumination time (1 s) at the same onset voltage in programming operation, compared to the control device with disordered AuNR@PS array (illumination time: 3 s). Moreover, the orientated AuNR@PS array-based memory device can maintain the stored data for more than 9000 s, and exhibits stable endurance characteristic without significant degradation in 50 programming/reading/erasing/reading cycles.

High performance nonvolatile organic field‐effect transistor memory devices based on pyrene diimide derivative

AbstractDeveloping high‐quality electret layer is important for the fabrication of high‐performance nonvolatile organic field effect transistor memory devices (OFET‐NVMs). In this work, three representative aromatic diimide frameworks are employed for comparative studies as n‐type doping materials for the electret layers in OFET‐NVMs, which are naphthalene diimide (NDI), perylene diimide (PDI), and pyrene diimide (PyDI). When blended with polystyrene (PS) to prepare the electret layers, all the memory devices containing aromatic diimide dopants exhibited significantly improved performances compared with the undoped counterparts, indicating that low‐lying LUMO energy levels of these dopants are beneficial for charge injection. All the devices with n‐type dopants exhibited long retention times (more than 104 s) and good switching reliability in more than 400 continuous write‐read‐erase‐read cycles. Among them, the PyDI‐based memory device exhibited superior performance compared with other aromatic diimides, which achieved a memory window of 34.0 V, a trapping charge density of 1.98 × 1012 cm−2 along with an on/off ratio higher than 104. This work indicates that PyDI framework could be a new platform for the future design of n‐type dopant for high‐performance nonvolatile organic field‐effect transistor memory devices.image

Study of the pyridyl-containing charge-trapping functional materials in the organic field effect transistor memory devices

Interface materials can effectively improve the storage characteristics of the memory devices. In this paper, a series of functional materials with propyl chain bridging pyridyl ring and triethoxysilyl group, 3-(3-(triethoxysilyl)propyl)pyridine (Pyridyl-C), N-(3-(triethoxysilyl)propyl)pyridin-3-amine (Pyridyl-N) and 3-(3-(triethoxysilyl)propoxy)pyridine (Pyridyl-O), were selected as the charge-storage interface materials to study the storage characteristics of nonvolatile organic field-effect transistor (OFET) memory devices. The results demonstrated that the memory performance could be enhanced by adding lone-pair-electron atoms (N, O) between pyridyl group and propyl chain. With the programming voltage of −30 V staying in dark condition for 1 s, the memory windows were increased from 12.48 V to 14.95 V, then to 21.99 V when the –O and N atoms were introduced, respectively. All memory devices could remain stable for more than 104 s. The morphology images indicated that there were aggregates on the interfacial layers, and the size was increased when the atoms (O, N) were added because of the hydrogen-bonding interaction. The aggregates can increase the contact area between pentacene and interface materials and further enlarge the effective tunneling area. In addition, the variation of self-assembling immersing time for preparing Pyridyl-N layers was studied, indicating that with the extension of the immersing time, the size of aggregates was increasingly enlarged and memory performance was improved correspondingly.

Organic Field-Effect Transistor Memory Device Based on an Integrated Carbon Quantum Dots/Polyvinyl Pyrrolidone Hybrid Nanolayer

In this work, we present a pentacene-based organic field-effect transistor memory (OFETM) device, which employs one-step microwave-assisted hydrothermal carbon quantum dots (CQDs) embedded in a polyvinyl pyrrolidone (PVP) matrix, to form an integrated hybrid nanolayer as the charge trapping layer. The as-prepared CQDs are quasi-spherical amorphous C, with sizes ranging from 5 to 20 nm, with a number of oxygen-containing groups and likely some graphite-like domains that produce CQDs with excellent electron-withdrawing characteristics. The incorporation of CQDs into PVP dielectric materials results in a bidirectional storage property. By optimizing the concentration of CQDs embedded into the PVP matrix, the OFETM shows excellent memory characteristics with a large memory window of 8.41 V under a programming/erasing (P/E) voltage of ± 60 V and a retention time of up to 104 s.

Multilevel Photonic Transistor Memory Devices Using Conjugated/Insulated Polymer Blend Electrets.

Photonic data storage has diverse optoelectronic applications such as optical sensing and recording, integrated image circuits, and multibit-storage flash memory. In this study, we employ conjugated/insulated polymer blends as the charge storage electret for photonic field-effect transistor memory devices by exploring the blend composition, energy level alignment, and morphology on the memory characteristics. The studied conjugated polymers included poly(9,9-di-n-octylfluorenyl-2,7-diyl) (PF), poly[2-methoxy-5-(2-ethylhexyloxy)-1,4-phenylenevinylene] (MEH-PPV), poly[{2,5-di(3',7'-dimethyloctyloxy)-1,4-phenylene-vinylene}-co-{3-(4'-(3″,7″-dimethyloctyloxy)phenyl)-1,4-phenylenevinylene}-co-{3-(3'-(3',7'-dimethyloctyloxy)phenyl)-1,4-phenylenevinylene}] (SY-PPV), and poly[(9,9-di-n-octylfluorenyl-2,7-diyl)-alt-(benzo[2,1,3]thiadiazol-4,8-diyl)] (F8BT), and the insulated polymers were polystyrene (PS) and poly(methyl methacrylate) (PMMA). The photonic memory device using the PF/PS blend electret exhibited a dynamic switching behavior with light-writing and voltage-erasing processes both within only 1 s, along with a high contrast on the current on/off ratio between "Photo-On" and "Electrical-OFF" over 106 and the decent retention time for more than 3 months. In addition, the multilevel memory behavior could be observed using different light sources of 405, 450, and 520 nm or energy intensity, which was supported by surface potential analysis. The characteristics were superior to those of the devices using PF/PMMA blend due to the higher charge storage behavior of PS supported by fluorescence analysis. The PF/PS blend film prepared from the chlorobenzene solvent exhibited mesh-like and aggregated PF domains in the PS matrix and enhanced the contact surface area between the semiconductor and blend electret, leading to a higher memory window. The photonic memory behavior was also observed in the blend electrets of PS with the low band gap polymer, MEH-PPV, SY-PPV, or F8BT, by changing the photoresponsive light sources. Our study demonstrated a new electret system to apply on the multilevel photonic memory devices.

Pentafluorosulfanylated polymers as electrets in nonvolatile organic field-effect transistor memory devices

Styrenic polymer electrets with pentafluorosulfanylated sidechains demonstrate their charge-storage capabilities in organic nonvolatile memory devices.

9,10‐Imide‐Pyrene‐Fused Pyrazaacenes (IPPA) as N‐Type Doping Materials for High‐Performance Nonvolatile Organic Field Effect Transistor Memory Devices

AbstractThe fabrication of high‐performance nonvolatile organic field effect transistor (OFET) memory devices is reported using a series of pyrene‐fused pyrazaacene (PPA) and 9,10‐imide‐pyrene‐fused pyrazaacene (IPPA) derivatives as n‐type doping components. The obtained memory devices exhibit stable switching behaviors (>100 times) and good retention properties (>104 s). Devices based on chlorinated IPPA (IPPA‐Cl) show the largest memory window of 40.8 V, with a trapping charge density of 2.66 × 1012 cm−2 and on/off ratio higher than 106. Our investigation reveals that low‐lying lowest unoccupied molecular orbital energy levels and small dipole moment are key parameters for achieving high memory performance. This work provides a general guideline for the design of n‐type organic semiconductors as highly efficient doping materials for organic memory devices.

N-type polymeric organic flash memory device: Effect of reduced graphene oxide floating gate

In this paper, n type nonvolatile memory devices were fabricated by implanting a bilayer (rGO sheets/Au NP) floating gates, using n-type polymer semiconductor, poly {[N, N′ bis (2octyldodecyl) - naphthalene-1, 4, 5, 8 - bis (dicarboximide)-2,6-diyl] – alt - 5,5′ - (2, 2′ bithiophene)} [P(NDI2OD-T2)n]. In the developed organic field effect transistor memory devices, electrons are trapped/detrapped in rGO sheet/Au NP's nano-floating gates by controlling the charge carrier density in the active layer through back gate bias control. The devices showed interesting non-volatile memory properties with a large memory window of ∼34 V, a programming-reading-erasing cycling endurance of 103 times and most importantly, an improved retention time characteristics estimated by extrapolation (longer than the technological requirement of commercial memory devices (>10 years)). This approach provides a great potential for fabricating high-performances organic nano-floating gate memory devices and opens up a new way for the development of next-generation non-volatile memory devices.

The effect of porous structure of PMMA tunneling dielectric layer on the performance of nonvolatile floating-gate organic field-effect transistor memory devices

In this paper, we used the low and high density porous structure of polymethylmethacrylate (PMMA) film as tunneling dielectric layer in the floating-gate organic field-effect transistor (OFET) memory devices. Compared to the thin/thick nonporous structure of PMMA tunneling layer, the porous structure of PMMA tunneling layer had positive impacts on the device performance of the floating-gate OFET memory devices. Moreover, it was found that the memory performance was also increased as pore density of PMMA film increased. The atomic force microscopy (AFM) results of both porous structure of PMMA film and pentacene film on porous structure of PMMA film revealed that high density porous structure of PMMA tunneling layer can produce larger tunneling area and more electron transfer paths between pentacene film and PMMA film, which resulted in high electron capture and release efficiency of the floating-gate OFET memory devices with porous structure of PMMA tunneling layer. In addition, our porous structure of PMMA tunneling layer as well as nonporous PMMA film has high electrical insulating property due to their semi-hollow structure film, which is favourable to maintain stable retention property. Eventually, the floating-gate OFET memory devices with high density porous structure of PMMA tunneling layer showed good nonvolatile memory properties with a large memory window of about 43 V, a high ON/OFF current ratio of about 104, and stable endurance and retention properties. Our results provided a new strategy to achieve the high performance floating-gate OFET memory devices.

Organic nonvolatile memory devices utilizing intrinsic charge-trapping phenomena in an n-type polymer semiconductor

Charge trapping is an undesirable phenomenon and a common challenge in the operation of n-channel organic field-effect transistors. Herein, we exploit charge trapping in an n-type semiconducting poly (naphthalene diimide-alt-biselenophene) (PNDIBS) as the key operational mechanism to develop high performance, nonvolatile, electronic memory devices. The PNDIBS-based field-effect transistor memory devices were programmed at 60 V and they showed excellent charge-trapping and de-trapping characteristics, which could be cycled more than 200 times with a current ratio of 103 between the two binary states. Programmed data could be retained for 103 s with a memory window of 28 V. This is a record performance for n-channel organic transistor with inherent charge-trapping capability without using external charge trapping agents. However, the memory device performance was greatly reduced, as expected, when the n-type polymer semiconductor was end-capped with phenyl groups to reduce the trap density. These results show that the trap density of n-type semiconducting polymers could be engineered to control the inherent charge-trapping capability and device performance for developing high-performance low-cost memory devices.

Polymeric charge storage electrets for non-volatile organic field effect transistor memory devices

A review on polymeric charge storage electrets for constructing non-volatile organic field effect memory devices is presented.

Nonvolatile organic field-effect transistor memory devices using polymer electrets with different thiophene chain lengths

We report the synthesis of poly(5-hexyl-2-vinylthiophene) (PVT) and poly(5-hexyl-5′′-vinyl-2,2′:5,2′′-terthiophene) (PVTT) as charge storage electrets for nonvolatile organic field effect transistor (OFET) memory devices of n-type semiconducting N,N′-bis(2-phenylethyl)perylene-3,4,9,10-bis(dicarboximide) (BPE-PTCDI). The effects of the conjugated thiophene chain length on the morphology, OFET mobility and memory characteristics are explored and compared to those of the styrene or fluorene side chain. The mobility of the OFET memory device using PVTT as an electret is significantly smaller compared with that of PVT because its large torsional angle hinders the molecular packing of BPE-PTCDI. However, the OFET memory device using the PVTT electret has the largest hysteresis window of 81 V, compared to PVT, polystyrene (PS), and poly(styrene) para-substituted with fluorene (PSt-Fl). The highest HOMO energy level of PVTT facilitates the charge transfer from BPE-PTCDI and leads to the largest memory window. The backbone non-coplanarity prevents the back transfer of the charge for the nonvolatile memory characteristics. The device shows excellent nonvolatile behavior for bistable switching and the write–read–erase–read (WRER) cycles are operated over 100 cycles. The shifted threshold voltages of the OFET memory devices using PVTT are stable over 104 s, and the ON and OFF states could maintain 104 s with the Ion/Ioff current ratios of 103. This study suggests that the pendent conjugation length and the backbone coplanarity of polymer electrets significantly affect the charge mobility and electrical characteristics of OFET memory devices.

Polycyclic arene‐based D–A polyimide electrets for high‐performance n‐type organic field effect transistor memory devices

ABSTRACTWe report the memory characteristics of n‐type N,N′‐bis(2‐phenylethyl)‐perylene‐3,4:9,10‐tetracarboxylic diimide‐based organic field‐effect transistors (OFET) using a series of donor–acceptor (D–A) polyimide electrets of poly[4,4′‐diamino‐4″‐methyltriphenylamine‐hexafluoroisopropylidenediphthal imide] (PI(AMTPA‐6FDA)), poly[N,N‐bis‐(4‐aminophenyl)‐aminonaphthalene‐hexafluoroisopropylidenediphthalimide] (PI(APAN‐6FDA)), and poly[N,N‐bis‐(4‐aminophenyl)‐aminopyrene‐hexafluoroisopropylidenediphthalimide] (PI(APAP‐6FDA)). Among the polymer electrets, the OFET memory device based on PI(APAP‐6FDA) exhibits the largest memory window of 40.63 V and the best charge retention ability (maintained for over 104 s with the ON/OFF current ratio about 103) due to introducing polycyclic arene functionality of pyrene into the electron donating moiety. With the excellent carrier delocalization, pyrene successfully enhanced the charge storage ability and sustained the CT complex. Besides, PI(APAP‐6FDA)‐based OFET memory also performed well in the write‐read‐erase‐read tests for over 100 cycles. Our finding may provide a new approach for the preparation of high performance nonvolatile OFET memories with electrets of D–A polyimide systems. © 2013 Wiley Periodicals, Inc. J. Polym. Sci., Part A: Polym. Chem. 2014, 52, 139–147

Nonvolatile organic field effect transistor memory devices using one-dimensional aligned electrospun nanofiber channels of semiconducting polymers

We report the nonvolatile memory characteristics of organic field effect transistors (OFETs) using one-dimensional aligned electrospun (ES) nanofibers of semiconducting poly(9,9-dioctyl-fluorene-co-bithiophene) (F8T2). The effects of the nanofiber diameter associated with the polymer chain orientation on the charge transport and storage ability were explored. The OFET devices using the F8T2 ES nanofibers exhibited a large average memory window of ∼30 V, an on–off ratio of 102–103 and a hole mobility of 10−4 to 10−2 cm2 V−1 s−1. The write, erase and read processes of the memory device were performed by voltages across the nanofiber channels for at least 100 cycles and could be stabilized for at least 1000 s. The reversible hysteresis characteristics were attributed to the shallow trapping in the ordered/disordered domains of the F8T2 nanofibers from the in situ grazing incidence wide angle X-ray scattering (GIWAXS) analysis. Our results suggest that the semiconducting ES nanofibers could have potential applications for high performance OFET-based nonvolatile organic memory devices.

Simple Synthesis of Palladium Nanoparticles, β-Phase Formation, and the Control of Chain and Dipole Orientations in Palladium-Doped Poly(vinylidene fluoride) Thin Films

Palladium nanoparticles (Pd-NP's) are prepared by a simple one-step procedure when poly(vinylidene fluoride) (PVDF) is used as a polymer stabilizer. High-quality Pd-NP-doped PVDF thin films are fabricated where the heat-controlled spin-coating technique is adopted. The effect of Pd-NP's on the crystal modifications and lamellae orientation in PVDF films is investigated using Fourier transform infrared-grazing incidence reflection absorption spectroscopy. The electroactive β phase and edge-on crystalline lamellae are found to be formed preferentially in Pd-NP-doped PVDF films. As a result, Pd-NP-doped PVDF ultrathin films gave a very good discernible contrast between the written and erased data bits, which suggests that they can be used as a scanning-probe-microscopy-based ferroelectric memory device or a ferroelectric gate field-effect transistor memory device in the future.

Homo-junction ferroelectric field-effect-transistor memory device using solution-processed lithium-doped zinc oxide thin films

High performance homo-junction field-effect transistor memory devices were prepared using solution processed transparent lithium-doped zinc oxide thin films for both the ferroelectric and semiconducting active layers. A highest field-effect mobility of 8.7 cm2/Vs was obtained along with an Ion/Ioff ratio of 106. The ferroelectric thin film transistors showed a low sub-threshold swing value of 0.19 V/dec and a significantly reduced device operating voltage (±4 V) compared to the reported hetero-junction ferroelectric transistors, which is very promising for low-power non-volatile memory applications.

Charge-induced conductance modulation of carbon nanotube field effect transistor memory devices

We effectively tailored the charge trapping and transport behavior of a carbon nanotube field effect transistor memory device using charge interaction with underlying Ge nanoparticles in a HfO 2 high- κ dielectric. We also suggest a new route for modulating the Schottky barrier at the nanotube–electrode interface with localized charge trapping in discrete nanoparticles. This modification leads to an effective increase in the read-out conductance ratio of two to three orders magnitude under low voltage operation, associated with a large memory window of ∼5.3 V. Furthermore, we achieved a more controllable and reliable memory effect due to stable charge storage in deep nanoparticle traps, as compared to shallow HfO 2 defect states.

Technology of Ferroelectric Thin-Film Formation with Large Coercive Field on Amorphous SiO2 by Ion-Bombardment-Assisted Sputtering and Oxygen Radical Treatment for Future Scaling Down of Ferroelectric Gate Field-Effect Transistor Memory Device

Sr2(Ta1-x,Nbx)2O7 (perovskite STN; x=0.3) is one of the most practical candidates for one-transistor-type ferroelectric memory devices, because it has a low dielectric constant. However, in the application to metal–ferroelectric–insulator–Si field-effect transistor (MFIS-FET) memory devices, the fabrication of STN on an amorphous insulator, such as SiO2, is difficult. In particular, in the case of STN, because its crystallization annealing temperature is 950 °C, the metal elements of STN and Si react with each other during crystallization annealing. As a result, perovskite STN cannot be fabricated. To overcome this problem, we have developed an ion-bombardment-assisted sputtering method. Furthermore, to obtain universal conditions for forming perovskite STN based on plasma physics, plasma parameters such as ion bombardment energy and ion flux, were measured. Perovskite STN was obtained when the ion bombardment energy was 38 eV and the normalized Kr ion flux was 78 [ions/atom]. An IrO2/STN (140 nm)/STN seed layer (10 nm)/Si device whose STN was fabricated under these plasma conditions, shows square hysteresis curves and a memory window of 1.7 V under an 8 V writing operation. This value corresponds to a coercive field of 55 kV/cm.

Operation of nanocrystalline-silicon-based few-electron memory devices in the light of electron storage, ejection, and lifetime characteristics

A metal-oxide-semiconductor field-effect transistor memory device using nanocrystalline Si (nc-Si) dots as a floating gate over a short and narrow channel has been fabricated. Its operation at 77 K presents experimental evidence of storing and ejection of electrons associated with the nc-Si dot in the active area of the device. Though the lifetime of a single electron is apparently longer than the case when it is associated with another electron in the same nc-Si dot, a distribution in lifetime has been generally observed for the stored electrons in the nc-Si dots with the present memory devices.

Analysis of stored charge volatility in an MAOS memory element

An exact analytical solution is derived for the dynamics of the interface discharging process for a metal/Al 2O 3/SiO 2/Si (MAOS) insulated gate field effect transistor memory device. The predicted results are shown to be in good agreement with experimental data. It is seen that the discharge current is through the Al 2O 3 rather than the SiO 2 layer for the self-bias discharging conditions usually encountered. At temperatures above about 200°C the ohmic component of the Al 2O 3 current controls the volatility, whereas at lower temperatures (including room temperature) the Poole-Frenkel current is important. Hence the discharge process is highly temperature sensitive. The theory also predicts that the usually quoted half-lives of the interface charge at room temperature (of the order of 10 15 h based on the log time dependence) are gross overestimates; a more realistic value based on the exact theory is about 10 4–10 5 h.