FET Channel Research Articles

(Invited) Power Loss Reduction in Perforated-Channel HFET Switches

The key factors affecting the efficiency of power electronic systems are the conduction and switching losses in semiconductor power switches. For field-effect transistor switches, the conduction power loss is proportional to the product of the squared current, ION , flowing through the switch in the on-state and the switching loss is proportional to the squared maximum switch voltage, VMAX, the effective device output capacitance, COUT , and the switching frequency, fSW . Therefore, the RONCOUT product is an important figure of merit of a FET-type switch determining the overall power efficiency. Our proposed and implemented Perforated Channel (PC) FET design 1 allowed us to significantly reduce RON , but not COUT. We now propose and demonstrate the improved PC-HFET design that allows us to reduce both RON and COUT . This design reduces the power losses and significantly improves the efficiency of power electronics systems. In the PC-HFET, the portions of the channel under the gate are removed and the remaining channel forms a dash-line of islands WG1 wide with WGG spacing between them. The channel “filling factor” in PC-HFET is kF = WG1/(WG1+WGG ). Compared to conventional HFET with the same total width W, the total channel width and, hence, the device gate capacitance, of the PC-HFET is kF times smaller. However, our analytical estimates, numerical simulations (using the 3D simulation in Synopsys Sentaurus device simulator), and experimental data all show the on-resistance of the PC-HFET can be only 10-15% higher than that of the conventional HFET of the same width. This is achieved due to a strong current spreading effect in the source-to-gate and, especially, in a larger gate-to-drain spacing. The gate capacitance of PC-HFET reduces proportionally to the kF factor as proven by our simulations and experimental data presented in [1]. However our 3D simulations show that the CGD scaling in PC-HFET at high drain voltage is nearly the same as that for conventional HFET. To reduce this capacitance, we proposed the PC-HFET device design with the holes extending into the gate-drain spacing. Our simulations show that the hole extension allows for nearly the same CGD reduction as the gate metal removal over the holes. We used the obtained RON and CGD data to calculate the power loss in AlGaN/GaN PC-HFET and showed that the PC-HFET design filling factor kF = 0.25 reduces the total conversion loss in the power switch by more than a factor of 2. [1] G. Simin, M. Islam, M. Gaevski, J. Deng, R. Gaska, and M. Shur, “Low RC-constant Perforated-Channel HFET”, IEEE El. Dev. Letters, V. 35, pp.449-451, 2014 Figure 1

Quantum Mechanical Modeling and Simulation of Monolayer WSe2 Channel Field Effect Transistor

To counter the performance degradation of extremely scaled FETs due to SCEs, ultrathin body channel material with high band gap is essential [1]. In recent years, researchers have been working on Graphene and monolayer transition metal dichalcogenides like MoS2, WSe2 to find the channel material for next generation ultimately scaled transistors. Although, Graphene fulfills the condition of thin body channel and it has excellent carrier mobility, the absence of intrinsic band gap in Graphene sheet made researchers focus on dichalcogenides like MoS2. Despite of showing promise for low power application, MoS2 based transistors are less suitable for high performance operation since monolayer MoS2 has a high electron and hole effective mass and low carrier mobility [2]. In search of high mobility monolayer channel material, many other transition metal dichalcogenides are being explored [3] and as a result of that endeavor monolayer WSe2 based pFET has been fabricated [1] . This experimental device with high band gap (1.6 eV) showed higher carrier mobility (250 cm2/Vs) than monolayer MoS2 based devices. In recent literature methods of n-type and p-type doping of monolayer WSe2 FET are demonstrated [4-5], which led to fabrication of high performance CMOS inverter solely based on monolayer WSe2 channel [6]. Despite of these promising experimental results, rigorous transport and electrostatic study of monolayer WSe2 based FET is yet to appear in the literature. In this work, we have performed a quantum mechanical electrostatics and transport simulation study on monolayer WSe2 FET and calculated different performance parameters. The device structure considered in this work is the nFET version of the device fabricated by Fang et al. [1] which has a 0.7 nm thick monolayer WSe2 channel of length 9.4 μm deposited on a 270 nm thick layer of SiO2. A 17.5 nm thick layer of ZrO2 served as the top oxide of the device (Figure 1). To model the monolayer WSe2 channel FET, we used band structure and material parameters available in the literature from first principle DFT simulations of Monolayer WSe2 sheets which have been listed in table I. In this work, 1D Schrodinger-Poisson equations have been solved self-consistently along the direction perpendicular to the channel to get the C-V characteristics of the device (Figure 2). Then, ballistic transport characteristics were obtained using Launder-Buttiker formulation. Figure 3 and 4 show the Id-Vds and transfer characteristics of the device respectively. The threshold voltage of the device was extracted as 1.1 V (Figure 5). The subthreshold slope was calculated to be 60.913 mV/dec (Figure 6), which is remarkably near to the theoretical lower limit of 60mv/dec. Table II lists some of the performance parameters obtained from the transport simulation. The parameters indicates that monolayer WSe2 FET has a very high on-off current ratio (~108), which makes it suitable for low power applications. The threshold voltage is found to be 1.1V for this undoped monolayer WSe2 channel which can be tuned by changing doping profile and physical dimensions of the device. In this work we have a developed a simulator to study the electrostatics and quantum transport of monolayer WSe2 FET and extracted the performance parameters of that device. The developed simulator can be extended to calculate the ultimate performance limit and study the effects of different physical parameter variation on the performance of the device.

First-principles prediction on silicene-based heterobilayers as a promising candidate for FET

The structural and electronic properties of silicene/silicane and silicene/germanene heterobilayers (HBLs) are investigated by using first-principles methods. The results show that the silicene interacts overall with silicane (germanene) with a binding energy of −50∼−70 meV per Si (Ge) atom, suggesting a weakly van der Waals interaction between silicene and substrate. A relative large bandgap with a linear band dispersion of HBLs is opened due to the sublattice symmetry broken by the intrinsic interface dipole between silicene and substrate. Remarkably, the band gap of all these HBLs can also be continually tuned modulated by adjusting the interlayer spacing and strain, independent on the stacking arrangements. Silicene is thus expected to be useful for building high-performance FET channel, which would extend its applicability to possible future nanoelectronics.

Diamond Based Field‐Effect Transistors of Zr Gate with SiNx Dielectric Layers

Investigation of Zr‐gate diamond field‐effect transistor with SiNx dielectric layers (SD‐FET) has been carried out. SD‐FET works in normally on depletion mode with p‐type channel, whose sheet carrier density and hole mobility are evaluated to be 2.17 × 1013 cm−2 and 24.4 cm2·V−1·s−1, respectively. The output and transfer properties indicate the preservation of conduction channel because of the SiNx dielectric layer, which may be explained by the interface bond of C‐N. High voltage up to −200 V is applied to the device, and no breakdown is observed. For comparison, another traditional surface channel FET (SC‐FET) is also fabricated.

Effect of reference electrode in the nanoFET (field‐effect transistor)‐based biosensor experiment

The reference electrode in an electrolyte solution affects the surface potential of the nanoFET (field-effect transistor) channel which can result in a false signal to be measured in the FET channel during bio- and chemical sensing experiments. In this reported work, it was demonstrated that different sensing results that were obtained were affected by the choice of the reference electrode through a pH and ion concentration sensing experiment. Three types of reference electrodes were compared: the SCE (saturated calomel reference electrode), the Ag/AgCl tube and the integrated Ag/AgCl electrode. The pH sensitivity equivalent to the surface potential was evaluated: 32.3, 34.6 and 16.3 mV/pH in the case of the SCE, the refillable tube type Ag/AgCl and the integrated Ag/AgCl, respectively.

THz Detector with an Antenna Coupled Stacked CMOS Plasma-Wave FET

We present an antenna coupled non-resonant plasma-wave CMOS detector operating at 502 GHz, with a PMOS load and NMOS stacked structure. The gates of the NMOS plasma wave FETs, which are located in the middle of the stack, in a differential structure, are connected to the voltage- maximum points of a patch antenna. It was found that the high-input impedance of the detector causes high responsivity as the loaded Q of the antenna is enhanced and because the resultant high-voltage swing at the input allows the detector to have high responsivity. High input impedance can be achieved via using the stacked structure in conjunction with a small input transistor and the sub-threshold bias. The responsivity of stacked structure was also affected by source-drain voltage in the plasma-wave FET and active load resistor by PMOS. Therefore, it was found that the responsivity is closely related to the V ds × I ds × rl oad * product of the stacked structure, where I ds is the bias current, V ds is the voltage across the input NMOS plasma-wave FET and r load * is the small signal resistance of the PMOS load parallel with plasma -wave FET channel resistance. The detector shows the higher response than a cold-FET detector by one order of magnitude.

Piezoelectric coupling in a field-effect transistor with a nanohybrid channel of ZnO nanorods grown vertically on graphene.

Piezoelectric coupling phenomena in a graphene field-effect transistor (GFET) with a nano-hybrid channel of chemical-vapor-deposited Gr (CVD Gr) and vertically aligned ZnO nanorods (NRs) under mechanical pressurization were investigated. Transfer characteristics of the hybrid channel GFET clearly indicated that the piezoelectric effect of ZnO NRs under static or dynamic pressure modulated the channel conductivity (σ) and caused a positive shift of 0.25% per kPa in the Dirac point. However, the GFET without ZnO NRs showed no change in either σ or the Dirac point. Analysis of the Dirac point shifts indicated transfer of electrons from the CVD Gr to ZnO NRs due to modulation of their interfacial barrier height under pressure. High responsiveness of the hybrid channel device with fast response and recovery times was evident in the time-dependent behavior at a small gate bias. In addition, the hybrid channel FET could be gated by mechanical pressurization only. Therefore, a piezoelectric-coupled hybrid channel GFET can be used as a pressure-sensing device with low power consumption and a fast response time. Hybridization of piezoelectric 1D nanomaterials with a 2D semiconducting channel in FETs enables a new design for future nanodevices.

Silicane as an Inert Substrate of Silicene: A Promising Candidate for FET

Opening up a band gap without lowering high carrier mobility and finding a suitable substrate material are a challenge for designing silicon-based nanodevices. Using density functional theory calculations incorporating vdW corrections, we find that the semiconducting silicane monolayer is free of dangling bonds, providing an ideal substrate for silicene to sit on. The nearly linear band dispersion character of silicene with a sizable band gap (44–61 meV) opening is obtained in all heterobilayers (HBLs). We also find that the effective masses of electrons and holes near the Dirac point (ranging from 0.033 to 0.045m0) are very small in HBLs, and thus high carrier mobility (105cm2 V–1 s–1) of silicene is expected. These characteristics of HBLs can be flexibly modulated by applying bias voltage or strain, suitable for the high-performance FET channel operating at room temperature.

Possibility and design of resonant terahertz emitters based on nanoscale strained silicon plasma wave transistors with enhanced mobility

In this paper, we report the possibility of silicon (Si) plasma wave transistor (PWT) as a resonant terahertz (THz) emitter based on the theoretical analysis focusing on the strained Si with enhanced mobility. Under asymmetric boundary conditions for plasma wave instability, the amplitude of plasma wave in FET channel increases and this plasma wave increment provides the basis of the electromagnetic (EM) wave emission from FET. Because this instability is controlled by manipulation of plasma wave velocity (s) and electron drift velocity (0), we propose the design window based on s–0 plot which determines whether the device operates as the resonant THz emitters considering all the required physical conditions. It is expected from the proposed design window that strained Si PWT down to 10 nm gate length with enhanced channel mobility of 500 cm2·V−1·s−1 can operate as a resonant emitter in THz frequency range.

Mono- and Bilayer WS2 Light-Emitting Transistors

We have realized ambipolar ionic liquid gated field-effect transistors based on WS2 mono- and bilayers, and investigated their opto-electronic response. A thorough characterization of the transport properties demonstrates the high quality of these devices for both electron and hole accumulation, which enables the quantitative determination of the band gap (Δ1L = 2.14 eV for monolayers and Δ2L = 1.82 eV for bilayers). It also enables the operation of the transistors in the ambipolar injection regime with electrons and holes injected simultaneously at the two opposite contacts of the devices in which we observe light emission from the FET channel. A quantitative analysis of the spectral properties of the emitted light, together with a comparison with the band gap values obtained from transport, show the internal consistency of our results and allow a quantitative estimate of the excitonic binding energies to be made. Our results demonstrate the power of ionic liquid gating in combination with nanoelectronic systems, as well as the compatibility of this technique with optical measurements on semiconducting transition metal dichalcogenides. These findings further open the way to the investigation of the optical properties of these systems in a carrier density range much broader than that explored until now.

Strain scaling for CMOS

Abstract

Developments of SiC DioMOS (Diode Integrated SiC MOSFET)

ABSTRACTSiC power devices can handle large power and high frequency switching beyond the Si power devices. Typical full-SiC power modules are composed of both SiC-MOSFETs and SiC-SBDs to suppress the degradation of Ron of SiC-MOSFET during the bipolar reverse-current flow while there will be unfavorable consequences such as increased material cost, larger area, and larger wiring inductances. Panasonic has proposed the SiC-DioMOS which successfully integrates the unipolar reverse diode without any increase of chip size from the original DIMOS transistor. The SiC-DioMOS utilizes the highly-doped n-type epitaxial channel under the MOS gate for the FET channel and also for the reverse conduction path of the diode. Thickness and concentration of the highly-doped n-typed channel are carefully designed to achieve reasonable Vth of the MOSFET and Vf0 barrier constituting the diode current. The MOSFET and also the MOS-channel diode completely operate under unipolar mode. The SiC-DioMOS with BVds=1700V, Ron=20mΩ、Vth=4.5V, Vf0=0.8V is successively fabricated using the state-of-the-art epitaxial-growth technique. Fast switching of tr=58ns and tf=13ns is confirmed. The SiC-DioMOS meets practical standards for safety operation of high-power fast switching without SiC-SBD.

Bilayer Graphene Application on NO2 Sensor Modelling

Graphene is one of the carbon allotropes which is a single atom thin layer with sp2 hybridized and two‐dimensional (2D) honeycomb structure of carbon. As an outstanding material exhibiting unique mechanical, electrical, and chemical characteristics including high strength, high conductivity, and high surface area, graphene has earned a remarkable position in today’s experimental and theoretical studies as well as industrial applications. One such application incorporates the idea of using graphene to achieve accuracy and higher speed in detection devices utilized in cases where gas sensing is required. Although there are plenty of experimental studies in this field, the lack of analytical models is felt deeply. To start with modelling, the field effect transistor‐ (FET‐) based structure has been chosen to serve as the platform and bilayer graphene density of state variation effect by NO2 injection has been discussed. The chemical reaction between graphene and gas creates new carriers in graphene which cause density changes and eventually cause changes in the carrier velocity. In the presence of NO2 gas, electrons are donated to the FET channel which is employed as a sensing mechanism. In order to evaluate the accuracy of the proposed models, the results obtained are compared with the existing experimental data and acceptable agreement is reported.

Graphene Channel Liquid Container Field Effect Transistor as pH Sensor

Graphene channel liquid container field effect transistor pH sensor with interdigital microtrench for liquid ion testing is presented. Growth morphology and pH sensing property of continuous few‐layer graphene (FLG) and quasi‐continuous monolayer graphene (MG) channels are compared. The experiment results show that the source‐to‐drain current of the graphene channel FET has a significant and fast response after adsorption of the measured molecule and ion at the room temperature; at the same time, the FLG response time is less than 4 s. The resolution of MG (0.01) on pH value is one order of magnitude higher than that of FLG (0.1). The reason is that with fewer defects, the MG is more likely to adsorb measured molecule and ion, and the molecules and ions can make the transport property change. The output sensitivities of MG are from 34.5% to 57.4% when the pH value is between 7 and 8, while sensitivity of FLG is 4.75% when the pH = 7. The sensor fabrication combines traditional silicon technique and flexible electronic technology and provides an easy way to develop graphene‐based electrolyte gas sensor or even biological sensors.

Modeling Terahertz Plasmonic Si FETs With SPICE

As operating frequencies of Si FETs continue to grow, commercial circuit modeling tools must provide accurate simulations at very high frequencies with the ability to model plasmonic FETs in large and complex circuits. Traditional compact SPICE models used by commercial CAD tools model the channel resistance and capacitance and gate resistance as single lumped elements or use approximations to model the distributed nature of the FET channel. At high frequencies, these models become inaccurate and fail to model device physics properly. To describe plasmonic FETs, a THz SPICE model is developed for Si FETs. The THz SPICE model is validated experimentally to be in close agreement with measured results. The model is used to show predicted device response at different technology nodes.

Carrier Motion Effect on Bilayer Graphene Nanoribbon Base Biosensor Model

Graphene nanoribbon (GNR) because of its unique electrical properties has been employed in many applications, such as batteries, energy storage devices and biosensors. In this paper modelling of bilayer graphene nanoribbon (BGNR) sensor is in our focus. Based on the presented model BGNR quantum capacitance variation effect by the PSA injected electrons in to the FET channel as a sensing mechanism is considered. Also carrier movement in BGNR as another modelling parameter is suggested. In this paper prostate specific antigen (PSA) adsorption and local pH value by injected carriers on the surface of bilayer BGNR is modelled. Carrier concentration as a function of control parameters (f, p) is predicted. Finally comparison study are illustrated which indicates good agreement between proposed model and experimental data. We are concluded that the current variation on the biosensor is controlled by PSA concentration and local pH values.

Bilayer Graphene Nanoribbon Mobility Model in Ballistic Transport Limit

Bilayer graphene nanoribbon (BGN) with tunable band gap which can be controlled by an external electric field is focused in our study. AB-stacked system with a stable structure is considered in a FET channel. Based on the assumed structure carrier density effect on charge mobility has been reported at different temperatures. Carrier mobility model is explained based on quantum confinement effect which indicates that carriers behave like traveling wave only in channel direction. Their behavior in other two directions can be approximated by standing wave as well. We prove that carrier mobility in BGNs is a function of temperature and carrier density which illustrate good agreement with experimental data.

Dynamic Infrared Electro-optic Response of Soluble Organic Semiconductors in Thin Film Transistors

ABSTRACTWe use a frequency-dependent electro-optic technique to measure the hole mobility in small molecule organic semiconductors, such as 6,13 bis(triisopropylsilylethynyl)-pentacene. Measurements are made on semiconductor films in bottom gate, bottom contact field-effect transistors (FETs.) Because of the buried metal layer effect the maximum response, due to absorption in the charge layer, will be for a dielectric film ∼ 1/4 of a wavelength (in the dielectric) (e.g. ∼ 1 micron thick in the infrared.) Results are presented for FETs prepared with both spin-cast polymer and alumina dielectrics prepared by atomic layer deposition. At low frequencies the results are fit to solutions to a non-linear differential equation describing the spatial dependence of flowing charge in the FET channel, which allows us to study multiple crystals forming across one set of drain-source contacts. FETs prepared on alumina dielectrics show interesting deviations from the model at high frequencies, possibly due to increased contact impedance.

Modeling of Vibrating-Body Field-Effect Transistors Based on the Electromechanical Interactions Between the Gate and the Channel

A coupled analysis method for the mechanical and electrical systems of vibrating-body field-effect transistors (VB-FETs) is described. To accommodate energy transfer between the gate and the FET channel, we represent the FET with a resistance–capacitance ladder circuit and use the Lagrange function to derive motion equations. By solving the equations, we derive the typical electrical characteristics of VB-FETs, namely, the transconductance and the current gain. The results show that the current gain is obtained even above the cutoff frequency of the FET at the antiresonance frequency of the mechanical vibrator. These characteristics strongly depend on the device dimensions and operating conditions. This means that a coupled analysis is helpful for determining an appropriate design of VB-FETs.

Virtual-Source-Based Self-Consistent Current and Charge FET Models: From Ballistic to Drift-Diffusion Velocity-Saturation Operation

A simple analytical FET channel charge partitioning model valid under ballistic and quasi-ballistic transport conditions is developed. With this model, the virtual-source (VS) based charge-based transport compact model is extended to include self-consistent analytical channel charge partitioning models for quasi- and fully-ballistic conditions, with continuous current and charges and their derivatives. Drift-diffusion with or without velocity-saturation transport conditions are also comprehended with adaptations of existing-literature models, and the resulting terminal charges and capacitances are compared with those assuming ballistic operation. With only a limited number of physically meaningful parameters, the extended VS compact model forms an ideal platform for the exploration of the dynamic behavior of current and future FET devices. The simple model is validated here by comparison with experimental data from a well-characterized industry 45-nm metal/high-k complementary metal-oxide-semiconductor including parasitic elements using a Verilog-A implementation to simulate ring oscillators. It is also validated by comparison with S-parameter-derived capacitances of near-ballistic III-V high-electron mobility transistors. In both cases, the effects of different assumed transport conditions on the dynamic device behavior are explored.