Ferroelectric Semiconductor Field Effect Transistor Research Articles

Large-Area Growth of Ferroelectric 2D γ-In2 Se3 Semiconductor by Spray Pyrolysis for Next-Generation Memory.

In2 Se3 , 2D ferroelectric-semiconductor, is a promising candidate for next-generation memory device because of its outstanding electrical properties. However, the large-area manufacturing of In2 Se3 is still a big challenge. In this work, spray pyrolysis technique is introduced for the growth of large-area In2 Se3 thin film. A polycrystalline γ-In2 Se3 layer can be grown on 15cm × 15cm glasss at the substrate temperature of 275°C. The In2 Se3 ferroelectric-semiconductor field effect transistor (FeS-FET) on glass substrate demonstrates a large hysteresis window of 40.3V at the ±40V of gate voltage sweep and excellent uniformity. The FeS-FET exhibits an electron field effect mobility of 0.97 cm2 V-1 s-1 and an on/off current ratio of >107 in the transfer curves. The memory behavior of the large-area, In2 Se3 FeS-FETs for next-generation memory is demonstrated.

Multilevel nonvolatile photomemory with long-term robust optical retention based on photoinduced depolarization

Ferroelectric memory is promising for implementing emerging information technologies, including digital storage and analog computing. Two-dimensional (2D) ferroelectric materials retain robust room-temperature ferroelectric characteristics at the single-layer limit, surpassing traditional ferroelectric materials. This characteristic enables further advancements in device miniaturization to meet the growing demand. Herein, we manufactured a metal–insulator–ferroelectric–semiconductor field-effect transistor (MIFSFET) using a 2D ferroelectric material (α-In2Se3), which displayed nonvolatile characteristics. Based on the mechanism of photoinduced depolarization in a ferroelectric semiconductor, the MIFSFET device can be used as a photomemory, capable of storing an optical image for up to 1000 s with minimal information loss and can achieve a multistate photoresponse induced by an optical pulse. Moreover, it can function as a ferroelectric memory, with an on/off ratio exceeding 106, endurance of above 3000 cycles, and stable retention. The proposed MIFSFET demonstrated excellent optical image sensing and memory functions, presenting a feasible approach for developing efficient visual systems in the future.

Low-temperature processed beta-phase In2Se3 ferroelectric semiconductor thin film transistors

As scaling becomes increasingly difficult, there is growing interest in vertical or three-dimensional stacking of transistors and especially memory. Ferroelectric semiconductor field effect transistors can be key enablers to improve energy efficiency and overall chip and memory performance. In this work, low-temperature processed, back-end-of-the-line compatible transistors were demonstrated by depositing a layered chalcogenide ferroelectric semiconductor, beta-phase In2Se3, at temperature as low as 400 °C. Top gate n-channel In2Se3 thin film transistors were fabricated with field-effect mobility ∼1 cm2 V−1 s−1, and simple polarization switching based memory results are presented.

Tunable optoelectronic properties of a two-dimensional graphene/α-In2Se3/graphene-based ferroelectric semiconductor field-effect transistor

Two-dimensional (2D) materials are promising for future electronic and optoelectronic devices. In particular, 2D material-based photodetectors have been widely studied because of their excellent photodetection performance. Owing to its excellent electrical and optical characteristics, 2D indium selenide (α-In2Se3) is a good candidate for photodetection applications. In addition, α-In2Se3 samples, including atom-thick α-In2Se3 layers, present ferroelectric properties. Herein, we report the fabrication and electrical and optoelectronic properties of multilayered graphene (Gr)/α-In2Se3/Gr-based ferroelectric semiconductor field-effect transistors (FeS-FETs). Furthermore, we discuss the physical mechanisms affecting electronic and optoelectronic transport in the Gr/α-In2Se3/Gr heterostructure. Large hysteresis was observed in the transfer characteristic curves and it was attributed to the ferroelectric polarization of MTL α-In2Se3 and carrier trapping–detrapping effects. The optoelectronic performance of the fabricated FeS-FETs depended on the ferroelectric properties of α-In2Se3 and can be easily tuned to achieve the maximum photoresponsivity and specific detectivity of 10 AW−1 and 4.4 × 1012 cmHz1/2 W−1, respectively.

Ferroelectric field effect transistors: Progress and perspective

Ferroelectric field effect transistors (FeFETs) have attracted attention as next-generation devices as they can serve as a synaptic device for neuromorphic implementation and a one-transistor (1T) for achieving high integration. Since the discovery of hafnium–zirconium oxide (HZO) with high ferroelectricity (even at a thickness of several nanometers) that can be fabricated by a complementary metal–oxide–semiconductor-compatible process, FeFETs have emerged as devices with great potential. In this article, the basic principles of the FeFET and the design strategies for state-of-the-art FeFETs will be discussed. FeFETs using Pb(ZrxTi1−x)O3, polyvinylidene fluoride, HZO, and two-dimensional materials are emphasized. FeFETs, ferroelectric semiconductor field effect transistors, and metal–ferroelectric–insulator–semiconductor structures to which those materials can be applied are introduced, and their exotic performances are investigated. Finally, the limitations of these devices’ current performance and the potential of these materials are presented.

Exploring Ferroelectric Switching in α‐In2Se3 for Neuromorphic Computing

AbstractRecently, 2D ferroelectrics have attracted extensive interest as a competitive platform for implementing future generation functional electronics, including digital memory and brain‐inspired computing circuits. Fulfilling their potential requires achieving the interplay between ferroelectricity and electronic characteristics on the device operation level, which is currently lacking since most studies are focused on the verification of ferroelectricity from different 2D materials. Here, by leveraging the ferroelectricity and semiconducting properties of α‐In2Se3, ferroelectric semiconductor field‐effect transistors (FeSFETs) are fabricated and their potential as artificial synapses is demonstrated. Multiple conductance states can be induced in α‐In2Se3‐based FeSFETs by controlling the out‐of‐plane polarization, which enables the device to faithfully mimic biosynaptic behaviors. In comparison with charge‐trapping‐based three‐terminal synaptic devices, the electronic synapses based on α‐In2Se3 have the advantages of good controllability, fast learning, and easy integration of gate dielectric, rendering them promising for neuromorphic computing. In addition, an abnormal resistive switching phenomenon in α‐In2Se3 is reported when operated in the in‐plane ferroelectric switching mode. The findings pave the way forward for α‐In2Se3‐based FeSFETs for developing neuromorphic devices in brain‐inspired intelligent systems.

Electric field induced metallic behavior in thin crystals of ferroelectric α -In2Se3

Ferroelectric semiconductor field effect transistors (FeSmFETs), which employ ferroelectric semiconducting thin crystals of α-In2Se3 as the channel material as opposed to the gate dielectric in conventional ferroelectric FETs (FeFETs), were prepared and measured from room to liquid-helium temperatures. These FeSmFETs were found to yield evidence for the reorientation of electrical polarization and an electric field-induced metallic state in α-In2Se3. Our findings suggest that FeSmFETs can serve as a platform for the fundamental study of ferroelectric metals as well as the exploration of potential applications of semiconducting ferroelectrics.

(Invited) 2D NC-FET, FE-FET and FeS-FET

The so-called Boltzmann Tyranny defines the fundamental thermionic limit of the subthreshold slope (SS) of a metal-oxide-semiconductor field-effect transistor (MOSFET) at 60 mV/dec at room temperature and, therefore, precludes the lowering of the supply voltage and the overall power consumption. Adding a ferroelectric dielectric as a negative capacitor to the gate stack of a MOSFET may offer a promising solution to bypassing this fundamental barrier. Meanwhile, two-dimensional (2D) semiconductors, such as atomically thin transition metal dichalcogenides (TMDs) due to their low dielectric constant, and ease of integration in a junctionless transistor topology, offer enhanced electrostatic control of the channel. In this talk, we will review the recent progress on negative capacitance field-effect transistors (NC-FET) and ferroelectric field-effect transistors (Fe-FET) using TMDs as the transistor channels. [1,2] More importantly, a new device concept, which we call as ferroelectric semiconductor field-effect transistor (FeS-FET), was proposed and experimentally demonstrated. [3] In this novel FeS-FET, a 2D ferroelectric semiconductor α-In2Se3 is used to replace conventional semiconductor as channel. α-In2Se3 is identified due to its proper bandgap, room temperature ferroelectricity, the ability to maintain ferroelectricity down to a few atomic layers and the feasibility for large-area growth.[1] M. Si et al. Nature Nanotechnology 13, 24-28 (2018).[2] M. Si et al. 2017 IEDM, pp. 573-576 (2017).[3] M. Si et al. Nature Electronics 2, in press (2019).

A ferroelectric semiconductor field-effect transistor

Ferroelectric field-effect transistors employ a ferroelectric material as a gate insulator, the polarization state of which can be detected using the channel conductance of the device. As a result, the devices are of potential to use in non-volatile memory technology, but suffer from short retention times, which limits their wider application. Here we report a ferroelectric semiconductor field-effect transistor in which a two-dimensional ferroelectric semiconductor, indium selenide ({\alpha}-In2Se3), is used as the channel material in the device. {\alpha}-In2Se3 was chosen due to its appropriate bandgap, room temperature ferroelectricity, ability to maintain ferroelectricity down to a few atomic layers, and potential for large-area growth. A passivation method based on the atomic-layer deposition of aluminum oxide (Al2O3) was developed to protect and enhance the performance of the transistors. With 15-nm-thick hafnium oxide (HfO2) as a scaled gate dielectric, the resulting devices offer high performance with a large memory window, a high on/off ratio of over 108, a maximum on-current of 862 {\mu}A {\mu}m-1, and a low supply voltage.

(Invited) A Ferroelectric Semiconductor Field-Effect Transistor

A ferroelectric semiconductor field-effect transistor (FeS-FET) is proposed and experimentally demonstrated. In this novel FeS-FET, a 2D ferroelectric semiconductor α-In2Se3 is used to replace conventional semiconductor as channel. α-In2Se3 is identified due to its proper bandgap, room temperature ferroelectricity, the ability to maintain ferroelectricity down to a few atomic layers and the feasibility for large-area growth. An ALD Al2O3 passivation method was developed to protect and enhance the performance of the α-In2Se3 FeS-FETs. The fabricated FeS-FETs exhibit high performance with a large memory window, a high on/off ratio over 108, maximum on-current of 671 μA/μm, high electron mobility with μFE= 311.8 cm2/V∙s in forward sweep and μFE= 488.1 cm2/V∙s in reverse sweep, and the potential to exceed the existing Fe-FETs for non-volatile memory applications. In the FeS-FET, a ferroelectric semiconductor is employed as the channel material while the gate insulator is dielectric. The two non-volatile polarization states in FeS-FETs exist in the ferroelectric semiconductor. Therefore, a high quality amorphous gate insulator can be used instead of the common crystallized ferroelectric insulator. Meanwhile, the mobile charges in the semiconductor may screen the depolarization field across the semiconductor. Thus, the charge trapping and leakage current through FE insulator in conventional Fe-FETs can potentially be eliminated. As a result, it may improve provide potential performance improvement over the conventional Fe-FETs for non-volatile memory applications. α-In2Se3 is a recently discovered 2D ferroelectric semiconductor, which is employed in this work to demonstrate the FeS-FET. α-In2Se3 bulk crystals were grown by melt method with a layered non-centrosymmetric rhombohedral R3m structure. Photoluminescence (PL) confirms the semiconducting properties of α-In2Se3 in this work with a bandgap of ~1.39 eV. Piezoresponse force microscopy (PFM) is used to characterize the ferroelectricity in α-In2Se3. PFM phase and PFM amplitude versus voltage hysteresis loop show clear ferroelectric polarization reversal under external electric field. The PL measurement of bandgap and PFM measurement of polarization reversal together confirm the α-In2Se3 used in this work is a ferroelectric semiconductor. As mobile charges exist in a semiconductor, such charges may screen and prevent the electric field to penetrate into the body of the semiconductor, so that the ferroelectric polarization switching may be different in a metal-oxide-semiconductor (MOS) structure. Therefore, it is important to test whether the polarization in α-In2Se3 can be switched by an external electric field in a MOS structure. PFM phase and PFM amplitude versus voltage hysteresis loop of Al2O3/α-In2Se3 on Ni/SiO2/Si structure are measured. The ferroelectric hysteresis loop suggests that α-In­Se3 has switchable polarization in a MOS device structure. Thus, it is viable to applied α-In2Se3 as the channel of a FeS-FET. α-In2Se3 FeS-FETs are experimentally demonstrated. The electrical performance of the α-In2Se3 FeS-FET is systematically measured. The transfer curve shows clear clockwise hysteresis loop, as expected. A high on/off ratio over 108 at VDS=1 V is also achieved, suggesting a high-quality oxide/semiconductor interface. The large memory window and high on/off ratio suggest the α-In2Se3 FeS-FET is a competitive device concept for non-volatile memory applications. A maximum drain current of 671 μA/μm is achieved. Considering the long channel length (Lch=1 μm) used here, the α-In2Se3 FeS-FETs can have higher on-current at shorter channel length and is potential for high speed applications. The field-effect mobility (μFE) is calculated using maximum gm in forward sweep to be 311.8 cm2/V·s and in reverse sweep to be 488.1 cm2/V·s. The performance of the α-In2Se3 FeS-FETs are significantly improved by the 10 nm Al2O3 ALD passivation, comparing to the unpassivated devices (μFE=19.3 cm2/V·s in forward sweep and μFE=68.1 cm2/V·s in reverse sweep).

Implementation of low‐power, non‐volatile latch utilising ferroelectric transistor

The implementation of a non-volatile latch circuit developed with a metal–ferroelectric–semiconductor field-effect transistor is presented. The circuit contains two inverter stages in order to create and rectify the desired waveform. The hysteresis properties of the ferroelectric transistor allow it to retain a polarisation state after an applied voltage at the gate is removed. This circuit has reduced power requirements because a constant power supply is not needed at all times; instead, a voltage is only needed at the gate of the ferroelectric transistor when storing a value, and the other components only need a power supply when reading the stored value from the circuit. The circuit is less complex than similar non-volatile latches because only a single ferroelectric transistor is used and fewer overall transistors may be used. It also has the advantage of being radiation-hardened for space applications.

Transfer characteristics in a GaN MFSFET: comparison with a conventional GaN MOSFET

Based on the Miller model, we develop an analytical model for the GaN-based metal–ferroelectric–semiconductor field-effect transistors (MFSFETs). In this article, we investigate the effects of ferroelectric film on the maximum drain current, transconductance and memory window of GaN MFSFET at the different hierarchical thickness values of 10, 30, 50, 100, 200 and 300 nm, as well as the polarisation influence. The results indicate that the thickness of ferroelectric film is one of the critical parameters, and certain trade-off should be made for various potential applications. Moreover, the advantages of GaN MFSFET are also investigated in detail, compared with the conventional GaN metal–oxide–semiconductor field-effect transistor under the conditions of similar design. Our results of simulation shows that GaN MFSFETs hold the numerous advantages in electrical characteristics, such as the maximal drain current reaching 69 mA, and the threshold voltage and the subthreshold slope as low as 1.5 V and 58 mV/decade, respectively. In general, these theoretical predictions not only indicate that GaN MFSFET devices have wide applicational perspectives, but also they provide some important references to the empirical research and the design of new electron devices in the future.

Fabrication and Electrical Characteristics of Metal–Ferroelectric–Semiconductor Field Effect Transistor Based on Poly(vinylidene fluoride)

We fabricated the metal–ferroelectric–semiconductor field effect transistor (MFSFET) using poly(vinylidene fluoride) (PVDF) thin film as a ferroelectric layer. PVDF thin films were prepared by spin-coating PVDF solutions of 2–6 wt % on Si(100) wafers with source and drain diffusion regions. The drain current–gate voltage (ID–VG) characteristics of MFSFET exhibited ferroelectric hysteretic curves inducing a counterclockwise loop similar to that of other ferroelectric materials. It seems that the deposited PVDF films were crystallized with the ferroelectric β phase. The memory window widths of the MFSFET were more than 1.0 V. The drain current–drain voltage (ID–VD) characteristics show that the MFSFET operates with the PVDF thin film used as a gate dielectric material. The MFSFET using PVDF as ferroelectric layer has promising potential for use in low-voltage operable one-transistor (1T)-type ferroelectric random access memories (FeRAMs) using organic material.

Simulation of current-voltage characteristics of a ferroelectric field-effect transistor

Current-voltage (I-V) characteristics of an all-perovskite ferroelectric-semiconductor field-effect transistor (FET) were simulated. The modeling is based on an analysis of an experimental hysteresis loop of a metal-ferroelectric-metal structure. The charge in the semiconductor, electric fields in the semiconductor and ferroelectric (FE), and FE polarization at the FE-semiconductor interface are calculated at a given semiconductor surface potential. The Poisson equation is solved numerically across the FE thickness. The semiconductor surface potential, semiconductor charge, FE polarization, electric field and voltage drop in the FE are calculated as functions of the applied voltage. By using appropriate semiconductor thickness and built-in voltage between the FE and the gate, it is possible to provide a remanent polarization necessary for the opening and blocking of the FET channel in the ascending and descending portions of the hysteresis loop, respectively. The I-V characteristics and the voltage drop along the FET channel are calculated and analyzed for both polarities of the drain bias. The results make it possible to predict I-V characteristics of an all-perovskite ferroelectric FET.

Ferroelectric-gate field effect transistors using Nd 2Ti 2O 7/Y 2O 3/Si structures

Ferroelectric field effect devices offer the possibility of non-volatile active memory elements. In the metal–ferroelectric–semiconductor field effect transistor, it is important for a ferroelectric material to have a low dielectric constant to enable the application of sufficient electric field to a ferroelectric film. In this work, we report the fabrication and characterization of a ferroelectric-gate field effect transistor using Nd 2Ti 2O 7(NTO)/Y 2O 3/Si structures. The crystalline property of the film as a function of annealing temperature was characterized by X-ray diffraction. C– V characteristics were measured to investigate the ferroelectric memory effects at 1 MHz with a bias sweep rate of 0.18 V/s. As a result, the memory windows were in the range of 0.98–3.31 V when the applied voltage varied from 3 to 9 V. Specifically, we confirmed the ferroelectricity of crystallized NTO films.

Characteristics of LiNbO3 memory capacitors fabricated using a low thermal budget process

We investigated LiNbO3 metal ferroelectric semiconductor (MFS) capacitors because of the following advantages: a low interface trap density, a low interaction with Si substrate, and a large remanent polarization. Ferroelectric LiNbO3 thin films were grown directly on p-type Si(100) substrates for metal ferroelectric semiconductor field effect transistor (MFSFET) applications. Low temperature film growth and post rapid thermal anneal (RTA) treatments improved the leakage current of films while keeping other properties almost the same as high substrate temperature grown samples. We reduced the leakage current density of LiNbO3 films from 10−5 A/cm2 to 10−7 A/cm2 with RTA treatment. LiNbO3 MFS capacitors exhibited a breakdown electric field of greater than 500 kV/cm. RTA treatment above 600°C converted LiNbO3 films from amorphous to polycrystalline states with (012), (015), (022), and (023) planes. The polycrystalline LiNbO3 MFS capacitors illustrated the ferroelectric switching characteristics with a memory window ranging from 0.6 to 1.9 V. We obtained a remanent polarization of 2.74 μC/cm2 and a coercive field of 170 kV/cm using the LiNbO3 MFS capacitors.

Processing and characterization of LiNbO3 thin film for metal Ferroelectric Semiconductor field effect transistor (MFSFET) application

LiNbO3 thin films were deposited on P-Si(111) substrates. C-axis (006) oriented films were fabricated with RF magnetron sputtering and (012) oriented films were achieved by metal organic decomposition (MOD). High frequency C-V measurement showed a clockwise rotation hysteresis curve, which corresponded to the ferroelectric switching. A polarization vs. voltage hysteresis curve of a Metal-Ferroelectric-Semiconductor (MFS) capacitor was measured with a modified Sawyer-Tower circuit. Remnant polarization as high as 65μC/cm2 was found from sputtering deposited sample.

Ferroelectric properties of c-oriented YMnO3 films deposited on Si substrates

We have proposed the use of RMnO3 (R: rare earth elements) films for metal–ferroelectric–semiconductor field effect transistor (MFSFET)-type ferroelectric random access memories (ferroelectric RAMs). This reports the production of YMnO3 films on Si substrates for MFSFET with confirmation of the distinct ferroelectricity by P–E hysteresis and capacitance–voltage (C–V) measurement. (0001)-oriented YMnO3 films were obtained on a (111)Si substrate using a pulsed-laser deposition method. Although the Pt/YMnO3/Si structure exhibits a very small remnant polarization of 1.2 nC/cm2, it has clear ferroelectric polarization switching type C–V characteristics with a memory window of 1.1 V. The dielectric constant and the dissipation factor were 27.8 and 0.035, respectively. The polarization switching characteristics are discussed.

Strontium Bismuth Tantalate Based Ferroelectric Gate Field Effect Transistor with Yttrium Oxide as the Buffer Layer

ABSTRACTWe report the first demonstration of an enhancement mode n-channel metal -ferroelectric-semiconductor field effect transistor (MFISFET) realized directly on silicon with yttrium oxide as the buffer layer. The capacitance-voltage (C-V) characteristics of Metal Ferroelectric Insulator Silicon (MFIS) structures show hysteresis and the direction of hysteresis corresponds to ferroelectric polarization. The memory window in the C-V characteristics was 2V for an applied voltage of ± 10V. The memory window did not show significant change due to decrease in rate of change of sweep voltage and temperature. The transmission electron microscopy (TEM) analysis confirms the formation of an amorphous oxide layer between silicon and yttrium oxide buffer layer.

Pt/PZT/n-SrTiO3 Ferroelectric Memory Diode

We fabricated a new nonvolatile ferroelectric memory, which consists of vertical metal-ferroelectric- semiconductor diodes. Our diode has a simpler structure than an Ferroelectric Random Access Memory (FRAM) cell, and operates at a lower voltage than Metal Ferroelectric Semiconductor Field Effect Transistors (MFS-FETs) or conventional flash memories. We demonstrated the memory operation using a Pt/PZT/n- SrTiO3 diode in this work. We deposited (001)-oriented PZT on (100) 0.5 wt% Nb doped n-type SrTiO3 substrate using a laser ablation technique. The diodes had a hysteresis loop in their capacitance-voltage characteristics due to ferroelectric polarization in the PZT layer. Their current-voltage curves were Schottky-diode-like and also had a hysteresis loop due to the ferroelectric remanent polarization. We confirmed correct nonvolatile and nondestructive memory readout operation. The write voltages were -5 V to write a logic “0” and above 2.5 V to write a logic “1”. The read voltage was 0.8 V.