Faulty Paths Research Articles

Enhancing system safety in critical architectures: Augmented hypothesis testing with early design knowledge.

Hypothesis testing is a valuable method used to investigate ideas and test predictions arising from theories based on available data. In the context of critical system architecture, there is a need to effectively utilize hypothesis testing to identify faulty paths and improve system safety. This research aims to propose guidelines and best practices for presenting hypothesis testing in critical system architecture. The problem addressed in this study is the underutilization of hypothesis testing in life-critical system methods, resulting in a lack of identification of faulty paths. To address this challenge, we propose an enhanced pathway analysis technique that integrates error-derived information from a system's architectural description, thereby augmenting traditional hypothesis testing methods. By investigating various paths, we aim to identify false positive and false negative errors in life-critical system architecture. Furthermore, the proposed method is validated based on specific validation criteria for each step such as system boundary, assumption, content/architecture, and traceability validations. Also, the method is evaluated based on our claims. The results of our research highlight the significance of tracing errors in early system knowledge. By leveraging the augmented hypothesis testing method, we are able to identify hazards, safety constraints, and specific causes of unsafe actions more effectively. The findings emphasize the importance of integrating early design knowledge into hypothesis testing for enhanced hazard identification and improved system safety.

ProbD: Faulty Path Detection Based on Probability in Software-Defined Networking

With the increasing number of switches in Software-Defined Networking (SDN), there are more and more faults rising in the data plane. However, due to the existence of link redundancy and multi-path forwarding mechanisms, these problems cannot be detected in time. The current faulty path detection mechanisms have problems such as the large scale of detection and low efficiency, which is difficult to meet the requirements of efficient faulty path detection in large-scale SDN. Concerning this issue, we propose an efficient network path fault testing model ProbD based on probability detection. This model achieves a high probability of detecting arbitrary path fault in the form of small-scale random sampling. Under a certain path fault rate, ProbD obtains the curve of sample size and probability of detecting arbitrary path fault by randomly sampling network paths several times. After a small number of experiments, the ProbD model can correctly estimate the path fault rate of the network and calculate the total number of paths that need to be detected according to the different probability of detecting arbitrary path fault and the path fault rate of the network. The final experimental results show that, compared with the full path coverage test, the ProbD model based on probability detection can achieve efficient network testing with less overhead. Besides, the larger the network scale is, the more overhead will be saved.

Maintaining Constrained Path Problem for Directed Acyclic Graphs

In order to restore the faulty path in network more effectively, we propose the maintaining constrained path problem. Give a directed acyclic graph (DAG) [Formula: see text] with some faulty edges, where [Formula: see text], [Formula: see text]. For any positive number [Formula: see text], we give effective maintain algorithm for finding and maintaining the path between source vertex [Formula: see text] and destination [Formula: see text] with length at most [Formula: see text]. In this paper, we consider the parameters [Formula: see text] and [Formula: see text] which are used to measure the numbers of edges and vertices which are influenced by faulty edges, respectively. The main technique of this paper is to define and solve a subproblem called the one to set constrained path problem (OSCPP) which has not been addressed before. On the DAG, compared with the dynamic shortest path algorithm with time complexity [Formula: see text] [16] and the shortest path algorithm with time complexity [Formula: see text] [18], based on the algorithm for OSCPP, we develop a maintaining constrained path algorithm and improve the time complexity to [Formula: see text] in the case that all shortest paths from each vertex [Formula: see text] to [Formula: see text] have been given.

SIT-SE: A Specification-Based Incremental Testing Method With Symbolic Execution

Symbolic execution is a powerful technique for automating software testing to detect many types of errors such as memory errors and assertion violations. However, it encounters the problem of path explosion, and by using only assertions, it still lacks the capability of going deep into checking the functional correctness of a path based on corresponding formal specifications. To address these problems, we propose a specification-based incremental testing method with symbolic execution, called SIT-SE, providing a much more rigorous way to automatically check the functional correctness of all the discovered program paths, by introducing theorems (instead of assertions) for path correctness and branch sequence coverage algorithm for guiding a moderate path exploration. Compared with Hoare logic for proving the correctness of an entire program, a theorem in the SIT-SE is made for verifying the correctness of a program path. The proposed method carefully treats the relationship between a path condition and the specification in a theorem to restrict the monotonous path exploration, whereas traditional concolic testing methods roughly use one test data to determine the path correctness by assertions during long path searching. We use a classic case to demonstrate how the method works and conduct an experiment to evaluate the performance of both the proposed method and the commonly used well-known concolic testing tool KLEE. The experimental results show that our method SIT-SE is effective and outperforms KLEE in detecting faulty paths based on specifications.

A fault tolerant routing scheme for advanced metering infrastructure: an approach towards smart grid

The wireless sensor network is gaining significant attention because of its ubiquitous deployability nature. In general, the role of the wireless sensor network is remarkable in smart city applications for data sensing, collecting, and transmitting. Advanced metering infrastructure is an automatic system for the reading of electricity consumption by individual users. The reading of data from meters normally communicated over a wireless medium. Apart from collecting and sensing, routing is one of the major attributes in the AMI network. Successful communication is possible when the link and node are in the proper state. In this paper, we propose a fault-tolerant routing mechanism named Grid Topological Routing scheme to provide an efficient route in case of encountering a faulty path. The simulation shows better performance against the Routing Protocol for Low-Power and Lossy Networks and Ad-Hoc On-Demand Vector algorithm in terms of power consumption and packet delivery ratio. This model is explicitly designed for the smart grid in India.

Securing industrial communication with software-defined networking.

Industrial Cyber-Physical Systems (CPSs) require flexible and tolerant communication networks to overcome commonly occurring security problems and denial-of-service such as links failure and networks congestion that might be due to direct or indirect network attacks. In this work, we take advantage of Software-defined networking (SDN) as an important networking paradigm that provide real-time fault resilience since it is capable of global network visibility and programmability. We consider OpenFlow as an SDN protocol that enables interaction between the SDN controller and forwarding plane of network devices. We employ multiple machine learning algorithms to enhance the decision making in the SDN controller. Integrating machine learning with network resilience solutions can effectively address the challenge of predicting and classifying network traffic and thus, providing real-time network resilience and higher security level. The aim is to address network resilience by proposing an intelligent recommender system that recommends paths in real-time based on predicting link failures and network congestions. We use statistical data of the network such as link propagation delay, the number of packets/bytes received and transmitted by each OpenFlow switch on a specific port. Different state-of-art machine learning models has been implemented such as logistic regression, K-nearest neighbors, support vector machine, and decision tree to train these models in normal state, links failure and congestion conditions. The models are evaluated on the Mininet emulation testbed and provide accuracies ranging from around 91-99% on the test data. The machine learning model with the highest accuracy is utilized in the intelligent recommender system of the SDN controller which helps in selecting resilient paths to achieve a better security and quality-of-service in the network. This real-time recommender system helps the controller to take reactive measures to improve network resilience and security by avoiding faulty paths during path discovery and establishment.

A Novel Visual Lane Line Detection System for a NMPC-based Path Following Control Scheme

Tracking a visual path to perform image-based control requires additional processing to extract valuable information even in the presence of inconveniences, such as failures or deformation in the lane line or even restrictive environmental conditions. Dealing with faulty in the path to be followed, non-homogeneous floors and bad lighting condition are some of the difficulties encountered that compromise the accurate of feature extraction and consequently the controller effectiveness. In this paper, a novel visual system is proposed to detect and extract useful lane line parameters and to use them in a NMPC-based Visual Path Following Control Scheme. To cope with the above-mentioned problems, the visual path is approximated by a quadratic function and to robustness improve, this novel algorithm was modified to use RANSAC as a model estimation approach instead of using the classical Least Square Method. Experimental results demonstrate the superiority of the proposed system with respect to two others, in environments with visual disturbance, faulty paths, noise and bad lighting conditions.

Faulty Feeder Detection Based on Space Relative Distance for Compensated Distribution Network With IIDG Injections

To improve the accuracy of faulty feeder selection based on zero sequence current mutation, distribution networks with inverter-interfaced distributed generators (IIDGs) are analyzed in detail. It is found that the IIDGs cannot be completely equivalent to a positive sequence current source due to their boosting increments. Thereby, a more accurate IIDG current estimation model based on the Gauss-Seidel method that considers the control strategy at the moment of fault is established. Moreover, a real-time estimation algorithm is introduced for faulty feeder detection to adjust the compensation degree of the Petersen coil. On this basis, this paper proposes a novel faulty feeder detection approach using the zero-sequence current space relative distance between the increments of each feeder and an estimation of the faulty path generated by Kalman filtering (KAF). The feasibility of the proposed approach is demonstrated in both a PSCAD/EMTDC simulation and a MATLAB experimental laboratory. The test results indicate that the proposed approach can achieve a high speed when employed for different fault conditions.

A Fault-Tolerant Flow Measuring Method Based on PSO-SVM With Transit-Time Multipath Ultrasonic Gas Flowmeters

Transit-time multipath ultrasonic flow meters (TM-UFMs) have been widely employed for measuring flowrate of gas and liquid. However, its applicability is still dragged by the difficulties to describe the physical model by precise mathematical expressions and to reduce the deviations led by the simplified principle models. Besides, fault-tolerance, including fault diagnosis and measure maintaining method, namely, rectification, is of great value in practical engineering, but there are few effective methods provided ever since to provide a solution for faulty UFMs. Therefore, data integration for TM-UFMs is one of the complications to obtain the accurate measurements, except for precise transit-time detection and improved transducers and circuits. This paper proposes a novel data integration method for TM-UFM calibration, as well as fault diagnosis and rectification based on particle swarm optimized support vector machines (PSO-SVM). Besides, extensive experiments have been conducted on a platform of TM-UFMs, and the results have illustrated the effectiveness of this method. The PSO-SVM-based models trained by the proposed method lead to a decrease of deviations to ±1% (full scale) in normal state for data integration, compared with ±2% deviations when a traditional method is adopted. When there exist one or two dysfunctional acoustic paths, the method diagnoses the faulty paths and maintains the measurement with deviations below ±2%.

Fault Detection for Message Passing Systems

Many crucial dependable and secure services including atomic commitment, consensus and group membership, and middleware services (such as replica, communication and transaction services) use fault detectors. Through the use of fault detectors, the overlying service can be exempted from failure treatment and synchronization requirements. Fault detection is essential for proving that the services carried out are correct. In this paper, we first identify the necessary conditions to detect faults in a message passing system where multiple disjoint paths exist between each pair of endpoints. We then present the first fault detection protocol capable of detecting message meta-data modification in the presence of various message interferences in addition to other faults including omission faults, message replay and spurious messages using disjoint paths, where paths with faults are not known a priori. In addition, it authenticates message origins allowing Sybil attacks to be detected, identifies faulty paths, and classifies faults in the presence of multiple messages sent by various system processes. We establish the completeness and soundness properties of the proposed algorithm, i.e., it detects each considered fault and each detected fault is an actual fault, respectively. We also show that our algorithm does not yield a significant packet size and delay overheads. The algorithm shows the viability of the use of disjoint paths in fault detection.

Improving the Fault-Tolerance Under Software-Defined Network Based on New Sight of Agreement Protocol

With the rapid development of the Internet technologies, network architectures have been improved continuously. A novel network topology called software-defined network (SDN) has been proposed to enhance the performance of network. Basically, the goals of constructing the SDN network are to achieve faster service deployment, greater flexibility in managing the network, and provisioning while reducing operational costs. So far, most researches have been done to ensure the consistency and reliability on control plane of SDN. However, the consistency and reliability on the data plane of SDN has been neglected. Based on the reasons above, the fault tolerance issue needs to be studied to increase the consistency and reliability of the SDN network. One of the most important problems of fault tolerance issue is the Byzantine Agreement (BA) problem. The goal of BA problem is to make the fault-free processors achieving an agreement to ensure the system working normally even if the faults persist. Unfortunately, the traditional solution is not suitable for the SDN network. Hence, the BA problem should be revised under the SDN network. In this paper, the new kind of failure type called path fault is discussed to adapt to real world. It is because that the routing path between source and destination switch may have faulty influence. Subsequently, a path-based agreement protocol is proposed to solve the BA problem to help all the data be transmitted to the destination even when there are some faulty switches exist in the SDN network. Here, the proposed protocol only requires the minimum number of rounds of message exchange and can tolerate the maximum number of faulty paths for ensuring the consistency and reliability of the SDN network.

A Neural Network Based Strategy (NNBS) for Automated Construction of Test Cases for Testing an Embedded System using Combinatorial Techniques

Testing an embedded system is required to locate bugs in software, diminish risk, development, repairs costs and to improve performance for both users and the company. Embedded software testing tools are useful for catching defects during unit, integration and system testing. Embedded systems in many cases must be optimized by engaging crucial areas of the embedded systems considering all factors of the input domain. The most important concern is to build a place of test cases depend on design of the requirements that can recognize more number of faults at a least rate and point in time in the major sections of an embedded system. This paper proposes a Neural Network Based strategy (NNBS) to generate optimized test cases based on the considerations of the system. A tool called NNTCG (Neural Network Test Case Generator) has been build up based on the method proposed in this paper. Test cases are generated for testing an embedded system using NNTCG and the same are used to determine the expected output through the neural network and the output generated from the actual firmware. The faulty paths within the firmware are determined when the output generated by the neural network is not same as the output generated by the firmware.

Link Quality Based Error Correction Technique for Self-healing Wireless Sensor Networks

In this study, we introduce a link quality based error correction technique for the self-healing WSN. Using the link adaptation algorithm the link quality is measured. And the relay nodes is selected by using the Link Quality Index (LQI) value, such that if the LQI value of a node is above the threshold value it will be chosen as a Relay node. These Relay nodes collect the data from the sensor nodes and apply Forward Error Correction (FEC) by partially decoding the incoming channel-coded data using lesser number of iterations. The FEC provides reliability with lesser transmission power. The quantity of FEC encoding is adaptively adjusted based on the measured link quality values. Multi-path routing is used in order to avoid data loss during the data transmission. With this, the data loss due to faulty path is avoided.

Reliable Channels for Systems in the Presence of Byzantine Faults

Consider a distributed system that delivers each message from a process to its destination if the message transmission does not experience any faults and only delivers those sent by a non-faulty system process. Such a system is referred to as a reliable message passing system. A reliable message passing system requires a reliable channel, a communication channel between a pair of processes that always detects a fault in message transmission and each detected fault is an actual fault, to be implemented. In this paper, we first identify the necessary conditions to detect some restricted form of Byzantine Faults in a message passing system where n disjoint paths exist between each pair of endpoints. We consider Byzantine Faults (BF) whose effect is limited to the modification of a message metadata, omission faults, and message replay. We then present a protocol implementing a reliable channel in message passing systems in the presence of n — 1 Byzantine Faults using n disjoint paths between each pair of communication endpoints where the paths with faults are not known apriori. The proposed protocol detects Byzantine Faults, where each detected fault, an actual fault, authenticates message origins, identifies faulty paths and classifies faults in the presence of multiple messages sent by various system processes.

A lightweight software fault‐tolerance system in the cloud environment

SummaryWith the development of cloud computing, the demand of high availability for services is growing. Unfortunately, software failures greatly reduce system availability. This paper presents a lightweight software fault‐tolerance system, called SHelp, which can effectively recover programs from many types of software bugs in the cloud environment. With error virtualization techniques, it proposes ‘weighted’ rescue points techniques to effectively survive software failures through bypassing the faulty path. For multiple application instances running on different virtual machine, a three‐level storage hierarchy with several comprehensive cache updating algorithms for rescue points management is adopted to share error handling information. On the one hand, SHelp can reduce the redundancy for multiple application instances; on the other hand, it can more effectively and quickly recover from faults caused by the same bugs. A Linux prototype is implemented on an open‐source virtual machine monitor platform, Xen, and evaluated using four Web server applications that contain various types of bugs. The experimental results show that SHelp can recover server applications from these bugs in just a few seconds with modest performance overhead. Copyright © 2013 John Wiley & Sons, Ltd.

Concurrent Path Selection Algorithm in Statistical Timing Analysis

Circuit timing is becoming more and more uncertain under greater process variation as technology scales. Given the fault probability of each timing path and their statistical correlation from a statistical timing framework, the path selection problem for delay faults has a nature similar to the problem of designing a portfolio of stocks or assets or determining the size of bets in gambling to minimize risk. This observation allows us to develop a very different path selection approach from the conventional ones. If selection of k paths is required in a set of paths, we partition the set into two path sets and determine how many paths should be selected in each path set out of the k paths based on the probabilities of each path set containing faulty paths. We recursively continue this process, which results in the paths to be targeted during tests. The partitioning is easily performed because the paths are already grouped into the depth-first search tree based on their suffix or prefix. Experimental results show that the proposed algorithm can effectively use the correlation to generate high-quality path sets. In addition, we study the issues that occur after automatic test pattern generation on the selected paths, and discuss possible solutions to them.

Fine grain faults diagnosis of FPGA interconnect

This paper proposes a new fine grain fault diagnosis method for the interconnect of an arbitrary design implemented in a Field Programmable Gate Array (FPGA). In the proposed method, interconnect faults detected at the primary output are back-tracked until the faulty nets are precisely located. This is carried out by programming the LUTs on the faulty path to be transparent and thus propagating the value of a specific net under test to the primary output for verification against the expected value of the net. After every back-tracking iteration, the fault location is narrowed down and thus the number of nets to be tested decreases significantly. Therefore, the upper bound of the number of configurations (NMAX) required to locate a faulty net, depends on the maximum combinational depth (DCOMB) of the circuit, and it is approximately equivalent to three times of DCOMB. The proposed method has the ability to locate multiple faults without any fault masking with fault coverage that includes all possible stuck-at, open and pair-wise bridging faults. The proposed method is validated on the ISCAS’89 benchmark circuits mapped on Xilinx Spartan 3E, Virtex-4 and Virtex-5 FPGAs and the results are presented. The simulation results show that applying the proposed method on circuits with less combinational depth reduces the required number of test configurations on average by 35% when compared with the latest method available in the literature.

Constraint-based BMC: a backjumping strategy

Safety property checking is mandatory in the validation process of critical software. When formal verification tools fail to prove some properties, the automatic generation of counterexamples for a given loop depth is an important issue in practice. We investigate in this paper the capabilities of constraint-based bounded model checking for program verification and counterexample generation on real applications. We introduce dynamic post-condition variable-driven strategy (DPVS), a new backjumping strategy we developed to handle an industrial application from a car manufacturer, the Flasher Manager. This backjumping strategy is used to search a faulty path and to collect the constraints of such a path. The simplified control flow graph (CFG) of the program is explored in a backward way, starting from the post-condition and jumping to the most promising node where the variables of the post-condition are defined. In other words, the constraints are collected by exploring the CFG in a dynamic and non-sequential backward way. The Flasher Manager application has been designed and simulated using the Simulink platform. However, this module is concretely embedded as a C program in a car computer, thus we have to check that the safety properties are preserved on this C code. We report experiments on the Flasher Manager with our constraint-based bounded model checker, and with CBMC, a state-of-the-art bounded model checker. Experiments show that DPVS and CBMC have similar performances on one property of the Flasher Manager; DPVS outperforms CBMC to find a counterexample for two properties; two of the properties of the Flasher Manager remain intractable for CBMC and DPVS.

A high performance optimal dynamic routing algorithm with unicast multichannel QoS guarantee in communication systems

Dynamic routing protocols play an important role in today's networks. In communication networks, in a current data transmission session, failing nodes and links is a destructor event which loses packets immediately and it can also waste network resources and services seriously. Sometimes failing nodes can disconnect data transmission and, therefore, lost packets must be retransmitted by new session. In this situation, the routing algorithm must discard failed nodes and must repair paths of session by rerouting them. In this case, static routing algorithms and some existing dynamic routing algorithms cannot manage faulty paths fairly and network efficiency is seriously declined. The capability to compensate for topology changes is the most important advantage dynamic routing offers over static routing. An efficient dynamic routing algorithm tries to reroute and change faulty paths without disconnecting sessions and keeps packet transmission in a desirable rate. It is important to tell that a dynamic routing algorithm should provide multi essential parameters, such as acceptable delay, jitter, bandwidth, multichannel paths, virtual channel connections, label switching technology, optimal resource allocation, optimal efficiency in the case of multimedia, and real time applications. This paper proposes a new dynamic framework which transforms static routing algorithms to dynamic routing algorithms. Using the new dynamic framework, this paper constructs an Optimal Dynamic Unicast Multichannel QoS Routing (ODUMR) algorithm based on the Constrained Based Routing (CBR) and Label Switching Technology which is called as ODUMR Algorithm. The performance of ODUMR is analyzed by network simulator tools such as OpNet, MATLAB, and WinQSB. ODUMR produces results better than the existing static and dynamic routing algorithms in terms of necessary parameters.

Testing Resistive Opens and Bridging Faults Through Pulse Propagation

This paper addresses the problems related to resistive opens and bridging faults that lie out of the most critical paths. These faults cannot be detected by traditional delay fault testing because the induced delay defects are not large enough to result in timing violations when the test rate is equal to the nominal operating frequency. In spite of this problem, resistive opens and bridgings should be detected because they may give rise to reliability problems. To detect them, we propose a testing method that is based on the propagation of pulses within the faulty circuit and that exploits the degraded capability of faulty paths to propagate pulses. The effectiveness of our method is analyzed at the transistor level and compared with the use of reduced clock periods to detect the same class of faults. Results show similar performance in the case of resistive opens and better performance in the case of bridgings. Moreover, the proposed approach is not affected by possible problems in the clock distribution.