Fault Simulation Research Articles

Interpretable Intelligent Fault Diagnosis for Heat Exchangers Based on SHAP and XGBoost

Heat exchangers play an important role in offshore oil and gas production and offshore low-temperature waste heat power generation. Heat exchanger health management mainly relies on performance parameter monitoring; however, accurate fault mode identification remains a challenge and the diagnostic results are difficult to interpret. This paper proposed an interpretable intelligent diagnosis method for heat exchangers based on Shapley Additive exPlanation and eXtreme Gradient Boosting. Firstly, secondary parameters characterizing the health state of heat exchangers are constructed based on online monitored data such as pressure and temperature. Then, the multi-dimensional feature vector is constructed by integrating the online monitored data and secondary parameters. The XGBoost fault diagnosis model for leakage and scaling faults is established with the multi-dimensional feature vector as the input. To improve the model performance on diagnosis, a grid search optimization algorithm is adopted. After the fault diagnosis of a heat exchanger is completed, the SHAP method is introduced to analyze the contribution of features by quantifying their influence on the fault diagnosis results. Finally, the effectiveness of the proposed method is verified by the heat exchanger fault simulation experiment. The proposed method achieved a diagnosis accuracy of 99.79%, which has better performance than the traditional fault diagnosis method.

Bearing Fault Feature Extraction Method Based on Adaptive Time-Varying Filtering Empirical Mode Decomposition and Singular Value Decomposition Denoising

Aiming to address the difficulty in extracting the early weak fault features of bearings under complex operating conditions, a fault diagnosis method is proposed based on the adaptive fusion of time-varying filtering empirical mode decomposition (TVF-EMD) modal components and singular value decomposition (SVD) noise reduction. First, the snake optimization (SO) technique is used to optimize the TVF-EMD algorithm in order to determine the optimal parameters that match the input signal. Then, the bearing signal is divided into a number of intrinsic mode functions (IMFs) using TVF-EMD in order to reduce the nonlinearity and non-stationary characteristics of the fault signal. An index for the envelope fault information energy ratio (EFIER) is created to overcome the drawback of there being too many IMF components after TVF-EMD decomposition. The IMF components are ranked in descending order according to the EFIER, and they are fused according to the maximum principle of the energy ratio of envelope fault information until the optimal fusion component is determined. Finally, the fault feature is extracted when the optimal fusion component is denoised using SVD. Two measured bearing fault signals and simulation signals are used to validate the performance of the proposed method. The experimental findings demonstrate that the approach has good sensitive feature screening, fusion, and noise reduction capabilities. The proposed method can more precisely extract the early fault features of bearings and accurately identify fault types.

Does Subsurface Fault Geometry Affect Aleatory Variability in Modeled Strike-Slip Fault Behavior?

ABSTRACT The nonplanar geometry of faults influences their seismotectonic behavior, affecting the initiation, propagation, and termination of individual earthquakes as well as the stress–slip relationship and probability of multisegment rupture. Consequently, computer simulations that aim to resolve the earthquake rupture process and make predictions about a fault’s future behavior should incorporate nonplanar fault geometries. Although surface traces of faults can be mapped with high accuracy, a key challenge is to define a fault’s detailed subsurface geometry due to a general lack of data. This raises the question of which geometry to use. Does it matter which subsurface geometry is utilized in earthquake rupture simulations, as long as at least the fault trace is considered? How different is the simulated fault behavior for faults that share the same surface trace but different subsurface geometries? Using the physics-based earthquake-cycle simulator MCQsim, we generate seismic catalogs for 100 × 20 km strike-slip faults, assuming variations in fault surface trace, subsurface geometry, and strength distribution. We investigate how the long-term fault behavior—in the form of magnitude–frequency distribution, earthquake interevent time, and maximum earthquake size—is affected by fault geometry and strength distribution. We find that the simulated behavior of strike-slip faults with identical fault traces is interchangeable—even if their subsurface fault geometries differ. Implementing the fault trace constrains possible fault geometries to a level that makes the long-term behavior indistinguishable—at least for strike-slip faults with “known” strength distribution and length-to-width aspect ratios that are equal or larger than what we used here. The fault trace can provide a satisfactory representation of subsurface geometry for assessing long-term fault behavior.

Typical fault modeling and simulation of secondary circuit system of nuclear power plant

Typical fault modeling and simulation of secondary circuit system of nuclear power plant

Integrated DC arc model and DC arc detection approach based on K‐line diagram and spectrum integral difference

AbstractIn the low voltage direct current (LVDC) systems, the occurrence of DC series arc faults poses a significant threat to the safe operation of the system. This paper develops an accurate arc model for the arc fault simulation. The proposed arc model consists the steady‐state impedance, high frequency characteristics, and dynamic characteristics of the arc. Additionally, this paper proposes an arc detection algorithm combining the K‐line diagram and the spectrum integral difference of the arc current in the LVDC systems. This algorithm can identify four circuit states: normal operation, arc fault, switching action, and load mutation, which addresses the challenge of arc fault detection in complex working conditions. The STM32F407 microcontroller is utilized to design a DC series arc fault detector. Online detection tests demonstrate that the arc faults can be accurately detected and isolated within 37 ms, meeting the requirement of the UL1699B standard, with an accuracy rate of 99.33%. These achievements not only enhance the safety of the LVDC systems but also provide valuable references for the development of arc fault detection technology.

VECTOR-LOGIC FAULT SIMULATION

Context. The technological trends of Design&Test computing for the IT industry and academic science are determined by the following directions: in-memory computing, immersive computing, AI computing, focused on energy saving and reduction of computing time when providing services. A mechanism for simulating faults as addresses on smart data structures is proposed, which eliminates the algorithm for simulating input test sets to obtain a test map for logic functionality. The proposed mechanism is focused on the service of SoC IP-cores under the control of the IEEE 1500 standard, which can be perceived positively by engineers in the EDA market. Objective. The purpose of the research is time- and energy-saving mechanisms for simulating malfunctions, such as addresses, by using read-write transactions of in-memory computing to build a test map of any functionality on smart data structures. Method. Smart data structures are represented by a logical vector and its derivatives in the form of truth tables and matrices. The test map is a matrix whose coordinates are determined by the combinations of all logical faults that are tested on the binary sets of the comprehensive test. The construction of the test map is focused on the architecture of in-memory computing based on read-write transactions, which makes the simulation mechanism economical in terms of simulation time and energy consumption due to the absence of a central processor. A logical vector as a single component of input data does not require synthesis into a technologically permitted structure of elements. Synthesis of smart data structures based on four matrix operations creates a fault test map like addresses for any logic. Results. Deductive matrix vectors are effectively used to model faults as addresses in digital structures of any configuration, including convergent branches and feedback loops. The resulting test map is used to find the minimum fault-checking test of the input variables. The proposed fault simulation mechanism technologically easily fits into the architecture of in-memory computing and uses only read-write transactions. The vector logic engine can also be used to test graph structures that are described by a truth table or a logical vector. The truth table addresses used for fault simulation are effectively used for processorless processing of large data in the in-memory computing architecture. Conclusions. Scientific novelty – a vector-logic in-memory computing mechanism for building a test map is proposed, characterized by the construction of intelligent data structures that reset the fault modeling algorithm. The proposed mechanism has no analogues in the design & test industry in terms of simplicity and predictability of data structure sizes and the absence of a test set modeling algorithm. The practical significance is determined by the application of the mechanism for testing logical functionalities of any complexity to solve verification tasks. Prospects of the research – increasing the object of diagnosis to the scheme, i.e. building a test map of the scheme logical structure.

Study on Few-Shot Fault Diagnosis Method for Marine Fuel Systems Based on DT-SViT-KNN.

The fuel system serves as the core component of marine diesel engines, and timely and effective fault diagnosis is the prerequisite for the safe navigation of ships. To address the challenge of current data-driven fault-diagnosis-based methods, which have difficulty in feature extraction and low accuracy under small samples, this paper proposes a fault diagnosis method based on digital twin (DT), Siamese Vision Transformer (SViT), and K-Nearest Neighbor (KNN). Firstly, a diesel engine DT model is constructed by integrating the mathematical, mechanism, and three-dimensional physical models of the Medium-speed diesel engines of 6L21/31 Marine, completing the mapping from physical entity to virtual entity. Fault simulation calculations are performed using the DT model to obtain different types of fault data. Then, a feature extraction network combining Siamese networks with Vision Transformer (ViT) is proposed for the simulated samples. An improved KNN classifier based on the attention mechanism is added to the network to enhance the classification efficiency of the model. Meanwhile, a Weighted-Similarity loss function is designed using similarity labels and penalty coefficients, enhancing the model's ability to discriminate between similar sample pairs. Finally, the proposed method is validated using a simulation dataset. Experimental results indicate that the proposed method achieves average accuracies of 97.22%, 98.21%, and 99.13% for training sets with 10, 20, and 30 samples per class, respectively, which can accurately classify the fault of marine fuel systems under small samples and has promising potential for applications.

On the Feasibility of Detecting Faults and Irregularities in On-Load Tap Changers (OLTCs) by Vibroacoustic Signal Analysis.

Unlike traditional tap changers, which require transformers to be de-energized before making changes, On-Load Tap Changers (OLTCs) can adjust taps while the transformer is in service, ensuring continuous power supply during voltage regulation. OLTCs enhance grid reliability and support load balancing, reducing strain on the network and optimizing power quality. Their importance has grown as the demand for stable voltage and the integration of renewables has increased, making them vital for modern and resilient power systems. While enhanced OLTCs often incorporate stronger materials and improved designs, mechanical components like contacts and diverter switches can still experience wear over time. This can result in longer maintenance intervals. In the era of digitalization, advanced diagnostic techniques capable of detecting early signs of wear or malfunction are essential to enable preventive maintenance for these important components. This contribution introduces a novel method for detecting faults and irregularities in OLTCs, leveraging vibroacoustic signals to enhance OLTC diagnostics. This paper proposes a tolerance-based approach using the envelope of vibroacoustic signals to identify faults. A significant challenge in this field is the limited availability of faulty signal data, which hinders the performance of machine learning algorithms. To address this, this study introduces a nonlinear model utilizing amplitude modulation with a Gaussian carrier to simulate faults by introducing controlled distortions. The dataset used in this study, with data recorded under real operating conditions from 2016 to 2023, is free of anomalies, providing a robust foundation for the analysis. The results demonstrate a marked improvement in the robustness of detecting simulated faults, offering a promising solution for enhancing OLTC diagnostics and preventive maintenance in modern power systems.

A novel fault prediction modeling and simulation method for power communication networks

A novel fault prediction modeling and simulation method for power communication networks

Fault simulation in Phasor Measurement Units: A study on system reaction time in a 5G network environment

Fault simulation in Phasor Measurement Units: A study on system reaction time in a 5G network environment

Faults-as-address simulation

Fault-as-address-simulation (FAAS) is a simulation mechanism for testing combinations of circuit line faults, represented by the bit addresses of element logical vectors. The XOR relationship between the test set T and the truth table L of the element forms a deductive vector for fault simulation, using truth table addresses or the logic vector bits. Addresses are used in the simulation matrix to mark those n-combinations of input faults detected at the element's output. The columns of the simulation matrix are treated as n-row addresses to generate an element output row via a deductive vector. There is no transport of input faults to the element output, Only the 1-signals written in the non-input row coordinates of the circuit simulation matrix. The simulation matrix is initially filled with 1-signals along the main diagonal. The line faults detected on the test set of circuits are determined by the inverse of lines good values, which have 1-values in the matrix row corresponding to the output circuit element. The deductive vector is obtained by the XOR-relations between the test set and logical vector in three table operations. The advantage of the proposed FAAS mechanism is the predictable complexity of the algorithm and memory consumption for storing data structures when simulating a test set.

SURE: A Visualized Failure Indexing Approach Using Program Memory Spectrum

Failure indexing is a longstanding crux in software debugging, the goal of which is to automatically divide failures (e.g., failed test cases) into distinct groups according to the culprit root causes, as such multiple faults residing in a faulty program can be handled independently and simultaneously. The community of failure indexing has long been plagued by two challenges: (1) The effectiveness of division is still far from promising. Specifically, existing failure indexing techniques only employ a limited source of software runtime data, for example, code coverage, to be failure proximity and further divide them, which typically delivers unsatisfactory results. (2) The outcome can be hardly comprehensible. Specifically, a developer who receives the division result is just aware of how all failures are divided, without knowing why they should be divided the way they are. This leads to difficulties for developers to be convinced by the division result, which in turn affects the adoption of the results. To tackle these two problems, in this article, we propose SURE , a vi SU alized failu R e ind E xing approach using the program memory spectrum (PMS). We first collect the runtime memory information (i.e., variables’ names and values, as well as the depth of the stack frame) at several preset breakpoints during the execution of a failed test case, and transform the gathered memory information into a human-friendly image (called PMS). Then, any pair of PMS images that serve as proxies for two failures is fed to a trained Siamese convolutional neural network, to predict the likelihood of them being triggered by the same fault. Last, a clustering algorithm is adopted to divide all failures based on the mentioned likelihood. In the experiments, we use 30% of the simulated faults to train the neural network, and use 70% of the simulated faults as well as real-world faults to test. Results demonstrate the effectiveness of SURE: It achieves 101.20% and 41.38% improvements in faults number estimation, as well as 105.20% and 35.53% improvements in clustering, compared with the state-of-the-art technique in this field, in simulated and real-world environments, respectively. Moreover, we carry out a human study to quantitatively evaluate the comprehensibility of PMS, revealing that this novel type of representation can help developers better comprehend failure indexing results.

An Innovative Technique for Fault Analysis of Electric Automated Vehicles

A serious accident might occur as a direct result of a defective component or system, especially at an automated vehicle. The objective of this study is to establish a fault analysis methodology that can effectively improve the reliability of electric and automated vehicles. To achieve this, We proposed a method for identifying potential faults by combining Failure Modes and Effects Analysis (FMEA) with Fault Tree Analysis (FTA), creating a database of possible (example) faults that maps the causal relationship between causes, symptoms and faults, which enables more thorough fault analysis and serves as the foundation for further study. Using the fault database, we demonstrate a practical application involving fault injection and simulation, which can provide a more intuitive and practical representation of the effects of faults. The methodology is validated with the demonstrator vehicle from the joint project. This approach is scalable and can also be well applied to other electric automated vehicles with similar structure, providing a reliable tool to the system fault analysis for future work.

Lifting wavelet-informed hierarchical domain adaptation network: An interpretable digital twin-driven gearbox fault diagnosis method

Digital twin (DT) has served as a dependable technology for supplementing reliable simulated fault data in gearbox fault diagnosis. However, the vast data distribution discrepancy and insufficient interpretability still significantly limit the industrial application of DT-driven fault diagnosis methods. To solve these problems, a lifting wavelet-informed hierarchical domain adaptation network (LHDAN) is proposed for transferring the diagnostic knowledge between the physical gearbox and DT model. LHDAN improves the interpretability of diagnostic knowledge transfer in terms of parameter initialization, physical constraints on the training process, and feature distribution adaptation. Specifically, LHDAN utilizes a lifting wavelet-informed convolutional neural network (LW-Conv) to mimic the cascade structure of lifting wavelet decomposition, in which the fully learnable prediction and update operators are initialized with existing wavelet bases and further constrained with high-pass and low-pass filters in the training process. Furthermore, a kurtosis-guided attention mechanism is proposed to fuse hierarchical features with diverse transferabilities flexibly. Finally, the fused hierarchical features of the actual gearbox and DT model are explicitly aligned to eliminate the feature distribution discrepancies. A high-fidelity DT model is established based on an industrial gearbox fault test bench. Compared to several state-of-the-art models, LHDAN demonstrates superior interpretability and diagnostic performance.

Simulation of Faults in the Yeywa-Thaphaywa High Voltage Transmission Line using Fuzzy Logic

Faults in transmission networks frequently undermine the reliability and stability of electrical power supply, causing load shedding and posing risks to power system equipment. Effective fault classification is crucial to minimize power outages and ensure timely restoration. This study presents a fault classification method for transmission lines using fuzzy logic. The classification utilizes three-phase feeder currents, neutral current, and phase voltages as inputs to the Fuzzy Inference System (FIS). The proposed method accurately classifies the various types of faults in a high voltage transmission network, including line-to-ground fault, double line-to-ground fault, line-to-line fault, and three-phase faults. Numerous test cases demonstrate the technique's high accuracy. The simulations are carried out in MATLAB/SIMULINK using Sim Power Systems and the Fuzzy Logic Toolbox (MATLAB 2016a).

Study on the accurate detection method of full‐polarimetric ground‐penetrating radar faults in mines based on modified Yamaguchi decomposition

AbstractObtaining information on tectonic tendencies is a prerequisite for intelligent and accurate mining in mines. In the special mine environment, the co‐polarized ground‐penetrating radar can only identify the spatial location of faults, and it is difficult to analyse the inclination information of fault structures. This paper proposes a mine full‐polarimetric ground‐penetrating radar fault tendency detection method based on this. First, based on the stacking characteristics of the coal depositional, this paper analyses the propagation law of the pulse electromagnetic wave in the coal seam and puts forward the assumption of the overlapping echo reflection of the fault structure. The reasonableness of the fault reflection assumption is verified through a numerical simulation study. Second, based on the cutting relationship of the fault to the coal seam, we divided the reflection structure of the fault structure into plane scattering and dihedral angle scattering. We realized the mingled echoes’ decomposition using the improved Yamaguchi decomposition technique. To analyse the applicability of the modified Yamaguchi and Freeman decomposition methods in the identification of fault inclination, we use the upright fault simulation data for the discussion, and we find that the improved Yamaguchi decomposition method is more advantageous in the identification of fault inclination in the mine. The decomposition results based on the simulation data of fault models with different dip angles found that when the dip angle of the fault is less than 90°, the scattering of the fault structure is dominated by planar scattering and dihedral angle scattering; when the dip angle of the fault is greater than or equal to 90°, the scattering of the fault structure is dominated by planar scattering, and the scattering power of the dihedral angle model is zero. By analysing the effect of fault strike on the decomposition results, it is found that the fault strike angle has little effect on the identification of fault tendency. Finally, the application potential of this paper's method is tested by constructing complex numerical models and probing experiments. Therefore, the method proposed in this paper can solve the fault tendency identification under a thick coal seam.

Short-Circuit Fault Simulation of Tri-Axial High Temperature Superconducting Cable in Combined PSCAD-MATLAB

Short-Circuit Fault Simulation of Tri-Axial High Temperature Superconducting Cable in Combined PSCAD-MATLAB

Research on Fault Prediction of Power Devices in Rod Control Power Cabinets Based on BiTCN-Attention Transfer Learning Model.

The Insulated Gate Bipolar Transistor (IGBT) is the key power device in the rod control power cabinet of nuclear power plants; its reliable operation is of great significance for ensuring the safe and economical operation of the nuclear power plants. Therefore, it is necessary to conduct fault prediction research on IGBT to achieve better condition-based maintenance and improve its operational reliability. However, power cabinets often operate under multiple, complex working conditions, so predicting IGBT faults from single working condition data usually has limitations and low accuracy. Its failure probability has an important relationship with the actual operating conditions of the cabinet. In order to improve the reliability and maintainability of the control power cabinet in nuclear power plants, this paper takes IGBTs in the rod control power cabinet as the object and makes full use of the data of IGBTs under multiple working conditions to carry out research on the cross-condition fault prediction of IGBTs under multiple-source working conditions. A transfer learning (TL) model based on a bidirectional time convolutional network (BiTCN) combined with attention was proposed to solve the problem of low accuracy of cross-operating fault prediction in a multi-source domain. Firstly, an IGBT fault simulation model was built to collect the life cycle state data of the module under different working conditions. Then, after pre-processing such as removing outliers, kernel principal component analysis (KPCA) was used to integrate all source domain data, obtain source domain characterization data, and train the BiTCN-attention model. Finally, the BiTCN-attention model trained in the source domain was transferred, and the model was fine-tuned according to the target domain data. Simulation results show that the accuracy of the proposed BiTCN-attention transfer learning prediction method can reach more than 99%, which is significantly better than that of the recurrent neural network transfer learning (RNN-TL) model, long short-term memory network transfer learning (LSTM-TL) model, gated cyclic unit transfer learning (GRU-TL) model, and time convolutional network transfer learning (TCN-TL) model. This method can not only reduce the inconsistency of fault characteristic values caused by changes in working conditions but also accurately predict the degradation trend when only early fault data are available, providing an effective solution for IGBT fault prediction across working conditions in multi-source domains.

Design and Implementation of a 7-Person Voting Device based on Quartus

As the complexity of digital system design continues to increase, efficient and precise decision support systems have become increasingly important. This paper presents the design and implementation of a 7-voter decision system based on Altera’s Quartus software. The voter is applied in the core decision-making process to ensure the accuracy and efficiency of decisions. The study begins by outlining the design principles of the 7-voter decision system, using a design philosophy that minimizes timing delays and optimizes hardware resource utilization. A complex majority voting logic circuit is implemented using high-level hardware description languages (VHDL/Verilog), ensuring the advanced nature and applicability of the voting circuit. In terms of the logical implementation of the voting circuit, the paper conducts an in-depth analysis of the optimization of combinational and sequential logic and standardizes the input and output to enhance the signal stability and the system’s resistance to interference. On the Quartus platform, the design process of the voting system is elaborated in detail, with careful consideration given to boundary conditions and hardware compatibility. The implementation of the voter has undergone rigorous simulation and testing. Strict parameter setting for simulations and waveform analysis confirm the correctness of the circuit, and fault simulation tests further confirm its reliability. Performance indicators such as response time and percentage of resource utilization have been quantitatively analyzed and meet the design objectives set beforehand. Overall, this research not only realizes a highperformance 7-voter decision system but also provides an effective case study for applications on the high-performance Quartus design platform. Future research can build on the current work to further optimize algorithms and hardware, explore the potential for the application of the voter in a broader range of fields, and adapt to the new features of the Quartus platform to achieve more powerful decision support functions.

Dynamic model-based intelligent fault diagnosis method for fault detection in a rod fastening rotor

A complete fault sample database is of great significance for the intelligent fault diagnosis method of rod fastening rotor. However, the lack of fault samples makes the fault diagnosis results unbelievable. To solve this issue, the dynamic model-based intelligent fault diagnosis method is established for a rod fastening rotor, and the fault sample database is enriched by numerical simulations. First, the lumped parameter model of the rod fastening rotor system is constructed and further updated using Euclidean Distance between measurement and numerical simulation of the intact system. Second, mathematical models of various fault types are incorporate into the updated model to obtain numerical simulation fault samples. Thirdly, the utilization of numerical simulation fault samples is severed as training data to the artificial intelligence (AI) models and the unknown measurement test samples will be finally classified. In this paper, Support Vector Machine, Random Forest, Bayesian Network and Decision Tree are selected as the typical AI models. Subsequently, the feasibility of classification is validated by the test bench of the rod fastening rotor system, and the problem of insufficient fault samples can be solved.