Fabrication Of Field-effect Transistors Research Articles

Tattoo‐Paper Transfer as a Versatile Platform for All‐Printed Organic Edible Electronics

The use of natural or bioinspired materials to develop edible electronic devices is a potentially disruptive technology that can boost point-of-care testing. The technology exploits devices that can be safely ingested, along with pills or even food, and operated from within the gastrointestinal tract. Ingestible electronics can potentially target a significant number of biomedical applications, both as therapeutic and diagnostic tool, and this technology may also impact the food industry, by providing ingestible or food-compatible electronic tags that can "smart" track goods and monitor their quality along the distribution chain. Temporary tattoo-paper is hereby proposed as a simple and versatile platform for the integration of electronics onto food and pharmaceutical capsules. In particular, the fabrication of all-printed organic field-effect transistors on untreated commercial tattoo-paper, and their subsequent transfer and operation on edible substrates with a complex nonplanar geometry is demonstrated.

Semiconducting SWNTs sorted by polymer wrapping: How pure are they?

Short-channel field-effect transistors (FETs) prepared from semiconducting single-walled carbon nanotube (s-SWNT) dispersions sorted with poly(2,5-dimethylidynenitrilo-3,4-didodecylthienylene) are demonstrated. Electrical analysis of the FETs shows no evidence of metallic tubes out of a total number of 646 SWNTs tested, implying an estimated purity of our semiconducting SWNT solution higher than 99.85%. These findings confirm the effectiveness of the polymer-wrapping technique in selecting semiconducting SWNTs, as well as the potential of sorted nanotubes for the fabrication of short channel FETs comprising from 1 to up to 15 nanotubes without inter-nanotube junctions.

Colloidal Quantum Dot Inks for Single-Step-Fabricated Field-Effect Transistors: The Importance of Postdeposition Ligand Removal.

Colloidal quantum dots are a class of solution-processed semiconductors with good prospects for photovoltaic and optoelectronic applications. Removal of the surfactant, so-called ligand exchange, is a crucial step in making the solid films conductive, but performing it in solid state introduces surface defects and cracks in the films. Hence, the formation of thick, device-grade films have only been possible through layer-by-layer processing, limiting the technological interest for quantum dot solids. Solution-phase ligand exchange before the deposition allows for the direct deposition of thick, homogeneous films suitable for device applications. In this work, fabrication of field-effect transistors in a single step is reported using blade-coating, an upscalable, industrially relevant technique. Most importantly, a postdeposition washing step results in device properties comparable to the best layer-by-layer processed devices, opening the way for large-scale fabrication and further interest from the research community.

Fabrication of field-effect transistor utilizing oriented thin film of octahexyl-substituted phthalocyanine and its electrical anisotropy based on columnar structure

Field-effect transistors with molecularly oriented thin films of metal-free non-peripherally octahexyl-substituted phthalocyanine (C6PcH2), which characteristically form a columnar structure, have been fabricated, and the electrical anisotropy of C6PcH2 has been investigated. The molecularly oriented thin films of C6PcH2 were prepared by the bar-coating technique, and the uniform orientation in a large area and the surface roughness at a molecular level were observed by polarized spectroscopy and atomic force microscopy, respectively. The field effect mobilities parallel and perpendicular to the column axis of C6PcH2 were estimated to be (1.54 ± 0.24) × 10−2 and (2.10 ± 0.23) × 10−3 cm2 V−1 s−1, respectively. The electrical anisotropy based on the columnar structure has been discussed by taking the simulated results obtained by density functional theory calculation into consideration.

Revealing the Physicochemical Basis of Organic Solid-Solid Wetting Deposition: Casimir-like Forces, Hydrophobic Collapse, and the Role of the Zeta Potential.

Supramolecular self-assembly at the solid-solid interface enables the deposition and monolayer formation of insoluble organic semiconductors under ambient conditions. The underlying process, termed as the organic solid-solid wetting deposition (OSWD), generates two-dimensional adsorbates directly from dispersed three-dimensional organic crystals. This straightforward process has important implications in various fields of research and technology, such as in the domains of low-dimensional crystal engineering, the chemical doping and band gap engineering of graphene, and in the area of field-effect transistor fabrication. However, to date, lack of an in-depth understanding of the physicochemical basis of the OSWD prevented the identification of important parameters, essential to achieve a better control of the growth of monolayers and supramolecular assemblies with defined structures, sizes, and coverage areas. Here we propose a detailed model for the OSWD, derived from experimental and theoretical results that have been acquired by using the organic semiconductor quinacridone as an example system. The model reveals the vital role of the ζ potential and includes Casimir-like fluctuation-induced forces and the effect of dewetting in hydrophobic nanoconfinements. Based on our results, the OSWD of insoluble organic molecules can hence be applied to environmental friendly and low-cost dispersing agents, such as water. In addition, the model substantially enhances the ability to control the OSWD in terms of adsorbate structure and substrate coverage.

Well-Balanced Ambipolar Conjugated Polymers Featuring Mild Glass Transition Temperatures Toward High-Performance Flexible Field-Effect Transistors.

Conjugated polymers, which can be fabricated by simple processing techniques and possess excellent electrical performance, are key to the fabrication of flexible polymer field-effect transistors (PFETs) and integrated circuits. Herein, two ambipolar conjugated polymers based on (3E,7E)-3,7-bis(2-oxo-1H-pyrrolo[2,3-b]pyridin-3(2H)-ylidene)benzo[1,2-b:4,5-b']difuran-2,6(3H,7H)-dione and dithienylbenzothiadiazole units, namely PNBDOPV-DTBT and PNBDOPV-DTF2BT, are developed. Both copolymers possess almost planar conjugated backbone conformations and suitable highest occupied molecular orbital (HOMO)/lowest unoccupied molecular orbital (LUMO) energy levels (-5.64/-4.38 eV for PNBDOPV-DTBT and -5.79/-4.48 eV for PNBDOPV-DTF2BT). Note that PNBDOPV-DTBT has a glass transition temperature (140 °C) lower than the deformation temperature of polyethylene terephthalate (PET), meaning well-ordered molecular packing can be obtained on PET substrate before its deformation in mild thermal annealing process. Flexible PFETs based on PNBDOPV-DTBT fabricated on PET substrates exhibit high and well-balanced hole/electron mobilities of 4.68/4.72 cm2 V-1 s-1 under ambient conditions. After the further modification of Au source/drain electrodes with 1-octanethiol self-assembled monolayers, impressively high and well-balanced hole/electron mobilities up to 5.97/7.07 cm2 V-1 s-1 are achieved in the flexible PFETs. Meanwhile, flexible complementary-like inverters based on PNBDOPV-DTBT on PET substrate also afford a much high gain of 148. The device performances of both the PFETs and inverters are among the highest values for ambipolar conjugated polymers reported to date.

Fabrication of Graphene Field-effect Transistors with Uniform Dirac Voltage Close to Zero

Fabrication of Graphene Field-effect Transistors with Uniform Dirac Voltage Close to Zero

2-Thiopene[1]benzothieno[3,2-b]benzothiophene derivatives as solution-processable organic semiconductors for organic thin-film transistors

Novel [1]benzothieno[3,2-b]benzo-thiophene (BTBT) derivatives were synthesized and characterized as solution-processable organic semiconductors for top-contact/bottom-gate organic filed-effect transistors (OFETs). Physicochemical properties of the new compounds were characterized by UV–vis absorption spectroscopy, thermogravimetric analysis (TGA), differential scanning calorimeter (DSC), cyclic voltammetry (CV), and density functional theory (DFT) calculation. The electrical properties of the corresponding compounds were investigated through the fabrication and characterization of field-effect transistors via solution-shearing. Both compounds were FET active and exhibited decent p-channel activity with carrier mobilities up to 0.10 cm2 V−1 s−1 and current on/off ratio >108. Film morphology and microstructure, as characterized by atomic force microscopy (AFM) and X-ray diffraction (XRD) were correlated with the device performance.

VTP as an Active Layer in a Vertical Organic Field Effect Transistor

In this letter, a p-type organic material from metal phthalocyanine (MPc) derivative, vanadyl 3,10,17,24-tetra-tert-butyl-1,8,15,22-tetrakis (dimethylamino)-29H,31H-phthalocyanine (VTP) has been utilized for fabrication of an organic electronic device. Prior to the fabrication of a vertical organic field effect transistor (VOFET), fundamental work in investigating the energy level of VTP has been done through determination of oxidation and reduction potentials. Energy levels of VTP were calculated based on the highest occupied molecular orbital (HOMO) and lowest unoccupied molecular orbital (LUMO) of cyclic voltammetry (CV) and UV–vis analyses. Subsequently, the soluble VTP was employed as an active layer in VOFET with different thicknesses of 90.4 nm, 66.4 nm, and 52.1 nm. It is found that a device with 66.4 nm VTP’s thickness showed the optimum performance, by giving the maximum current density and lowest threshold voltage of around 37 mA/cm2 and 7.1 V, respectively. The effects of the channel thickness on the semi-transparent VOFET devices are explained in this work.

Gigahertz integrated circuits based on carbon nanotube films

Progress in the controlled synthesis and post-growth treatment of carbon nanotubes has led to the fabrication of nanotube-based field-effect transistors with intrinsic performance close to the ballistic limits. However, nanotube-based integrated circuits (ICs) developed to date typically have a working frequency of less than 1 MHz, which is well below the working frequency of silicon ICs. Here we show that the speed of carbon nanotube ICs can be significantly improved by optimizing device structure and fabrication processes, yielding ICs that work in the gigahertz regime. Based on high-performance nanotube film field-effect transistors, five-stage ring oscillators were batch fabricated and shown to exhibit an oscillation frequency of up to 5.54 GHz. This is twenty times higher than that of the leading nanotube IC (a five-stage ring oscillator with an oscillation frequency of 282 MHz). Using field-effect transistors made from carbon nanotube films, five-stage ring oscillators can be fabricated that exhibit an oscillation frequency of up to 5.54 GHz.

Effect of reaction time on the dielectric behaviour of reduced graphene oxide–layered cobalt hydroxide composite for high-k gate dielectrics

Reduced graphene oxide (RGO)–cobalt hydroxide [Co(OH)2] composite was synthesized using one-pot hydrothermal method. The frequency-dependent dielectric properties and leakage conduction mechanism were studied for the composite. Samples were made with different reaction times of 2, 4, 6 and 12 h for the same concentration of graphene oxide and cobalt nitrate at constant temperature and pH. A high dielectric constant of 7.19×106 with a capacitance of 2.45×10−6 F was achieved for a reaction time of 2 h, at 100 Hz frequency and 27 °C temperature. One order decrement in the dielectric constant (105) was found with an increase in time starting from 4 to 12 h. The leakage current characteristics revealed Schottky barrier-type conduction mechanism in the composites. Thus, RGO-Co(OH)2 composite with a high dielectric constant, microcapacitance and large leakage current could be regarded as a potential high-k candidate, which has its application as a gate dielectric material in the fabrication of metal oxide semiconductor field effect transistor.

Normally-off hydrogen-terminated diamond field-effect transistor with Al2O3 dielectric layer formed by thermal oxidation of Al

Fabrication of normally-off hydrogen-terminated diamond field-effect transistors (FET) has been carried out by using 3nm Al2O3 dielectric layer, which was formed by thermally oxidizing 3nm Al in air. 100nm Al was covered on the 3nm Al2O3 dielectric layer to form Al/Al2O3 gate. The leakage current density of FET with 6μm gate length kept smaller than 5×10−7A·cm−2, while the gate voltages swept from 3 to −5V. The capacitance-voltage characteristic indicated low-trapped charge densities in Al2O3 dielectric layer. For comparison, FET with only 3nm Al2O3 gate and with 100nm Al/3nm Al2O3 gate was fabricated, which showed normally-on and normally-off characteristic respectively, indicating that 100nm Al/3nm Al2O3 gate could deplete hole densities in FET channel due to the difference of work function between Al and hydrogen-terminated diamond.

Linear Conjugated Polymer Backbones Improve Alignment in Nanogroove-Assisted Organic Field-Effect Transistors.

Three cyclopentadithiophene-difluorophenylene copolymers (named PhF2,3, PhF2,5, and PhF2,6), which differ by the arrangement of fluorines on the phenylene structural unit, were designed and synthesized for the fabrication of organic field-effect transistors (OFETs). Single crystal structures of model compounds representative of the backbone and density functional theory (DFT) were used to estimate the backbone shape for each copolymer. The different substitution arrangements impact the backbone secondary structure through different nonbonding F···H interactions. PhF2,5 and PhF2,6 assumed more linear backbones relative to PhF2,3, which in turn impacts self-assembly and polymer chain alignment on nanogrooved (NG) substrates. A larger improvement of charge carrier mobility for the more linear backbones was achieved when using NG substrates. Among the three polymers, PhF2,6 achieved the highest average field-effect hole mobility (5.1 cm2 V-1 s-1). As evidenced by grazing incidence wide-angle X-ray scattering (GIWAXS), thin films of PF2,5 and PF2,6 exhibited a higher degree of anisotropic alignment, relative to the more curved PF2,3 counterpart, consistent with the higher hole mobilities. This work gives insight into how nonbonding interactions can influence charge carrier mobility through changes in secondary structure and suggests that polymers with more linear shapes might be preferred for achieving greater levels of alignment within the confines of a NG environment.

Fabrication, electrical characterization and device simulation of vertical P3HT field-effect transistors

Abstract Vertical organic field-effect transistors (VOFETs) provide an advantage over lateral ones with respect to the possibility to conveniently reduce the channel length. This is beneficial for increasing both the cut-off frequency and current density in organic field-effect transistor devices. We prepared P3HT (poly[3-hexylthiophene-2,5-diyl]) VOFETs with a surrounding gate electrode and gate dielectric around the vertical P3HT pillar junction. Measured output and transfer characteristics do not show a distinct gate effect, in contrast to device simulations. By introducing in the simulations an edge layer with a strongly reduced charge mobility, the gate effect is significantly reduced. We therefore propose that a damaged layer at the P3HT/dielectric interface could be the reason for the strong suppression of the gate effect. We also simulated how the gate effect depends on the device parameters. A smaller pillar diameter and a larger gate electrode-dielectric overlap both lead to better gate control. Our findings thus provide important design parameters for future VOFETs.

Ultrathin GaGeTe p-type transistors

We exfoliated bulk GaGeTe crystals down to ultrathin flakes using the scotch tape method and fabricated field effect transistors (FETs). The GaGeTe FETs display a p-type behavior with drain current modulation on the order of 103, hole mobility of 0.45 cm2 V−1 s−1, and photoresponsivity of 3.6 A W−1 at room temperature. These findings suggest that the layered GaGeTe is a promising 2D semiconductor for fabricating devices, such as transistors and photodetectors.

Directionally Aligned Amorphous Polymer Chains via Electrohydrodynamic-Jet Printing: Analysis of Morphology and Polymer Field-Effect Transistor Characteristics.

Electrohydrodynamic-jet (EHD-jet) printing provides an opportunity to directly assembled amorphous polymer chains in the printed pattern. Herein, an EHD-jet printed amorphous polymer was employed as the active layer for fabrication of organic field-effect transistors (OFETs). Under optimized conditions, the field-effect mobility (μFET) of the EHD-jet printed OFETs was 5 times higher than the highest μFET observed in the spin-coated OFETs, and this improvement was achieved without the use of complex surface templating or additional pre- or post-deposition processing. As the chain alignment can be affected by the surface energy of the dielectric layer in EHD-jet printed OFETs, dielectric layers with varying wettability were examined. Near-edge X-ray absorption fine structure measurements were performed to compare the amorphous chain alignment in OFET active layers prepared by EHD-jet printing and spin coating.

Ultra-low rate dry etching conditions for fabricating normally-off field effect transistors on AlGaN/GaN heterostructures

Enhancement-mode transistors with uniform turn-on threshold voltage (Vth) can be achieved using low damage and low rate gate recess etching techniques. In this work, dry etching conditions for a AlGaN/GaN heterostructure with an ultra-low etching rate of 1.5 nm/min were demonstrated and we succeeded the possibility to achieve a low etch rate of an AlGaN/GaN heterostructure in a Cl2/BCl3 plasma using inductively coupled plasma (ICP). The etching development was successfully implemented in the achievement of a normally-off GaN/AlGaN based transistor. The optimal recess depth was determined after fabrication of various devices with different recess depth values and with various dry etching conditions and after examining the performances of fabricated devices various conditions, and determining the dependence of recess time. The optimized etching condition resulted in low damage and smooth morphology of the etched AlGaN/GaN surfaces. Fine control of the depth of the gate region recess was achieved for the AlGaN/GaN heterostructure without any etch-stop layer, and validated for the fabrication of field effect transistors (FETs) using conventional processes. The fabricated normally-off Al2O3/AlGaN/GaN MOSFETs delivered a high positive Vth of +5.64 V with a low off-state leakage current of ∼10−7 A/mm and lower current collapse.

Short-channel field-effect transistors with 9-atom and 13-atom wide graphene nanoribbons

Bottom-up synthesized graphene nanoribbons and graphene nanoribbon heterostructures have promising electronic properties for high-performance field-effect transistors and ultra-low power devices such as tunneling field-effect transistors. However, the short length and wide band gap of these graphene nanoribbons have prevented the fabrication of devices with the desired performance and switching behavior. Here, by fabricating short channel (Lch ~ 20 nm) devices with a thin, high-κ gate dielectric and a 9-atom wide (0.95 nm) armchair graphene nanoribbon as the channel material, we demonstrate field-effect transistors with high on-current (Ion > 1 μA at Vd = −1 V) and high Ion/Ioff ~ 105 at room temperature. We find that the performance of these devices is limited by tunneling through the Schottky barrier at the contacts and we observe an increase in the transparency of the barrier by increasing the gate field near the contacts. Our results thus demonstrate successful fabrication of high-performance short-channel field-effect transistors with bottom-up synthesized armchair graphene nanoribbons.

3D assembly of carbon nanotubes for fabrication of field-effect transistors through nanomanipulation and electron-beam-induced deposition

Three-dimensional carbon nanotube field-effect transistors (3D CNTFETs) possess predictable characteristics that rival those of planar CNTFETs and Si-based MOSFETs. However, due to the lack of a reliable assembly technology, they are rarely reported on, despite the amount of attention they receive. To address this problem, we propose the novel concept of a 3D CNTFET and develop its assembly strategy based on nanomanipulation and the electron-beam-induced deposition (EBID) technique inside a scanning electron microscope (SEM). In particular, the electrodes in our transistor design are three metallic cuboids of the same size, and their front, top and back surfaces are all wrapped up in CNTs. The assembly strategy is employed to build the structure through a repeated basic process of pick-up, placement, fixing and cutting of CNTs. The pick-up and placement is performed through one nanomanipulator with four degrees of freedom. Fixing is carried out through the EBID technique so as to improve the mechanical and electrical characteristics of the CNT/electrodes connection. CNT cutting is undertaken using the typical method of electrical breakdown. Experimental results showed that two CNTs were successfully assembled on the front sides of the cubic electrodes. This validates our assembly method for the 3D CNTFET. Also, when contact resistance was measured, tens of kilohms of resistance was observed at the CNT-EBID deposition-FET electrodes junction.. This manifests the electrical reliability of our assembly strategy.

Heavily-Doped SOI with SAM-Based Gate Dielectrics in Application to TMDC FETs

Semiconducting transition metal dichalcogenides (TMDC) have been growing interest for both scientific interest and practical applications because of their various material properties. Potential applications and fundamental understanding in new classes of semiconductor materials motivates the fabrication of field-effect transistors (FETs) that are indispensable for probing of carrier transport properties, accumulation of charge and interfacial phenomena. This paper reports a fabrication and characterization of TMDC FETs with heavily-doped silicon-on-insulator substrate. The silicon processing is sophisticated technology that can be extended to the reliable operation of TMDC FETs with high reproducibility. In this presented approach, the heavily-doped SOI can work as a gate electrode in FETs, while the carrier injection into TMDC layer is possible by preparing overlap structure between gate electrode and source/drain contacts. The effectiveness of our approach was demonstrated through the fabrication and characterization of FETs.P-type SOI(88 nm)/BOX(145 nm) wafer was cleaned with SPM and HF solutions. For heavily-doped n-type SOI (n+ SOI), phosphorus-doped spin-on-glass (SOG) was deposited with spin coating and baked on a hot plate at 180 oC. The substrate was annealed at 1000 oC in N2 for 30 min to perform solid phase diffusion. Then, SOG was removed by 1 % HF for 30min. For heavily-doped p-type SOI (p+ SOI), B+ ions were implanted into SOI layer. Activation was performed at 1000 oC in Ar for 30 min. SOI layer was patterned by chemical dry etching with CF4/O2. Thermal SiO2 was grown by dry oxidation at 900 oC for 10 min. Next, AlOx was deposited by RF sputtering. After contact opening with 1 % HF, Al (20 nm)/TiN (20 nm) were deposited by RF sputtering and lift-off for electrical contact to SOI. The substrates were subjected to annealing in forming gas at 420 oC for 30 min to improve the quality of gate dielectrics and electrical contact of gate pad. Al (10 nm)/Au (40nm) was deposited by thermal evaporation and lift-off for contact electrodes. Subsequently, the substrate was exposed to oxygen plasma to form hydroxyl groups on the surface of AlOx. Then, the substrate was immersed into 2-propanol containing 5 mM n-octadecylphosphonic acid (ODPA) for 6 hours at room temperature. Annealing was conducted at 100 oC in N2 for 30 min to stabilize ODPA. The gate dielectrics consists of hybrid ODPA/AlOx/SiO2. Mechanically exfoliated WS2 was transferred to the substrate with the PDMS elastomer. Finally, devices were annealed in N2 at 150 oC for 30 min to improve source/drain contact.The FET operation was observed for both n+ and p+ SOI gate. The threshold voltage (Vth) was evaluated by linear extrapolation method with the drain current measured as a function of gate voltage at a low drain voltage of 0.05 V. In the case of n+ SOI gate electrode, the Vth of -0.71 V, On/Off ratio of 103～104 and subthreshold slope (SS) of 150 mV/dec were evaluated. On the other hand, the Vth of -0.13 V, On/Off ratio of 103～104 and subthreshold slope (SS) of 107 mV/dec were obtained for p+ SOI gate electrode. The difference in Vth between n+ and p+ SOI gate electrodes is derived from the difference in the Fermi level of SOI. The proposed method is suited for research in electrical characteristics of various TMDC semiconductors.