Extrinsic Base-collector Capacitance Research Articles

Parameter extraction of heterojunction bipolar transistor from low-frequency noise and S-parameter measurements

The extraction of the equivalent circuit parameters for bipolar transistors is undertaken via high-frequency S-parameter and low-frequency noise measurements. The extraction is exhaustively detailed here for a double purpose. First, it highlights the not-so-justified approximations so often made for the extraction of the extrinsic base–collector capacitance. Second, it emphasizes the similarity of the values obtained for series resistances in both the low-frequency and high-frequency ranges.

Interface charge compensation in InP based heterojunction bipolar transistors with implanted subcollectors

We report InP∕In0.53Ga0.47As∕InP double heterojunction bipolar transistors (DHBTs) with implanted subcollectors. We demonstrate the compensation of charge at the regrowth interface by the use of a blanket Fe implant. An isolated N++ subcollector is then formed by a patterned Si implant. With the compensation of the interface charge, this patterned subcollector eliminates the extrinsic base-collector capacitance Ccb associated with the base interconnect pad over the entire range of bias voltages. These implanted subcollector DHBTs with the shallow Fe implant have 363GHz fτ and 410GHz fmax. The dc current gain β∼40, BVceo=4.9V, BVcbo=5.4V, and Icbo<70pA at Vcb=0.3V.

The Effect of Selectively and Fully Ion-Implanted Collector on RF Characteristics of BJT Devices

A selectively ion-implanted collector (SIC) is implemented in a 0.8μm BiCMOS process to improve the RF characteristics of the BJT devices. The SIC BJT device has better f t and f max than the FIC (fully ion-implanted collector) BJT device because the extrinsic base-collector capacitance is reduced by the SIC process. The I t is 7.8 GHz and f max is 9.5 GHz for the SIC BJT device while the f t is 7.2 GHz and f max is 4.5 GHz for the FIC BJT device when biased at V ce =3.6V and J c =0.07 mA/μm 2 . The noise parameters are the same for both BJT devices but the associated gain is higher for the SIC BJT device.

InP double‐hetero bipolar transistor technology for 130 GHz clock speed

Indium Phosphide-based Hetero Bipolar Transistors (HBTs) have shown strong potential for mm-wave power electronics and mixed-mode applications beyond 100 GHz clock speed. We have developed a planar fabrication technology using all dry etched mesas, which scales to 0.25 µm emitter size. Devices show cut-off frequencies of f t = 380 GHz and f max = 380 GHz simultaneously (optimized for highest f max) or f t = 410 GHz and f max = 340 GHz (optimized for f t). As technology test vehicles, we have realized static-by-four divider circuits running at up to 130 GHz with a baseline epitaxial structure yielding f t = 330 GHz and f max = 300 GHz; Voltage-Controlled oscillators fabricated in the 380 GHz technology delivered power output of 0 dBm at 180 GHz. The possibility of reducing the extrinsic base-collector capacitance along with the device height by selective ion-implantation of the subcollector is explored. (© 2006 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)

Approach for determination of extrinsic resistance for equivalent circuit model of metamorphic InP∕InGaAs HBTs

An improved extraction procedure for determination of the extrinsic resistances of metamorphic InP heterojunction bipolar transistors (HBTs) is presented. This method is a combination of the test structure method and an analytical method but it does not require numerical optimisation. The main advantage of this method is that the extrinsic base resistance and the collector resistance can be obtained by using cutoff mode S-parameter measurements. Bias-dependent empirical models for the intrinsic resistance and extrinsic base–collector capacitance over the whole region of operation are also presented. Good agreement is obtained between simulated and measured results for a metamorphic InP HBT with a 5×5 μm2 emitter in the frequency range 50 MHz–40 GHz over a wide range of bias points.

Simple and accurate method to extract intrinsic and extrinsic base-collector capacitance of bipolar transistors

A new analytic method is presented to partition precisely the base-collector capacitance into intrinsic and extrinsic parts in bipolar transistors. It is based on base-resistance extraction measurements and requires only S-parameter measurement. This method has been successfully applied to InP/InGaAs heterojunction bipolar transistors and its accuracy has been assessed.

Method to determine intrinsic and extrinsic base-collector capacitance of HBTs directly from bias-dependent S-parameter data

This letter presents a novel small-signal model extraction procedure which determines intrinsic and extrinsic base-collector capacitance (C/sub bci/ and C/sub bex/, respectively) directly from S-parameter data. The procedure utilizes physical assumptions shout the bias dependence of small-signal parameters. The model is validated on several InGaP/GaAs HBTs with different layouts, and the extraction results are discussed. The small-signal model is physical, produces excellent S-parameter fits, and may be used to derive a compact large-signal model.

A new test structure for extracting extrinsic parameters in double-polysilicon bipolar transistors

A new test structure for parameter extraction is presented and implemented in a double-polysilicon bipolar junction transistor (BJT) process. The test structure is basically a real BJT, but without the intrinsic base. The test structure allows extraction of the base, collector and emitter impedances, and the extrinsic base-collector capacitance.

Si-implanted subcollector heterojunction bipolar transistors

AlGaAs/GaAs n-p-n heterojunction bipolar transistors (HBTs) fabricated using an Si-implant to form the subcollector followed by MOCVD growth of the remaining structure are demonstrated. The common emitter current gain of large test devices is /spl sim/50 at a collector current density of 1.9/spl times/10/sup 3/ A/cm/sup 2/. The base-collector and emitter-base current ideality factors are 1.08 and 1.26, respectively. Co-implantation with Se reduced the subcollector sheet resistance to 13 /spl Omega///spl square/. Patterning of this implanted subcollector results in a significant reduction of extrinsic base-collector capacitance (C/sub hc/).

A semianalytical parameter-extraction procedure for HBT equivalent circuit

A parameter-extraction approach for the heterojunction bipolar transistor (HBT), which combines the analytical approach and empirical optimization procedure, is developed. The extraction techniques for extrinsic base-collector capacitance and pad parasitics are also included in this approach. The cutoff operation of the HBT's is utilized to extract the values of the pad capacitances. An excellent fit between measured and simulated S-parameters in the frequency range of 50 MHz-36 GHz is obtained over a wide range of bias points.

High gain, pulsed power [formula omitted] HBTs

A layout to minimize parasitic elements which reduce the common emitter Heterojunction Bipolar Transistor (HBT) gain and efficiency is described. Layout modifications are based upon consideration of the HBT device model that predicts better performance by reducing feedback elements. Reducing the base contacts size to minimize extrinsic base-collector capacitance, and reducing inductance in the ground connection are the primary paths to better performance. The improvements in small signal and power performance for several HBT variations are described. The changes result in a 320 μm 2 emitter area HBT which operating pulsed at 10 GHz delivers 1.25 W output power with 10.5 dB associated gain and 56% power-added efficiency.

Extraction of the InP/GaInAs heterojunction bipolar transistor small-signal equivalent circuit

An extraction technique for determining the small-signal equivalent circuit model of an InP/GaInAs heterojunction bipolar transistor is presented. The equivalent circuit includes the extrinsic base collector capacitance and extrinsic base resistance. It is clearly indicated which elements are uniquely determined, and which elements are estimated.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Noise modeling of microwave heterojunction bipolar transistors

Analytical expressions of microwave heterojunction bipolar transistors minimum noise figure and noise parameter are reported in this paper. These expressions are derived from a noise model including nonideal junctions, emitter and base resistances and have been compared with measured data obtained on a Si-SiGe HBT. An agreement between theoretical and experimental data was as observed up to 20 GHz for several bias conditions. The limits of the model or the range of validity of the proposed equations have been also examined with the help of an appropriate CAD software. The analysis of the influence of parasitic elements on noise parameters has shown a strong influence of the extrinsic base collector capacitance at microwave frequencies. >

AlGaAs/GaAs Heterojunction Bipolar Transistors with Reduced Base-Collector Capacitance Fabricated Using Selective Metalorganic Chemical Vapor Deposition

Selectively grown AlGaAs/GaAs heterojunction bipolar transistor (HBT) with a reduced base-collector capacitance is proposed and fabricated using selective metalorganic chemical vapor deposition (MOCVD) technique. The proposed HBT features a triangular void over SiO2 stripe. The extrinsic base-collector capacitance is significantly reduced due to the isolation of the extrinsic collector region from the collector metal contact by the void. The DC current-voltage characteristics of the selectively grown HBT are similar to those of the conventional one. However, the microwave performance is improved due to the reduced base-collector capacitance in the selectively grown HBT. For the device with two 3×10 µ m2 emitter fingers, the selectively grown HBT has a maximum oscillation frequency 1.4 times higher than that of the conventional device, and the current gain cutoff frequency f T of 43 GHz and the maximum oscillation frequency f max of 20.5 GHz are obtained.

Application of selective epitaxial silicon and chemo-mechanical polishing to bipolar transistors

Successful demonstration of single-polysilicon bipolar transistors fabricated using selective epitaxial growth (SEG) and chemo-mechanical polishing (CMP) is reported. The pedestal structure made possible by the SEG/CMP process combination results in significantly reduced extrinsic-base collector capacitance. Cut-off frequency (f/sub T/) of devices with emitter stripe width of 1 /spl mu/m, a base width of 110 nm, and a peak base doping of 3/spl times/10/sup 18/ cm/sup -3/ have been observed to improve from 16 GHz to 22 GHz when the extrinsic-base collector overlap is decreased from 1 /spl mu/m to 0.2 /spl mu/m. Leakage current, often a problem for SEG structures, has been reduced to 27 nA/cm/sup 2/ for the area component, and 10 nA/cm for the edge component, by (1) appropriate post-polish processing, including a high-temperature anneal and sacrificial oxidation, (2) aligning the device sidewalls along the direction, and (3) the presence of the pedestal structure. Base-emitter junction nonideality in these transistors has also been investigated. >

The new two-dimensional electron gas base HBT (2DEG-HBT): two-dimensional numerical simulation

The bipolar/FET characteristics of the 2DEG-HBT are analyzed extensively by a two-dimensional numerical simulator based on a drift-diffusion model. For bipolar operations at high collector current densities, it is confirmed that the cutoff frequency f/sub T/ is determined mainly by the collector transit time of holes and by the charging time of the extrinsic base-collector capacitance C/sub bc//sup EXT/. The charging times of the emitter and base regions and the base transit time are shown to be negligible. A high cutoff frequency F/sub T/ (88 GHz) and current gain h/sub FE/

AlGaAs/GaAs heterojunction bipolar transistor circuits with improved high-speed performance

Using a self-aligned base contact process and proton implantation to reduce extrinsic base-collector capacitance, we have improved the high-speed performance of AlGaAs/ GaAs heterojunction bipolar transistor digital circuits. The cutoff frequency of the transistor fT with an emitter width of 2.0 ?m is 45 GHz. NTL ring oscillators have operated at 16.5 ps/gate and CML ring oscillators at 27.6 ps/gate. Frequency dividers (1/4) have operated up to 11 GHz with wafer-probe testing These are record speeds for bipolar circuits.

GaAs/(Ga,Al)As heterojunction bipolar transistors with buried oxygen-implanted isolation layers

A simple self-aligned technique using oxygen implants to reduce the extrinsic base-collector capacitance in GaAs/(Ga,Al)As heterojunction bipolar transistors (HBT's) is described. This technique has been used to achieve nonthreshold logic ring-oscillators with propagation delays down to 30 ps per gate, the lowest reported to date for any bipolar transistor circuit.

On the Determination of the Extrinsic Equivalent Circuit Parameters of Drift Transistors†

ABSTRACT Methods of determining the ‘ effective’ extrinsic base resistance and collector capacitance of alloy-junction and diffused-typo of graded-base transistors are presented. These methods involve measurements of the common-base short-circuit output and input admittances at frequencies much less than the cut-off frequency of the transistor and are particularly suitable for devices where the base contact is made very close to the emitter. Results obtained by these methods and also by previously described methods of determining the extrinsic base resistance are compared for several types of graded base transistor. The validity and accuracy of the approximate equivalent circuit representation of the extrinsic base properties by an ‘ effective ’ constant resistance are discussed.

On the Determination of the Minority Carrier Lifetime in the Base Region of Transistors†

ABSTRACT A method of determining the lifetime of minority earners in the base region of a uniform base transistor is presented. This involves measurement of the base-width modulation parameters and the base transport time, taking into account effects of all extrinsic properties of the transistor. The technique of measurement also leads to a simple method of determining the extrinsic base resistance and collector capacitance.