Data Movement Research Articles

Data Placement Using a Classifier for SLC/QLC Hybrid SSDs

In hybrid SSDs (solid-state drives) consisting of SLC (single-level cell) and QLC (quad-level cell), efficiently using the limited SLC cache space is crucial. In this paper, we present a practical data placement scheme, which determines the placement location of incoming write requests using a lightweight machine-learning model. It leverages information about I/O workload characteristics and SSD status to identify cold data that does not need to be stored in the SLC cache with high accuracy. By strategically bypassing the SLC cache for cold data, our scheme significantly reduces unnecessary data movements between the SLC and QLC regions, improving the overall efficiency of the SSD. Through simulation-based studies using real-world workloads, we demonstrate that our scheme outperforms existing approaches by up to 44%.

Scalability Limitations of Processing-in-Memory using Real System Evaluations

Processing-in-memory (PIM), where the compute is moved closer to the memory or the data, has been widely explored to accelerate emerging workloads. Recently, different PIM-based systems have been announced by memory vendors to minimize data movement and improve performance as well as energy efficiency. One critical component of PIM is the large amount of compute parallelism provided across many PIM "nodes'' or the compute units near the memory. In this work, we provide an extensive evaluation and analysis of real PIM systems based on UPMEM PIM. We show that while there are benefits of PIM, there are also scalability challenges and limitations as the number of PIM nodes increases. In particular, we show how collective communications that are commonly found in many kernels/workloads can be problematic for PIM systems. To evaluate the impact of collective communication in PIM architectures, we provide an in-depth analysis of two workloads on the UPMEM PIM system that utilize representative common collective communication patterns -- AllReduce and All-to-All communication. Specifically, we evaluate 1) embedding tables that are commonly used in recommendation systems that require AllReduce and 2) the Number Theoretic Transform (NTT) kernel which is a critical component of Fully Homomorphic Encryption (FHE) that requires All-to-All communication. We analyze the performance benefits of these workloads and show how they can be efficiently mapped to the PIM architecture through alternative data partitioning. However, since each PIM compute unit can only access its local memory, when communication is necessary between PIM nodes (or remote data is needed), communication between the compute units must be done through the host CPU, thereby severely hampering application performance. To increase the scalability (or applicability) of PIM to future workloads, we make the case for how future PIM architectures need efficient communication or interconnection networks between the PIM nodes that require both hardware and software support.

H3DM: A High-bandwidth High-capacity Hybrid 3D Memory Design for GPUs

Graphics Processing Units (GPUs) are widely used for modern applications with huge data sizes. However, the performance benefit of GPUs is limited by their memory capacity and bandwidth. Although GPU vendors improve memory capacity and bandwidth using 3D memory technology (HBM), many important workloads with terabytes of data still cannot fit in the provided capacity and are bound by the provided bandwidth. With a limited GPU memory capacity, programmers should handle the data movement between GPU and host memories by themselves, causing a significant programming burden. To improve programming ease, GPUs use a unified address space with the host that allows over-subscribing GPU memory, but this approach is not effective in terms of performance once GPUs encounter memory page faults. Many recent works have tried to remedy capacity and bandwidth bottlenecks using dense non-volatile memories (NVMs) and true-3D stacking. However, these works mainly focus on one bottleneck or do not provide a scalable solution that fits future requirements. In this paper, we investigate true-3D stacking of dense, low-power, and refresh-free non-volatile phase change memory (PCM) on top of state-of-the-art GPU configurations to provide higher capacity and bandwidth within the available area and power budget. The higher density and lower power consumption of PCM provide higher capacity through integrating more cells in each 3D layer and enabling stacking more layers. However, we observe that stacking more than six layers of pure-PCM memory violates the thermal constraint and severely harms the performance and power efficiency due to its higher write latency and energy. Further, it degrades the lifetime of GPU to less than one year. Utilizing a hybrid architecture that leverages the benefits of both DRAM and PCM memories has been widely studied by prior proposals; however, true-3D integration of such a hybrid memory architecture especially on top of state-of-the-art powerful GPU architecture has not been investigated yet. We experimentally demonstrate that by covering 80% of write requests in DRAM and eliminating refresh overhead, true-3D stacking of eight 32GB layers of PCM along with two 8GB layers of DRAM is possible resulting in a total of 272GB memory capacity. Based on the explored design requirements, We propose a 3D high-bandwidth high-capacity hybrid memory (H3DM) system utilizing a hybrid-3D (H3D)-aware remapping scheme to reduce expensive PCM writes to under 20% while avoiding DRAM refresh overhead. H3DM improves the performance up to 291% compared to the baseline GPU architecture while remaining within only 3% of an ideal case with DRAM-like access latency, on average. Moreover, by increasing the dataset size above the baseline GPU memory space, H3DM improves performance and power up to 648% and 87% compared to the baseline GPU architecture since it avoids expensive data transfers through off-chip communication links.

Digital Twin Data Management: Framework and Performance Metrics of Cloud-Based ETL System

This study delves into the EA-SAS platform, a digital twin environment developed by our team, with a particular focus on the EA-SAS Cloud Scheduler, our bespoke program designed to optimize ETL (extract, transform, and load) scheduling and thereby enhance automation within industrial systems. We elucidate the architectural intricacies of the EA-SAS Cloud Scheduler, demonstrating its adeptness in efficiently managing computationally heavy tasks, a capability underpinned by our empirical benchmarks. The architecture of the scheduler incorporates Docker to create isolated task environments and leverages RabbitMQ for effective task distribution. Our analysis reveals the EA-SAS Cloud Scheduler’s prowess in maintaining minimal overhead times, even in scenarios characterized by high operational loads, underscoring its potential to markedly bolster operational efficiency in industrial settings. While acknowledging the limitations inherent in our current assessment, particularly in simulating real-world industrial complexities, the study also charts potential future research pathways. These include a thorough exploration of the EA-SAS Cloud Scheduler’s adaptability across diverse industrial scenarios and an examination of the integration challenges associated with its reliance on specific technological frameworks.

An All-digital Compute-in-memory FPGA Architecture for Deep Learning Acceleration

Field Programmable Gate Array (FPGA) is a versatile and programmable hardware platform, which makes it a promising candidate for accelerating Deep Neural Networks (DNNs). However, FPGA’s computing energy efficiency is low due to the domination of energy consumption by interconnect data movement. In this article, we propose an all-digital Compute-in-memory FPGA architecture for deep learning acceleration. Furthermore, we present a bit-serial computing circuit of the Digital CIM core for accelerating vector-matrix multiplication (VMM) operations. A Network-CIM-deployer ( NCIMD ) is also developed to support automatic deployment and mapping of DNN networks. NCIMD provides a user-friendly API of DNN models in Caffe format. Meanwhile, we introduce a Weight-stationary dataflow and describe the method of mapping a single layer of the network to the CIM array in the architecture. We conduct experimental tests on the proposed FPGA architecture in the field of Deep Learning (DL), as well as in non-DL fields, using different architectural layouts and mapping strategies. We also compare the results with the conventional FPGA architecture. The experimental results show that compared to the conventional FPGA architecture, the energy efficiency can achieve a maximum speedup of 16.1×, while the latency can decrease up to 40% in our proposed CIM FPGA architecture.

Network Representation of fMRI Data Using Visibility Graphs: The Impact of Motion and Test-Retest Reliability

Visibility graphs provide a novel approach for analysing time-series data. Graph theoretical analysis of visibility graphs can provide new features for data mining applications in fMRI. However, visibility graphs features have not been used widely in the field of neuroscience. This is likely due to a lack of understanding of their robustness in the presence of noise (e.g., motion) and their test-retest reliability. In this study, we investigated visibility graph properties of fMRI data in the human connectome project (N = 1010) and tested their sensitivity to motion and test-retest reliability. We also characterised the strength of connectivity obtained using degree synchrony of visibility graphs. We found that strong correlation (r > 0.5) between visibility graph properties, such as the number of communities and average degrees, and motion in the fMRI data. The test-retest reliability (Intraclass correlation coefficient (ICC)) of graph theoretical features was high for the average degrees (0.74, 95% CI = [0.73, 0.75]), and moderate for clustering coefficient (0.43, 95% CI = [0.41, 0.44]) and average path length (0.41, 95% CI = [0.38, 0.44]). Functional connectivity between brain regions was measured by correlating the visibility graph degrees. However, the strength of correlation was found to be moderate to low (r < 0.35). These findings suggest that even small movement in fMRI data can strongly influence robustness and reliability of visibility graph features, thus, requiring robust motion correction strategies prior to data analysis. Further studies are necessary for better understanding of the potential application of visibility graph features in fMRI.

Quantitative monitoring of tensile force in post-tensioning systems using piezoelectric wave method

ABSTRACT The tensile force of a post-tensioning system is essential in prestressed concrete structures. Since the tensile force is related to the contact pressure at the interface between the anchor head and the bearing plate, this study utilizes the piezoelectric wave method to quantitatively monitor the reflected wave energy at the interface. A 3D solid element model was developed to simulate the propagation of stress waves in a simplified anchorage system across different contact areas. Three independent tests were conducted on a simplified 2-strand anchorage system, using the reception coefficient as a monitoring index. The empirical fitting formula between the reception coefficient and the load is derived from the loading data and verified using the unloading data. The experimental results demonstrate good monotonicity and stability within the test range. The study also conducted two temperature-based tests to investigate the effect of small temperature variations on the proposed method. The results indicate that temperature fluctuations of less than 20°C have little effect on the test method. Then, the proposed method is applied to a real 2-strand anchorage system in a concrete beam. The proposed method serves as a reference for quantitatively monitoring the prestressing force of a post-tensioning system.

Transfer-Free Analog and Digital Flexible Memristors Based on Boron Nitride Films.

The traditional von Neumann architecture of computers, constrained by the inherent separation of processing and memory units, faces challenges, for instance, memory wall issue. Neuromorphic computing and in-memory computing offer promising paradigms to overcome the limitations of additional data movement and to enhance computational efficiency. In this work, transfer-free flexible memristors based on hexagonal boron nitride films were proposed for analog neuromorphic and digital memcomputing. Analog memristors were prepared; they exhibited synaptic behaviors, including paired-pulse facilitation and long-term potentiation/depression. The resistive switching mechanism of the analog memristors were investigated through transmission electron microscopy. Digital memristors were prepared by altering the electrode materials, and they exhibited reliable device performance, including a large on/off ratio (up to 106), reproducible switching endurance (>100 cycles), non-volatile characteristic (>60 min), and effective operating under bending conditions (>100 times).

A Model for Enhancing Unstructured Big Data Warehouse Execution Time

Traditional data warehouses (DWs) have played a key role in business intelligence and decision support systems. However, the rapid growth of the data generated by the current applications requires new data warehousing systems. In big data, it is important to adapt the existing warehouse systems to overcome new issues and limitations. The main drawbacks of traditional Extract–Transform–Load (ETL) are that a huge amount of data cannot be processed over ETL and that the execution time is very high when the data are unstructured. This paper focuses on a new model consisting of four layers: Extract–Clean–Load–Transform (ECLT), designed for processing unstructured big data, with specific emphasis on text. The model aims to reduce execution time through experimental procedures. ECLT is applied and tested using Spark, which is a framework employed in Python. Finally, this paper compares the execution time of ECLT with different models by applying two datasets. Experimental results showed that for a data size of 1 TB, the execution time of ECLT is 41.8 s. When the data size increases to 1 million articles, the execution time is 119.6 s. These findings demonstrate that ECLT outperforms ETL, ELT, DELT, ELTL, and ELTA in terms of execution time.

RCT: Resource Constrained Training for Edge AI.

Efficient neural network training is essential for in situ training of edge artificial intelligence (AI) and carbon footprint reduction in general. Train neural network on the edge is challenging because there is a large gap between limited resources on edge and the resource requirement of current training methods. Existing training methods are based on the assumption that the underlying computing infrastructure has sufficient memory and energy supplies. These methods involve two copies of the model parameters, which is usually beyond the capacity of on-chip memory in processors. The data movement between off-chip and on-chip memory incurs large amounts of energy. We propose resource constrained training (RCT) to realize resource-efficient training for edge devices and servers. RCT only keeps a quantized model throughout the training so that the memory requirement for model parameters in training is reduced. It adjusts per-layer bitwidth dynamically to save energy when a model can learn effectively with lower precision. We carry out experiments with representative models and tasks in image classification, natural language processing, and crowd counting applications. Experiments show that on average, 8-15-bit weight update is sufficient for achieving SOTA performance in these applications. RCT saves 63.5%-80% memory for model parameters and saves more energy for communications. Through experiments, we observe that the common practice on the first/last layer in model compression does not apply to efficient training. Also, interestingly, the more challenging a dataset is, the lower bitwidth is required for efficient training.

ADC-Free ReRAM-Based In-Situ Accelerator for Energy-Efficient Binary Neural Networks

With the ever-increasing parameter size of deep learning models, conventional ASIC-based accelerators in mobile environments suffer from low energy budget due to limited memory capacity and frequent data movements. Binary neural networks (BNNs) deployed in ReRAM-based in-situ accelerators provide a promising solution, and various related architectures have been proposed recently. However, their performances are largely compromised by the tremendous cost of domain conversion via analog-to-digital converters (ADCs), essential for mixed-signal processing in ReRAM. This paper identifies two root causes of the need for such ADCs and proposes effective solutions to address them. First, we minimize redundant operations in BNNs and reduce the number of ReRAM arrays with ADCs approximately by half. We also propose a partial-sum range adjustment technique based on a layer remapping to deal with the remaining ADCs. Proper handling of the partial-sum distribution allows ReRAM-based in-situ processing without domain conversion, completely bypassing the need for ADCs. Experimental results show that the proposed architecture achieves a 3.44x speedup and 91.5% energy savings, making it an attractive solution for on-device AI at the edge.

FreshGNN: Reducing Memory Access via Stable Historical Embeddings for Graph Neural Network Training

A key performance bottleneck when training graph neural network (GNN) models on large, real-world graphs is loading node features onto a GPU. Due to limited GPU memory, expensive data movement is necessary to facilitate the storage of these features on alternative devices with slower access (e.g. CPU memory). Moreover, the irregularity of graph structures contributes to poor data locality which further exacerbates the problem. Consequently, existing frameworks capable of efficiently training large GNN models usually incur a significant accuracy degradation because of the currently-available shortcuts involved. To address these limitations, we instead propose FreshGNN, a general-purpose GNN mini-batch training framework that leverages a historical cache for storing and reusing GNN node embeddings instead of re-computing them through fetching raw features at every iteration. Critical to its success, the corresponding cache policy is designed, using a combination of gradient-based and staleness criteria, to selectively screen those embeddings which are relatively stable and can be cached, from those that need to be re-computed to reduce estimation errors and subsequent downstream accuracy loss. When paired with complementary system enhancements to support this selective historical cache, FreshGNN is able to accelerate the training speed on large graph datasets such as ogbn-papers100M and MAG240M by 3.4× up to 20.5× and reduce the memory access by 59%, with less than 1% influence on test accuracy.

The Influence of the Variation in Arch Height of the Main Tayan Bridge on the Member Forces

The height of the bridge arch significantly impacts the strength and structural efficiency. Research on the height of the Tayan Bridge arch was conducted to determine the values and behaviour of member forces, structural weight, and deflection and to design the optimal arch height geometry. This research involved five variations of the arch height. The bridge structure was modelled using AutoCAD software. Relevant bridge loading data based on the SNI 1725-2016 standard was inputted into AutoCAD for structural design, and then the structure was modelled and analysed using SAP2000. The analysis results provided information on the bridge weight, deflection, and member forces. The analysis results were then compared with the bridge arch height, and this comparison was presented in the form of graphs. From the analysis results, it can be concluded that the bridge arch height has a positive linear relationship with the bridge weight. Tensile and compressive forces exhibit opposite behaviour. Increasing the arch height with constant value results in weight, deflection, and member force variations. Constantly expanding the arch height also does not lead to an increase in the stiffness of the bridge. Structurally, the optimal arch height is 42.134 meters.

Enhancing Urban Resilience: Smart City Data Analyses, Forecasts, and Digital Twin Techniques at the Neighborhood Level

Smart cities, leveraging advanced data analytics, predictive models, and digital twin techniques, offer a transformative model for sustainable urban development. Predictive analytics is critical to proactive planning, enabling cities to adapt to evolving challenges. Concurrently, digital twin techniques provide a virtual replica of the urban environment, fostering real-time monitoring, simulation, and analysis of urban systems. This study underscores the significance of real-time monitoring, simulation, and analysis of urban systems to support test scenarios that identify bottlenecks and enhance smart city efficiency. This paper delves into the crucial roles of citizen report analytics, prediction, and digital twin technologies at the neighborhood level. The study integrates extract, transform, load (ETL) processes, artificial intelligence (AI) techniques, and a digital twin methodology to process and interpret urban data streams derived from citizen interactions with the city’s coordinate-based problem mapping platform. Using an interactive GeoDataFrame within the digital twin methodology, dynamic entities facilitate simulations based on various scenarios, allowing users to visualize, analyze, and predict the response of the urban system at the neighborhood level. This approach reveals antecedent and predictive patterns, trends, and correlations at the physical level of each city area, leading to improvements in urban functionality, resilience, and resident quality of life.

Differential Interaction: Development of Cross-border Data Flow Governance Mechanisms In Asean

Cross-border data flows, which are fueled by the digital economy, increase the productivity and efficiency of the global economy. The cross-border movement of data has a direct influence on both national security and the growth of the digital economy.Therefore, in order to deal with the security and development issues brought on by the digital geopolitical game, on the one hand, ASEAN focuses on the overall growth of the digital economy and data security,on the other hand, it continues to encourage the spread of the innovative "ASEAN+" governance model and actively participates in the creation of regulations for the digital world. The digital geostrategic competition between large nations is skillfully employed, on the other hand, to aim for a more advantageous position in order to mitigate the negative impacts brought on by mechanism fragmentation. A governance mechanism for cross-border data flow is built using the relational governance concept of “self” and “other” interaction.The negotiating cost and compliance cost will be decreased through the adaptable interplay between mechanism spillover and mechanism internalization, expanding the digital economy in the ASEAN region and enhancing competitive advantages on a worldwide scale.

Towards Energy-Efficient Spiking Neural Networks: A Robust Hybrid CMOS-Memristive Accelerator

Spiking Neural Networks (SNNs) are energy-efficient artificial neural network models that can carry out data-intensive applications. Energy consumption, latency, and memory bottleneck are some of the major issues that arise in machine learning applications due to their data-demanding nature. Memristor-enabled Computing-In-Memory (CIM) architectures have been able to tackle the memory wall issue, eliminating the energy and time-consuming movement of data. In this work we develop a scalable CIM-based SNN architecture with our fabricated two-layer memristor crossbar array. In addition to having an enhanced heat dissipation capability, our memristor exhibits substantial enhancement of 10% to 66% in design area, power and latency compared to state-of-the-art memristors. This design incorporates an inter-spike interval (ISI) encoding scheme due to its high information density to convert the incoming input signals into spikes. Furthermore, we include a time-to-first-spike (TTFS) based output processing stage for its energy-efficiency to carry out the final classification. With the combination of ISI, CIM and TTFS, this network has a competitive inference speed of 2μs/image and can successfully classify handwritten digits with 2.9mW of power and 2.51pJ energy per spike. The proposed architecture with the ISI encoding scheme can achieve ∼10% higher accuracy than those of other encoding schemes in the MNIST dataset.

3D Cadastral Database Systems—A Systematic Literature Review

Cadastral databases have been used for over 20 years, but most contain 2D data. The increasing presence of high-rise buildings with modern architecture complicates the process of determining property rights, restrictions, and responsibilities. It is, therefore, necessary to develop an efficient system for storing and managing multidimensional cadastral data. While there have been attempts to develop 3D cadastral database schemas, a comprehensive solution that meets all the requirements for effective data storage, manipulation, and retrieval has not yet been presented. This study aims to analyse the literature on 3D cadastral databases to identify approaches and technologies for storing and managing these data. Based on a systematic literature review integrated with a snowballing methodology, 108 documents were identified. During the analysis of the related documents, different parameters were extracted, including the conceptual data model, query type, and evaluation metrics, as well as the database management system (DBMS) used and technologies for visualisation, data preparation, data transformation, and the ETL (extract, transform, and load) process. The study emphasised the importance of adhering to database design principles and identified challenges associated with conceptual design, DBMS selection, logical design, and physical design. The study results provide insights for selecting the appropriate standards, technologies, and DBMSs for designing a 3D cadastral database system.

The need for proper archiving and referencing of sound recordings in taxonomic studies of birds

Abstract A survey of recent taxonomic studies of birds that included acoustic trait analyses reveals that most studies have not archived the sound recordings that support their conclusions, despite the current availability of online, publicly available collections of bird sounds. In addition, bird sound recordings have often been cited without unique accession numbers that permit unambiguous sample identification and in considerably less detail than other types of samples, such as museum specimens or genetic samples. Both this lack of data openness and the way acoustic samples have been cited undermine the methodological rigor that otherwise characterizes many of these studies, and much invaluable biological data are likely to be lost over time if bird sound recordings are not archived in long-term collections. I suggest that these problems can be easily addressed by embracing the open data movement and adopting some best practices that are widely used in other fields. Just as study skins and DNA sequences are required to be deposited in publicly available collections such as natural history museums and the GenBank, respectively, sound recordings used in taxonomic studies with acoustic trait analyses should be archived in publicly available collections as a condition for publication of associated results. Authors of taxonomic studies involving sounds should archive their sound recordings and provide unique accession numbers for sound recordings examined, and journals and reviewers should ensure that authors have done so. By embracing the open data movement, research studying avian acoustic signals is expected to become more transparent, reproducible, and useful.

LEONARDO

A new pre-exascale computer cluster has been designed to foster scientific progress and competitive innovation across European research systems, it is called LEONARDO. This paper describes thegeneral architecture of the system and focuses on the technologies adopted for its GPU-accelerated partition. High density processing elements, fast data movement capabilities and mature software stack collections allow the machine to run intensive workloads in a flexible and scalable way. Scientific applications from traditional High Performance Computing (HPC) as well as emerging Artificial Intelligence (AI) domains can benefit from this large apparatus in terms of time and energy to solution.

An efficient hybrid optimization of ETL process in data warehouse of cloud architecture

In big data, analysis data is collected from different sources in various formats, transforming into the aspect of cleansing the data, customization, and loading it into a Data Warehouse. Extracting data in other formats and transforming it to the required format requires transformation algorithms. This transformation stage has redundancy issues and is stored across any location in the data warehouse, which increases computation costs. The main issues in big data ETL are handling high-dimensional data and maintaining similar data for effective data warehouse usage. Therefore, Extract, Transform, Load (ETL) plays a vital role in extracting meaningful information from the data warehouse and trying to retain the users. This paper proposes hybrid optimization of Swarm Intelligence with a tabu search algorithm for handling big data in a cloud-based architecture-based ETL process. This proposed work overcomes many issues related to complex data storage and retrieval in the data warehouse. Swarm Intelligence algorithms can overcome problems like high dimensional data, dynamical change of huge data and cost optimization in the transformation stage. In this work for the swarm intelligence algorithm, a Grey-Wolf Optimizer (GWO) is implemented to reduce the high dimensionality of data. Tabu Search (TS) is used for clustering the relevant data as a group. Clustering means the segregation of relevant data accurately from the data warehouse. The cluster size in the ETL process can be optimized by the proposed work of (GWO-TS). Therefore, the huge data in the warehouse can be processed within an expected latency.