Surface Of Epitaxial Layer Research Articles

Effect of TCS gas flow and pre-etching on homopitaxial growth of 4H-SiC.

In this study, the epitaxial growth of 6-inch n-type 4° off-axis Si-face substrates using a horizontal hot-wall LPCVD system was investigated. The study explored the epitaxial growth under different source gas flow rates, growth pressures, and pre-etching times, with particular emphasis on their effects on epitaxial growth rate, epitaxial layer thickness uniformity, doping concentration and uniformity, and epitaxial layer surface roughness. The observation was made that the increase in source gas flow rate led to variations in dopant concentration due to different transport models between nitrogen gas and source gas. Additionally, with the increase in etching time, overetching phenomena occurred, resulting in changes in both dopant concentration and uniformity. Furthermore, the relationships between these three factors and their corresponding indicators were explained by combining the CVD growth process with the laminar flow model. These observed patterns are beneficial for further optimizing growth conditions in industrial settings, ultimately enhancing the quality of the growth process.

SrTiO3 Epitaxially Protected Si-Photocathode for Photoelectrochemical Water Splitting

Although silicon has been demonstrated to be one of the best photoelectrochemical (PEC) substrate materials thanks to its low cost, mature manufacturing technique, and high theoretical photovoltage and saturation current density [1], the development of robust Si-based PEC device has remained an existing challenge due to the fact that it is very easily susceptible to (photo)corrosion under PEC operational conditions [2]. Therefore, a suitable protective layer over the Si substrate which is able to simultaneously provide the corrosion resistance and retain a highly efficient charge transfer across the photoelectrode device is highly desired [3].To this end, we prepared high-quality SrTiO3 (STO) layer to passivate p-Si substrate via the mediation of an epitaxial enabler reduced graphene oxide (rGO) using the pulsed laser deposition (PLD) technique. STO layers with different thicknesses were prepared on both rGO-buffered and bare Si substrates to investigate the effects of epitaxy and charge carrier migration distance on the PEC performance. It was realized that very thin (3.9 nm ~ 10 unit cells) STO layer epitaxially overgrown on rGO-buffered Si showed the highest onset potential (0.326 V vs RHE, defined as potential at -0.1 mA cm-2) than the counterparts with thicker and/or non-epitaxial STO. The photovoltage and flat-band potential analyses, and the electrochemical impedance spectroscopy measurements showed that the epitaxial protected photocathode was more beneficial for charge separation, charge transfer, and the targeted redox reaction (hydrogen evolution reaction in this case) than the non-epitaxial one. The STO/rGO/Si with a smooth and highly epitaxial STO layer outperforming the direct contacted STO/Si with textured and polycrystalline STO layer underscored the importance of having well-defined passivation layer. In addition to that, numerous pinholes formed in STO/Si attributable to highly energetic bombardment process in the PLD deposition led to a rapid degradation of photocathode during PEC measurements, possibly because the electrolyte could easily penetrate into the film and consequently corrode the substrate. Single-oriented STO realized by rGO-buffered substrate potentially rendered easier path for charge migration, and the thinnest STO layer provided the shortest transportation route while maintained the robust protection ability. Polycrystalline STO in direct contacted STO/Si however presented more recombination sites which eventually impaired the PEC performance. Smooth surface of high-quality epitaxial STO layer with sub-nano roughness demonstrated to be a pivotal factor in remotely protecting underlying p-Si substrate from corrosion, while the presence of pinholes in non-epitaxial sample showed a similar degradation rate as bare Si substrate which was without any protection. We also studied the capability of STO layer in protecting underlying Si substrate from corrosion, and the long-term stability tests demonstrated the robustness of epitaxial STO layer-coated photocathode in comparison to bare Si.We demonstrated that STO layer overgrown on Si buffered with few-layer epitaxy enabler rGO could promote charge carrier transfer across the photocathode and lead to better PEC performance. Through a series of in-situ and ex-situ characterizations we verified that the addition of rGO layer could significantly alter the STO layer crystallinity and thin film morphology and, most importantly, enhance the stability of Si photocathode with only 10 unit cells layer. This study reported a facile approach for preparing a robust protection layer over photoelectrode substrate in realizing efficient and at the same time durable PEC device. Acknowledgement: This study was supported by Slovenian Research Agency (Project No. N2-0187) and the Czech Science Foundation (Project No. 21-20110K). We also thank the supports from Mr. Damjan Vengust in electron microscope observations, Mr. Jožko Fišer in Pt thin film preparation, Dr. Vasko Jovanovski in discussion of electrochemical measurements.

Structural investigation of triangular defects in 4H-SiC epitaxial layers as nucleation source for bar shaped stacking faults (BSSFs)

The formation of recombination-induced bar shaped stacking faults (BSSFs) during forward voltage operation of SiC devices, can lead to increased voltage drop and enhanced device degradation. In this study, a triangular epitaxial defect is identified as a nucleation source for the growth of BSSF in forward-biased 4H-SiC p-n diode test structures. We performed low and high voltage current emission microscopy measurements in order to detect the position of BSSFs in the active area of the device and in-depth structural analysis to locate their nucleation source. It was found that basal plane dislocations that converted into threading screw dislocations, close to the surface of the epitaxial layer and included in the triangular defect, act as nucleation source for the BSSFs. Those BSSFs expand from the top towards the bottom of the epitaxial layer, which is a newly reported expansion mechanism compared to the already reported BSSFs growing from the substrate/epitaxial layer interface towards the epitaxial layer surface.

Surface-oxide-controlled InGaAs/InAlAs inverted-type metal-oxide-semiconductor high electron mobility transistors for sub-THz high-power amplifiers

Herein, we successfully improved the maximum oscillation frequency and maximum stable gain (MSG) across a wide bias range of surface-oxide-controlled (SOC) InGaAs/InAlAs inverted-type metal-oxide-semiconductor high-electron-mobility transistors (inverted MOS-HEMTs) by reducing the gate leakage current and drain conductance (g d). H2O vapor treatment selectively decreased the narrow band gap indium oxide at the surface of the In-based epitaxial layer via the SOC process before the gate oxide deposition. Furthermore, the calculation of band profiles indicated that the gd reduction was possibly attributed to the suppression of impact ionization in the InGaAs channel by inverted MOS-HEMTs. Consequently, SOC-inverted MOS-HEMTs demonstrated a high MSG of >12 dB at 100 GHz across a wide bias range.

Study on the Surface Structure of N-Doped 4H-SiC Homoepitaxial Layer Dependence on the Growth Temperature and C/Si Ratio Deposited by CVD

The quality of the N-doped 4H-SiC homoepitaxial layers grown via hot-wall horizontal chemical vapor deposition (CVD) was evaluated at various C/Si ratios (1.0–1.2) and growth temperatures (1570–1630 °C). The microstructure and morphology of the epilayers were studied through a comparative analysis of the AFM patterns under different growth conditions. X-ray photoelectron spectroscopy and Raman spectroscopy revealed the quality of the 4H-SiC epilayers and the amount of N-doping. It was found that an increase in the C/Si ratio enabled obtaining a quite smooth epitaxial layer surface. Moreover, only the 4H-SiC crystal type was distinguished in the epilayers. In addition, the epitaxial quality was gradually improved, and the amount of defect-related C-C bonds significantly dropped from 38.7% to 17.4% as the N doping content decreased from 35.3% to 28.0%. An increase in the growth temperature made the epitaxial layer surface smoother (the corresponding RMS value was ~0.186 nm). According to the Raman spectroscopy data, the 4H-SiC forbidden mode E1(TO) in the epilayers was curbed at a higher C/Si ratio and growth temperature, obtaining a significant enhancement in epitaxial quality. At the same time, more N dopants were inserted into the epilayers with increasing temperature, which was opposite to increasing the C/Si ratio. This work definitively shows that the increase in the C/Si ratio and growth temperature can directly enhance the quality of the 4H-SiC epilayers and pave the way for their large-scale fabrication in high-power semiconductor devices.

2-D Photo-Thermal Distribution and Structures of Flip-Chip Mini Light-Emitting Diodes by Microscopic Hyperspectral Imaging

Given the growing interest in micro-scale thermal management of mini- and micro-light-emitting diodes (LEDs), it’s crucial to develop an effective two-dimensional (2D) junction temperature measurement method. In this paper, the microscopic hyperspectral imaging (μ-HSI) technique has been proposed to probe the 2D photo-thermal distribution of the flip-chip mini-LEDs. Running on a two-axis rotating platform, μ-HSI is able to directly focus on the epitaxial layer surface (episurface) and lateral side of the LED chips to acquire their 2D spectral distributions. Subsequently, the full width at half maximum matrix was extracted to deduce the 2D junction temperature distributions. As a result, the location and temperature distribution of the active layer, i.e., PN junction, can be determined accurately. The mean temperature of the episurface approximately matches that of the active layer. The Raman shift method was applied to verify the accuracy of the μ-HSI technique. In addition, the extra fine structures as well as temperature distributions of the interface between the episurface and sapphire or electrodes are distinguished and analyzed by this technique. This work offers an effective tool for the quality improvement and thermal management of mini-LEDs.

(Digital Presentation) Study on the Electrical Characteristics and Band Diagrams of Ga2O3 MOS Gate Stacks

β-Ga2O3 is expected as one of the candidate materials for high-efficient and cost-effective power devices for high-voltage applications [1]. For the fabrication of MOSFETs the understanding of band diagrams of MOS structure is inevitably important. However, the previous reports on band alignments of β-Ga2O3 and various dielectrics including Al2O3 and SiO2 are controversial with significant inconsistencies in their values [2]. Since the ideal band diagram referring to the vacuum level is not clarified we cannot tell the Fermi level of β-Ga2O3 and the flat-band voltage (Vfb) shift of MOS capacitors. In this study we fabricated MOS structures and its band diagram was investigated from photoelectron spectroscopy.We employed SiO2 as the gate dielectric. Single crystalline β-Ga2O3 (001) wafers with ~2×1016 cm-3 n-type doped epitaxial layers were cleaned in diluted HF solution. Then SiO2 films were deposited by electron-beam evaporation of Si in O2 ambient of ~1×10-2 Pa, followed by post-deposition annealing (PDA) in 1 atm-O2 at various temperatures. Au was evaporated as gate electrode to form MOS capacitors. Ultraviolet photoelectron spectroscopy (UPS) was conducted to determine the energy level of the valence band edge on the surface of β-Ga2O3 epitaxial layer referring to the vacuum level. The valence band spectrum of ~4nm-thick SiO2/β-Ga2O3 was also investigated by x-ray photoelectron spectroscopy to determine the valence band offset at the interface.From C-V characteristics of MOS capacitors with different PDA conditions, the higher PDA temperature was found to be beneficial to achieve nearly-ideal C-V characteristics. A negligibly-small hysteresis was obtained for the one fabricated with O2-PDA at 1000℃ [3]. The energy profiles of interface state density (Dit) were determined by conductance method for the samples of different PDA conditions. The values of Dit decreased for higher PDA temperature down to ~1010 cm-3 at the energy level of EC−0.2 eV [3]. These values are significantly lower than typically reported ones for ALD-Al2O3 MOS structures on β-Ga2O3 [4]. The additional annealing at low temperature at 400℃ works for the further reduction of hysteresis to less than 1 mV/nm.Next the band diagrams of the MOS structures were investigated. From the UPS spectra we could deduce the energy level of valence band edge referring to the vacuum level, from the difference between minimum (cut-off) and maximum edges of the obtained kinetic energy spectra of photoelectrons. We also evaluated the valence band offset from the deconvolution of the valence band XPS of thin SiO2/β-Ga2O3 stack. From the energy edge difference between the deconvoluted spectra corresponding to SiO2 and Ga2O3, respectively, the valence band offset ~1.1 eV was deduced, which is not conflicting with the estimated valence band edge energy of Ga2O3 and the well-reported valence band edge energy of SiO2. The conduction band edge energy was also estimated assuming the bandgap of β-Ga2O3 (4.7eV) [1]. Considering the Fermi-level of β-Ga2O3 with n-type doping of ~2×1016 cm-3 was approximated to be ~0.1 eV from the conduction band edge, the Fermi-level on the surface of β-Ga2O3 epitaxial layer after 1000℃ O2 annealing was estimated to be 3.6-3.7eV below the vacuum level [5]. Note that this value would be significantly smaller than the one simply estimated from the previously reported electron affinity of Ga2O3 [6].Finally the Vfb shifts were investigated for the MOS capacitors fabricated with O2 annealing at 1000℃ with various thicknesses, referring to the ideal flat-band voltage determined with the Fermi-level of β-Ga2O3 as discussed above and the work function of Au electrode which was also determined with UPS measurement. As a result, we found the most of the Vfb values were around the ideal flat-band voltage irrespective of the film thickness from 20 to 60 nm, which indicates a small density of fixed charges <2×1011 cm-2 [5].In conclusion, we found that SiO2/β-Ga2O3 (001) MOS capacitors showed nearly-ideal electrical characteristics with small fixed charge density by applying O2-PDA at 1000℃. The band diagram for the MOS stacks referring to the vacuum level was clarified by photoelectron spectroscopy, which enables us to understand the β-Ga2O3 MOS interface properties correctly.

Investigation on Step-Bunched Homoepitaxial Layers Grown on On-Axis 4H-SiC Substrates via Molten KOH Etching

Wafer-scale on-axis 4H-SiC epitaxial layers with very low roughness were obtained in this study. By performing carbon-rich hydrogen etching and epitaxial growth of the epitaxial layer at different temperatures, local mirror regions (LMRs) with root mean square (RMS) roughness less than 0.2 nm were obtained on the epitaxial layer surface. The LMRs’ length is tens of millimeters, and the width is sub-millimeters. The step-flow growth induced by threading screw dislocations (TSDs) was observed on the epitaxial layer surface by atomic force microscopy (AFM), together with the double bi-atomic step-flow growth induced by the step bunch, which was the cause of LMRs. Furthermore, the growth mechanism was investigated by wet etching. The etching pits were found to be associated with 3C-SiC and their effect on the growth rate of epitaxial layers was further explored.

Tailoring Wettability Properties of GaN Epitaxial Layers through Surface Porosity Induced during CVD Deposition.

Porous GaN epitaxial layers were prepared using single-step chemical vapor deposition (CVD) through the direct reaction of ammonia with gallium. The degree of porosity and pore diameters in the resulting GaN were analyzed by means of SEM and AFM and were found to depend on the GaN deposition time. Furthermore, the evolution of the contact angle of a droplet of water located on the surface of these GaN epitaxial layers with the deposition time was investigated. We observe a transition from the hydrophilic regime to the hydrophobic regime for deposition times longer than 15 min. The observed dependence of GaN hydrophobicity on its degree of porosity is discussed and explained in the framework of the Cassie–Baxter model.

Growth defects in GeSn/Ge/Si(001) epitaxial layers grown by hot wire chemical vapor deposition of Ge with co-evaporation of Sn

We report on the investigation of the growth defect formation in the GeSn/Ge/Si(001) epitaxial layers grown by hot wire chemical vapor deposition of Ge with simultaneous co-evaporation of Sn from an effusion cell. The nucleation of α-Sn nanoinclusions in the course of the growth process was found to be the main mechanism of elastic strain relaxation in the Ge1-xSnx epitaxial layers at x>2.5% as opposed to the misfit dislocation formation at the GeSn/Ge interfaces. Also, β-Sn nanoislands nucleating on the surface of the GeSn epitaxial layers with increased Sn concentration due to Sn segregation were identified by confocal Raman microscopy.

The dependence of surface morphology on the growth temperature of the Pb0.7Sn0.3Te/Si(111) topological insulator thin films

The possibility of epitaxial growth of Pb0.7Sn0.3Te crystalline topological insulator films on the Si(111) surface was shown and epitaxial relations were found. It was shown that, depending on the growth temperature, it is possible to control not only the character of the morphology, but also, to a significant extent, the smoothness of the epitaxial layer surface, which is extremely important for further transport measurements of the films. Analysis of the grown films surface morphology made it possible to establish the average value of the height and lateral size of the terraces and islands forming Pb0.7Sn0.3Te surface.

Influence of pulsed Al deposition on quality of Al-rich Al(Ga)N structures grown by molecular beam epitaxy

Surfaces of AlN epitaxial layers grown by molecular beam epitaxy (MBE) in continuous mode were analyzed by means of X-ray photoelectron spectroscopy, atomic force microscopy and reflection high-energy electron diffraction without breaking the ultra-high vacuum. Our studies show the presence of the Al-Al and N-N bonds on the AlN samples, as well as a rather rough 3D-like structure. Significant improvement of the surface quality was achieved by employing a low flux Al deposition in pulsed mode at the end of the MBE growth (still under a nitrogen background pressure). Subsequently, on the obtained AlN buffer layers, Al0.85Ga0.15N/GaN multiple quantum wells (MQWs) were grown to show the influence of the buffer layers quality on the entire structure properties. The photoluminescence studies indicate that the introduction of pulsed low flux Al deposition improves optical properties of the grown MQWs layers, i.e., the relative intensity between the QW emission and the low energy emission is clearly in favor of pulsed Al deposition.

Epitaxial Nickel Ferrocyanide Stabilizes Jahn-Teller Distortions of Manganese Ferrocyanide for Sodium-Ion Batteries.

Manganese-based Prussian Blue, Na2-δ Mn[Fe(CN)6 ] (MnPB), is a good candidate for sodium-ion battery cathode materials due to its high capacity. However, it suffers from severe capacity decay during battery cycling due to the destabilizing Jahn-Teller distortions it undergoes as Mn2+ is oxidized to Mn3+ . Herein, the structure is stabilized by a thin epitaxial surface layer of nickel-based Prussian Blue (Na2-δ Ni[Fe(CN)6 ]). The one-pot synthesis relies on a chelating agent with an unequal affinity for Mn2+ and Ni2+ ions, which prevents Ni2+ from reacting until the Mn2+ is consumed. This is a new and simpler synthesis of core-shell materials, which usually needs several steps. The material has an electrochemical capacity of 93 mA h g-1 , of which it retains 96 % after 500 charge-discharge cycles (vs. 37 % for MnPB). Its rate capability is also remarkable: at 4 A g-1 (ca. 55 C) it can reversibly store 70 mA h g-1 , which is also reflected in its diffusion coefficient of ca. 10-8 cm2 s-1 . The epitaxial outer layer appears to exert an anisotropic strain on the inner layer, preventing the Jahn-Teller distortions it normally undergoes during de-sodiation.

Epitaxial Nickel Ferrocyanide Stabilizes Jahn–Teller Distortions of Manganese Ferrocyanide for Sodium‐Ion Batteries

AbstractManganese‐based Prussian Blue, Na2−δMn[Fe(CN)6] (MnPB), is a good candidate for sodium‐ion battery cathode materials due to its high capacity. However, it suffers from severe capacity decay during battery cycling due to the destabilizing Jahn–Teller distortions it undergoes as Mn2+ is oxidized to Mn3+. Herein, the structure is stabilized by a thin epitaxial surface layer of nickel‐based Prussian Blue (Na2−δNi[Fe(CN)6]). The one‐pot synthesis relies on a chelating agent with an unequal affinity for Mn2+ and Ni2+ ions, which prevents Ni2+ from reacting until the Mn2+ is consumed. This is a new and simpler synthesis of core–shell materials, which usually needs several steps. The material has an electrochemical capacity of 93 mA h g−1, of which it retains 96 % after 500 charge–discharge cycles (vs. 37 % for MnPB). Its rate capability is also remarkable: at 4 A g−1 (ca. 55 C) it can reversibly store 70 mA h g−1, which is also reflected in its diffusion coefficient of ca. 10−8 cm2 s−1. The epitaxial outer layer appears to exert an anisotropic strain on the inner layer, preventing the Jahn–Teller distortions it normally undergoes during de‐sodiation.

Получение атомарно-чистых и структурно-упорядоченных поверхностей эпитаксиальных пленок CdTe для последующей эпитаксии

In this work, atomically clean and structurally ordered surface of CdTe epitaxial layer after storage in air by treatment in isopropyl alcohol saturated with vapors of hydrochloric acid, and further temperature heating in an ultrahigh vacuum, was obtained. CdTe surface chemical treatment results in the removal of native oxides and surface enrichment with elemental tellurium. Heating in vacuum leads to the tellurium desorption and the appearance of a Te-stabilized CdTe surface. During heating in vacuum, two stages of surface state change are observed (~125°С and ≤250°С). At Т&gt;250°С, elemental tellurium is desorbed and a Te-stabilized structure (1x1) CdTe(013) is formed.

Effect of the Al content in the substrate on the In nanodroplets growth by droplet epitaxy

The paper presents the results of an experimental study of the effect of Al content in the epitaxial surface layer on the growth of In nanostructures formed by droplet epitaxy. We have shown that an increase in the Al content leads to a decrease in the droplet density and an increase in their size. We also showed that the influence of the Al content on the droplet characteristics is much less significant than that in case of the Stranski-Krastanov growth. The increase in the critical thickness of droplet formation on Al-containing surfaces when the temperature decreases is not significant. It allows us to control quantum dot emission wavelength almost independently of their geometric characteristics.

Recognition of dislocation structure of silicon carbide epitaxial layers by а neural network

Technological features of the growth of single crystal silicon carbide inevitably create condi-tions for the formation of crystal structure defects in them. A method is proposed for recognizing and analyzing a dislocation structure of single crystal silicon carbide based on the use of optical microscopy and a direct distribution neural network. The method was tested on homoepitaxial lay-ers of 4H-polytype silicon carbide. Software has been developed that allows building maps of the dislocation structure distribution over the surface of single crystal silicon carbide. The software was tested on digital images of the surface of silicon carbide epitaxial layers. The accuracy of recognition of dislocation structure was 95%. The dislocation mapping is used in the development of process technologies for reducing their density during the growth of single crystals.

4H-SiC Epi-Ready Substrate Qualification by Using Mirror Electron Microscope Inspection System

Crystal damage beneath the surface remaining after chemo-mechanical polishing (CMP) and basal plane dislocations (BPDs) of 4H-SiC epi-ready substrates have been inspected by using a mirror electron microscope inspection system non-destructively. Distributions of crystal damage and BPDs as well as their average densities are estimated by acquiring 80-μm square mirror electron images at positions distributed with an equal pitch over a substrate (“Discrete point set inspection”). Although the total inspected area is less than 1% of the entire substrate area, the inspection results for nine commercially available wafers reveal that there are large differences in surface polishing quality and BPD density between them. Evaluation on an epitaxial layer with a thickness of 10 μm grown on one of the inspected substrates indicated that correlation between distribution of the crystal damages on the substrate and that of bunched steps on the epitaxial layer surface.

Influence of CMP damage induced during flattening SiC epitaxial layer on device performances

Thick silicon carbide (SiC) epitaxial layers, which are required for the fabrication of SiC ultra-high voltage devices, have to be flattened by chemical mechanical polishing (CMP) in order to eliminate bunched-step segments, shallow pits, and epi-crowns. However, the negative effects of CMP on device performance is concerning. In this research, we attempted to evaluate a SiC epitaxial layer surface after flattening by CMP and to clarify the extent of CMP damage on the performance of a 4H–SiC PiN diode. As a result, a bundle of dislocation half-loops, which were detected by a mirror electron microscope (MEM) inspection system (Hitachi High-Technologies Mirelis VM-1000), was found to occur beneath the epitaxial layer surface flattened by CMP and led to current leakage of the PiN diode.

Monitoring of Substrate and Epilayer Surfaces by Mirror Projection Electron Microscope

4H-SiC surfaces before and after epitaxial growth (substrate and epitaxial layer surfaces) were investigated by mirror projection electron microscopy (MPJ) and atomic force microscopy (AFM). On the epitaxial layer surface, two types of short-step-bunchings (SSBs) were observed, one of which featured double grooves and protrusion perpendicular to the step-flow direction and the other, a single groove and protrusion. We also investigated the substrate surface and detected features of sub-surface damage and dislocations. These surfaces were compared and the relationship between the SSBs on the epitaxial layer surface and sub-surface damages and dislocations on the substrate surface were discussed.