Energy-efficient Single Flux Quantum Research Articles

Wave-Pipelined eSFQ Circuits

We have designed and tested energy-efficient single flux quantum (eSFQ) circuits suitable for wave-pipelined architectures. The high energy-efficiency of eSFQ circuits combined with the sequential nature of SFQ logic makes eSFQ especially suitable for energy-efficient variants of highly-pipelined circuits such as modern arithmetic logic units (ALUs), without penalty to the clock speeds available to RSFQ logic. In previous work, we have demonstrated working eSFQ circuits in the form of shift registers, deserializers, counters. Here we expand on this work by introducing a means of moving data through eSFQ circuits without the need for buffering at every step, resembling the wave-pipelined architecture characterizing many large modern logic circuits. Specifically, we present a pipeline-friendly JTL, confluence buffer, and half adder, comprising the core components of many adder architectures. We also show how such an eSFQ full adder naturally lends itself to utilization in a computation pipeline. We report experimental demonstration of circuits manufactured in Hypres's 4.5 kA/cm 2 process.

Design and test of asynchronous eSFQ circuits

We designed and tested new energy-efficient single flux quantum (eSFQ) circuits. The eSFQ design approach is based on biasing logic gates via decision-making pairs (DMPs) which connect clock lines to synchronous gates. The eSFQ design of asynchronous gates is more challenging, since these gates are not clocked. We demonstrate eSFQ designs of asynchronous circuits and implemented two versions of eSFQ toggle flip-flops (eTFF) cells embedded in a synchronous shift register environment. The first design is based on the bias-free version of a TFF operating in the ballistic mode. In the second design, the TFFs dc bias is applied symmetrically, while the necessary half-quantum phase skew is achieved by magnetic flux bias, which can also be done with a pi-junction phase shifter. Surrounding shift registers are the eSFQ versions of the RSFQ shift register with two junctions per bit. In this work, we report the functional operation of these eSFQ circuits and their energy consumption.

Experimental Investigation of Energy-Efficient Digital Circuits Based on eSFQ Logic

We present the design and results of experimental verification methods for ultra-low-power digital circuits based on the recently introduced energy-efficient single flux quantum (eSFQ) logic. Similar to another low-power SFQ logic, ERSFQ, eSFQ circuits make use of superconducting dc bias current dividers and thus avoid static power dissipation. As a result, per-gate power dissipation is reduced by two orders of magnitude as compared to conventional rapid single flux quantum and static power dissipation is zero. The eSFQ circuits are fabricated using the HYPRES standard 4.5 kA/cm2 process. We integrate a low-pass analog-to-digital modulator with our eSFQ deserializer to enable testing at high speed. In this paper, we demonstrate the viability and performance metrics of eSFQ circuits through functional and high-speed tests. Specifically, we confirmed correct operation and present measured parameter margins.

Magnetic Josephson Junctions With Superconducting Interlayer for Cryogenic Memory

We investigate a Magnetic Josephson Junction (MJJ) - a superconducting device with ferromagnetic barrier for a scalable high-density cryogenic memory compatible with energy-efficient single flux quantum (SFQ) circuits. The superconductor-insulator-superconductor-ferromagnet-superconductor (SIS <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">'</sup> FS) MJJs are analyzed both experimentally and theoretically. We found that the properties of SIS <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">'</sup> FS junctions fall into two distinct classes based on the thickness of S <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">'</sup> layer. We fabricate Nb-Al/AlOx-Nb-PdFe-Nb SIS <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">'</sup> FS MJJs using a co-processing approach with a combination of HYPRES and ISSP fabrication processes. The resultant SIS <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">'</sup> FS structure with thin superconducting S <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">'</sup> -layer is substantially affected by the ferromagnetic layer as a whole. We fabricate these type of junctions to reach the device compatibility with conventional SIS junctions used for superconducting SFQ electronics to ensure a seamless integration of MJJ-based circuits and SIS JJ-based ultra-fast digital SFQ circuits. We report experimental results for MJJs, demonstrating their applicability for superconducting memory and digital circuits. These MJJs exhibit <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">I</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">c</sub> <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">R</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</sub> product only ~ 30% lower than that of conventional SIS junctions co-produced in the same fabrication. Analytical calculations for these SIS <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">'</sup> FS structures are in a good agreement with the experiment. We discuss application of MJJ devices for memory and programmable logic circuits.

Implementation of energy efficient single flux quantum digital circuits with sub-aJ/bit operation

We report the first experimental demonstration of recently proposed energy efficient single flux quantum logic, eSFQ. This logic can represent the next generation of RSFQ logic, eliminating the dominant static power dissipation associated with a dc bias current distribution and providing over two orders of magnitude efficiency improvement over conventional RSFQ logic. We further demonstrate that the introduction of passive phase shifters allows the reduction of dynamic power dissipation by about 20%, reaching ∼0.8 aJ/bit operation. Two types of demonstration eSFQ circuit, shift registers and demultiplexers (deserializers), were implemented using the standard HYPRES 4.5 kA cm−2 fabrication process. In this paper, we present eSFQ circuit design and demonstrate the viability and performance metrics of eSFQ circuits through simulations and experimental testing.

Ferromagnetic Josephson switching device with high characteristic voltage

We develop a fast magnetic Josephson junction (MJJ)—a superconducting ferromagnetic device for a scalable high-density cryogenic memory compatible in speed and fabrication with energy-efficient single flux quantum (SFQ) circuits. We present experimental results for superconductor-insulator-ferromagnet-superconductor (SIFS) MJJs with high characteristic voltage IcRn of &amp;gt;700 μV proving their applicability for superconducting circuits. By applying magnetic field pulses, the device can be switched between MJJ logic states. The MJJ IcRn product is only ∼30% lower than that of conventional junction co-produced in the same process, allowing for integration of MJJ-based and SIS-based ultra-fast digital SFQ circuits operating at tens of gigahertz.

Magnetic Josephson Junction Technology for Digital and Memory Applications

The lack of dense, fast, energy efficient memory has been the main detractor for multiple superconducting digital projects in the past. Recently, fundamental physics research in superconductor-ferromagnet thin-film tunnel structures created a new opportunity to solve this long-standing problem. Superconductivity and ferromagnetism, two deeply antagonistic electronic properties, can co-exist in form of Magnetic Josephson Junctions (MJJs). The superconducting-ferromagnetic MJJs are electrically compatible with traditional superconductor-insulator-superconductor (SIS) Josephson junctions (JJs) used for digital energy-efficient single flux quantum (eSFQ/ERSFQ) circuits. Both MJJ and JJ circuits have similar fabrication process and can be integrated on a single chip. As a result, a combination of MJJs and JJs can be used to form addressable memory cells, energy-efficient memory periphery circuits and programmable logic elements. In this paper, we present the test results of superconductor-insulator-ferromagnet-superconductor (SIFS) MJJs showing their applicability for superconducting spintronic memory and digital circuits.

Energy-Efficient Single Flux Quantum Technology

Figures of merit connecting processing capabilities with power dissipated (OpS/Watt, Joule/bit, etc.) are becoming dominant factors in choosing technologies for implementing the next generation of computing and communication network systems. Superconductivity is viewed as a technology capable of achieving higher energy efficiencies than other technologies. Static power dissipation of standard RSFQ logic, associated with dc bias resistors, is responsible for most of the circuit power dissipation. In this paper, we review and compare different superconductor digital technology approaches and logic families addressing this problem. We present a novel energy-efficient single flux quantum logic family, ERSFQ/eSFQ. We also discuss energy-efficient approaches for output data interface and overall cryosystem design.