Emitter Edge Research Articles

Past, Present, and Future Outlook for Edge Isolation Processes in Highly Efficient Silicon Solar Cell Manufacturing

This work highlights present research and mass production results of wet‐chemical solutions for industrial edge isolation of silicon solar cells, aiming for a reduction of nitric acid consumption and production costs as well as a simultaneous increase in efficiency. All processes are applied to either industrially passivated emitter and rear contact (PERC) or tunnel oxide‐passivated contact (TOPCon) solar cells. Herein, a review of different edge isolation techniques in the history of silicon solar cell processing is presented. Subsequently, novel wet‐chemical approaches are focused on, namely 1) HNO3‐reduced edge isolation (InOxSide Fusion), 2) HNO3‐free edge isolation (InOxSide Blue), and 3) batch cluster solution—a combination of an acidic inline and an alkaline batch tool for emitter edge isolation of PERC and TOPCon solar cells. For each of the approaches, cell results and total cost of ownership estimations are presented. Based on all findings, a comprehensive discussion between inline versus batch‐cluster processing is presented. All investigations are performed on industrial equipment, wafer sizes, and a solar cell efficiency level of above 23%.

Geometrical Effect Dependency on the On-State Characteristics in 5.6 kV 4H-SiC BJTs

The influence of varying the emitter-base geometry, i.e., the emitter width (WE), emitter contact–emitter edge distance (Wn), and base contact–emitter edge (Wp) on the on-state characteristics in 5.6 kV implantation free 4H-SiC BJTs are investigated. The BJTs present a clear emitter size effect pointing out that surface recombination has a significant influence on current gain (β). The results show that the influence of varying Wp on the β is higher than Wn. A distance of 3 μm between emitter contact and base contact to the emitter edge (Wn = Wp = 3 μm) is the optimized value to have a BJT with a high β, and low on-resistance (RON) at a given WE.

A Comprehensive Study on the Geometrical Effects in High-Power 4H–SiC BJTs

Geometrical effects on the forward characteristics of high-power bipolar junction transistors are studied. An implantation-free area optimized junction termination is implemented in order to have a stable breakdown voltage. The effect of varying the emitter-base geometry, i.e., the emitter width (W <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">E</sub> ), the base width (W <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">B</sub> ), emitter contact-emitter edge distance (W <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</sub> ), and base contact-emitter edge (W <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">p</sub> ) on the on-state characteristics is studied in the different emitter cell geometries. The emitter size effect shows the highest influence on the current gain (fi). It shows a significant effect on the fi (single finger design, about 61%; square cell geometry, about 98%; hexagon cell geometry, about 90%). The base size effect also shows a significant improvement on the fi of about 23% at a given W <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">E</sub> .

Mathematical simulation of a diode system with a field-emission matrix cathode

A mathematical model of a diode system based on a matrix field-emission cathode with an edge structure of vertical-type emitters is constructed. We calculate the macroscale electrostatic field distribution for the planar and spherical configurations of the anode. In the microscale, the field distribution at the emitter edge is determined for various versions of the arrangement of the matrix cathode relative to the edge.

Integration of Inline Single-side Wet Emitter Etch in PERC Cell Manufacturing

In this work we investigate the potential of inline single side wet-etch processing for rear side emitter removal and edge isolation for large area p-type Passivated Emitter and Rear (PERC) silicon solar cells. We focus on the integration of this process in flows leading to shallow emitters and screen printed front contacts and to deep, highly ohmic emitters in association with Cu contacts. The inherent advantage of this process, beside high throughput, is the external gettering performed by full emitter etch at the rear side. This is particularly relevant in the case of two-step emitter formation process, where removal of phosphorus diffused layers is most effective when performed prior to the high temperature drive-in step. Another effect that we make use of is the front-side emitter etch back performed by the etch bath vapors, which can be used to tune the phosphorus surface concentration and thus the emitter sheet resistance. Using this process, we report efficiency up to 19.9% for CZ large-area, homogeneous-emitter, screen printed cells, and 20.4% for CZ, large-area Cu plated cells.

Removal of Crystal Orientation Effects on the Current Gain of 4H-SiC BJTs Using Surface Passivation

In this letter, the dependence of current gain and base resistance on crystal orientations for single-finger 4H-SiC bipolar junction transistors (BJTs) is analyzed. Statistical evaluation techniques were also applied to study the effect of surface passivation and mobility on the performance of the devices. It is shown that BJTs with an emitter edge aligned to the [1210] direction shows a lower current gain before surface passivation and higher base resistance after contact formation compared with other investigated crystal directions. However, the devices show a similar current gain independent of the crystal orientation after surface passivation.

Influence of Emitter Width and Emitter–Base Distance on the Current Gain in 4H-SiC Power BJTs

The influence of the emitter-base geometry on the current gain has been investigated by means of measurements and simulations. Particular attention has been placed on the emitter width and on the distance between the emitter edge and the base contact. When the emitter width is decreased from 40 to 8 m, the current gain is reduced by 20%, whereas when the distance between the base contact and the emitter edge is decreased from 5 to 2 m, the current gain is reduced by 10%. Simulations have been used to investigate the reasons for the current gain reduction. The reduction of the emitter width induces two mechanisms of current gain reduction: earlier forward biasing of the base-collector junction and higher recombination in the emitter region. Both mechanisms result from the higher current density flowing under the emitter region. Placing the base contact very close to the emitter edge increases the base current by increasing the gradient of the electron concentration toward the base contact. The effect of increasing the base doping in the extrinsic region has been simulated, and the results demonstrate that the current gain can be improved if a high doping concentration in the range of 5 × 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">18</sup> cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-3</sup> is used.

Low-Forward-Voltage-Drop 4H-SiC BJTs Without Base Contact Implantation

Bipolar junction transistors (BJTs) of 4H-SiC, with a low collector-emitter forward voltage drop VCE have been fabricated without base contact implantation. A comparison of BJTs on the same wafer with and without base contact implantation shows less than 10% higher VCE for the BJTs without base contact implantation. Omitting the base contact implantation eliminates high concentrations of implantation-induced defects that act as recombination centers. This is advantageous because it allows a shorter distance Wp+ between the emitter edge and the base contact, without affecting the current gain when no base contact implantation is used. The BJTs without contact implantation show a constant current gain as Wp+ was reduced from 3 to 1 mum, whereas the gain decreased by 45% for the BJTs with base contact implantation for the same reduction of Wp+. A key to the successful fabrication of low-forward-voltage-drop SiC BJTs without base contact implantation is the formation of low-resistivity Ni/Ti/Al ohmic contacts to the base. The contact resistivity on the base region (NA ap 4 times1017 cm-3) was measured with linear transmission line method structures to rhoC = 1.9 times 10-3 Omegacm2, whereas the contact resistivity with the base contact implantation was rhoC = 1.3 times 10-4 Omegacm2, both after rapid thermal processing annealing at 800degC.

High-Current-Gain SiC BJTs With Regrown Extrinsic Base and Etched JTE

This paper describes successful fabrication of 4H-SiC bipolar junction transistors (BJTs) with a regrown extrinsic base layer and an etched junction termination extension (JTE). Large-area 4H-SiC BJTs measuring 1.8 times 1.8 mm (with an active area of 3.24 ) showed a common emitter current gain of 42, specific on-resistance of 9 , and open-base breakdown voltage of 1.75 kV at room temperature. The key to successful fabrication of high-current-gain SiC BJTs with a regrown extrinsic base is efficient removal of the regrown layer from the surface of the emitter-base junction. The BJT with regrown layer has the advantage of lower base contact resistivity and current gain that is less sensitive to the distance between the emitter edge and the base contact, compared to a BJT with ion-implanted base. Fabrication of BJTs without ion implantation means less lifetime-reducing defects, and in addition, the surface morphology is improved since high-temperature annealing becomes unnecessary. BJTs with flat-surface junction termination that combine etched regrown layers show about 250 V higher breakdown voltage than BJTs with only etched flat-surface JTE.

Correlation between the base–emitter interface crystalline quality and the current gain in InGaP/GaAs HBTs grown by MOVPE

We demonstrated that the InGaP emitter ledge passivation in InGaP/GaAs heterojunction bipolar transistor (HBT) could suppress the recombination components in I B induced by the extrinsic base surface and the defects activated by the current stress. Similar suppression of I B by the current stress was found in unpassivated HBT with the 2 min growth interruption at the base–emitter interface under PH 3 partial pressure and we attributed this to the existence of an intermediate layer at the base–emitter interface that would improve the interface crystalline quality and reduce the recombination component of I B induced by defects at the base–emitter edge. Unpassivated HBT with the shorter post-growth annealing in time in hydrogen atmosphere, however, showed the increase in the current gain β with the current stress because of the burn-in effect rather than the decrease in β due to the increase of I B induced by defects.

On the geometrical dependence of low-frequency noise in SiGe HBTs

We present an investigation of the dependence of low-frequency noise on device geometry in advanced npn silicon–germanium (SiGe) heterojunction bipolar transistors (HBTs). The devices examined in this work have fixed emitter width (WE=0.4μm), but varying emitter length (0.5μm⩽LE⩽20.0μm), and thus the ratio of the emitter perimeter (PE) to the emitter area (AE) varies widely, making it ideal for examining geometrical effects. The SPICE noise parameter AF extracted from these devices decreases with increasing LE. Furthermore, the low-frequency noise measured on SiGe HBTs with significantly different PE/AE ratios suggests a possibility that the fundamental noise source for the diffusion base current may be located at the emitter periphery. Transistors with different distances between the emitter edge and the shallow trench edge (XEC), and shallow trench edge to deep trench edge (XTC), are also investigated. The SiGe HBTs with a smaller value of XEC have higher low-frequency noise, but no significant difference is found in devices with varying XTC. Explanations of the observed noise behavior are suggested.

Enhancing the current gain in InP/InGaAs double heterojunction bipolar transistors using emitter edge thinning

This paper reports InP/InGaAs double heterojunction bipolar transistors (DHBTs) made with composite-collector designs. The current gains of the DHBTs without and with emitter edge-thinning designs are 125 and 180, respectively. The composition of the collector and the base currents is analysed from the Gummel plots. Experimental data demonstrate that emitter edge thinning can further reduce the surface recombination current of the InP/InGaAs DHBTs and thus dramatically improve current gain, even though the surface recombination in InP/InGaAs DHBTs is much less than in GaAs-based DHBTs.

Geometrical effects in high current gain 1100-V 4H-SiC BJTs

This paper reports the fabrication of epitaxial 4H-SiC bipolar junction transistors (BJTs) with a maximum current gain /spl beta/=64 and a breakdown voltage of 1100 V. The high /spl beta/ value is attributed to high material quality obtained after a continuous epitaxial growth of the base-emitter junction. The BJTs show a clear emitter-size effect indicating that surface recombination has a significant influence on /spl beta/. A minimum distance of 2-3 /spl mu/m between the emitter edge and base contact implant was found adequate to avoid a substantial /spl beta/ reduction.

Investigation of InGaP/GaAs heterojunction bipolar transistor with doping graded base

An n-p-n InGaP/GaAs heterojunction bipolar transistor (HBT) using a graded base doping profile has been fabricated by low pressure metalorganic chemical vapor deposition. A current gain of 77 and a base sheet resistance of 251 Ω/sq are achieved in the graded-base HBT. Compared to the graded-base structure, the nongraded-base structure has a lower current gain (68) and a higher base sheet resistance (294 Ω/sq). Furthermore, the studied graded-base HBT device also shows better microwave characteristics. The measured unity current-gain cutoff frequency (fT) can be improved from 18 to 22 GHz. The functional dependences of current gain, base sheet resistance, and microwave characteristics on the base doping profile are attributed to the graded-doping enhanced built-in field across the base and higher base doping at the emitter edge.

Laser-induced surface cleaning of molybdenum field emitter arrays for enhanced electron emission

Visible laser irradiation on molybdenum field emission arrays (Mo–FEAs) was performed as one efficient cleaning method in order to etch off any unnecessary oxidation layers on the FEA surface. Scanning electron microscopy and high-resolution transmission electron microscopy showed clear removal of ultrathin MoO oxide layers at the emitter edge through a photoinduced thermal process. A sharp surface morphology of the emitter tips was also observed due to the crystallization or thermalmigration effect during the laser exposure. The structural enhancement of the FEA was strongly confirmed by a remarkable increase of 40% in the emission current after laser exposure.

Experimental I–V characteristics of AlGaAs/GaAs and GaInP/GaAs (D)HBTs with thin bases

N–p–n AlGaAs/GaAs and GaInP/GaAs (double) heterojunction bipolar transistors with thin base widths down to 200 Å have been fabricated, and their collector and base current–voltage characteristics have been studied. The experimental results show that the surface recombination current and the base bulk recombination current are lower in 200 Å base AlGaAs/GaAs HBTs than in comparable devices with 500 Å base width. The experiment also showed that the surface recombination currents and the sum of other base recombination currents (the base bulk recombination current, the base-emitter junction space charge recombination current, and the base-to-emitter back-injected current) are significantly lower in GaInP/GaAs (D)HBTs than that in comparable AlGaAs/GaAs HBTs. For the thin base GaInP/GaAs (D)HBTs, the current gain measurements with different emitter sizes demonstrates high current gain, low emitter edge recombination and negligible emitter-size effect.

Electrical characteristics of heterostructure-emitter bipolar transistors using spacer layers

We propose an improved In0.5Ga0.5P/GaAs heterostructure-emitter bipolar transistor (HEBT) grown by low-pressure metalorganic chemical vapor deposition (LP-MOCVD). The recombination at p-n interface can be significantly reduced at low collector current using 100 Å undoped GaAs spacers. Meanwhile, the emitter edge thinning technique is used to reduce the surface recombination current. The passivated device reveals a current gain as high as 360, along with an offset voltage as low as 80 mV. Moreover, the measured results indicate that the current gains vary slowly with temperature. In order to demonstrate that the emitter edge-thinning technique can effectively reduce the surface recombination current, the emitter size effect on current gain is also investigated.

Degradation of AlGaAs/GaAs and InGaP/GaAs heterojunction bipolar transistors under high current stress

The effect of current stressing on the degradation of the current - voltage characteristics of carbon-doped base AlGaAs/GaAs and InGaP/GaAs heterojunction bipolar transistors (HBTs) is reported here. The devices tested comprised the following: compositionally graded and abrupt emitter/base junction AlGaAs/GaAs HBTs and emitter edge thinned (EET) compositionally graded junction AlGaAs/GaAs and InGaP/GaAs HBTs. Results for the EET and InGaP/GaAs devices are presented here for the first time. It is shown experimentally that after current stressing the base current of graded junction AlGaAs/GaAs HBTs increases appreciably whilst its collector current shows little change. The lower potential faced by the carriers of the graded junctions increases the recombination at the surface and stressing increases the heterointerface trap density, which accounts for the device deterioration. Eventually these devices exhibit a current gain degradation, as well as an increased turn-on voltage. The superior stability of the abrupt junction AlGaAs/GaAs and InGaP/GaAs HBT to current stressing is demonstrated over periods of more than 50 h; no notable changes in the base and collector currents were observed. Nevertheless, the InGaP/GaAs system is preferable to an abrupt AlGaAs/GaAs system due to its lower value of turn-on voltage and reduced surface trap density.

Characterization of lateral thin-film-edge field emitter arrays

Measurements on arrays of lateral thin-film-edge field emitters are described, including current–voltage characteristics and results obtained with a high voltage (10 kV) cathodoluminescent phosphor screen. These devices offer the potential for enhanced emitter lifetime compared to conventional microtips, because one of the gate electrodes protects the emitter edge from ion sputter damage. One goal of this work is to demonstrate the feasibility of a cathodoluminescent field emitter lamp for a high-brightness backlight in an avionics display.

Base transit time of GaN/InGaN heterojunction bipolar transistors

A theoretical analysis of the base transit time in npn GaN/InGaN heterojunction bipolar transistor has been performed. For the analysis the effect of band-gap narrowing, carrier degeneracy, and compositional grading of the base region has been considered. The analysis demonstrates that a nonuniform doping in the base region with a higher value at the emitter edge and a lower value at the collector edge together with a compositional grading is necessary for minimizing the base transit time.