Electrostatically Doped Research Articles

Role of electrostatic doping on the resistance of metal and two-dimensional materials edge contacts

In this theoretical study, we compare electrostatically doped metal-transition metal dichalcogenide (TMD) edge-contacts versus substitutionally doped edge-contacts in terms of their contact resistance. Our approach involves the utilization of electrostatic doping achieved by applying back-gate bias to the metal-TMD edge contacts, where carrier injection is primarily governed by the Schottky barrier at the interface. To analyze these contacts, we employ the Wentzel-Kramers-Brillouin (WKB) approximation to calculate the transmission coefficient and use density functional theory (DFT)-derived band structures. We numerically solve the Poisson equation to capture the electrostatic potential. We also account for the impact of the image force using Green's function for the Poisson equation with boundary conditions appropriate to our specific geometry. Our findings reveal that electrostatically doped TMD edge contacts exhibit higher contact resistance compared to impurity-doped edge contacts at equivalent carrier concentrations. At the same time, we find that, among the electrostatically doped edge contacts, a low-κ back-gate oxide in conjunction with low-κ top oxide is preferable in terms of improvement in contact resistance. For instance, in a metal-TMD edge contact scenario involving a monolayer MoS2 as the channel, SiO2 as the infinitely thick top oxide, and a SiO2 back-gate oxide with an equivalent oxide thickness (EOT) of 1nm, we demonstrate that it is possible to achieve an impressively low contact resistance of 50Ωµm when the back-gate bias exceeds or equals 2 V. Published by the American Physical Society 2024

Design and reliability assessment of an ultra-thin body electrostatically doped bipolar transistor for mixed signal applications

Shrinking of the thickness of silicon on insulator (SOI) has been proposed as a potential solution for scaling down the physical base length of symmetric lateral electrostatically doped bipolar transistors. An ultra-thin body device that utilizes the full SOI thickness has been presented and the performance of the same is investigated in detail. The device features two distinct doping techniques: work function-induced electrostatic doping (WED) and bias-induced electrostatic doping (BED). The proposed design approach leads to significant improvements in gain and cut-off frequency compared to previously reported designs. The resulting devices exhibit peak current gain β values >1100, ft>500 GHz, fmax>1300 GHz. Moreover, these improved device performance matrices get translated into better performance of universal gates with low rise and fall time of ∼1.3 ns, and improved noise margin performance in static random access memory (SRAM) device of 0.43 and 0.41 for WED and BED based devices respectively. Furthermore, the study investigates the reliability of the device concerning breakdown voltage and its response to different temperature conditions. The findings reveal a decline in the β value for WED-based devices when subjected to temperatures exceeding 340 K. In contrast, BED-based devices demonstrate a comparatively smaller variation in β at temperatures above 340 K. These results show the potential of the proposed device for mixed-signal and digital circuit applications.

Towards a graphene transparent conducting electrode for perovskite/silicon tandem solar cells

AbstractIndium‐based transparent conducting electrodes (TCEs) are a major limiting factor in perovskite/silicon tandem cell scalability, while also limiting maximum cell efficiencies. In this work, we propose a novel TCE based on electrostatically doped graphene monolayers to circumvent these challenges. The electrode is enabled by a thin film dielectric that is charged and interfaced to a graphene film, optimally exploiting electrostatic doping. The field effect mechanism allows the modulation of charge carriers in monolayer graphene as a function of charge concentration in the dielectric thin film. Electrostatic charge was deposited on SiO2 membranes, and graphene transferred onto them exhibited a reduction in sheet resistance because of the induced charge carriers. We show a reduction in sheet resistance of graphene by 60% in just 3 min of dielectric charging, without impacting the transmission of light through the film stack. Hall effect measurements indicated that the mobility of the films was not significantly degraded. The deposition of negative electrostatic charge reversed this effect, allowing for precise tunability of charge concentration from n‐ to p‐type. We develop a model to determine the required sheet resistance of a graphene TCE with 97% transmittance in a perovskite/silicon tandem cell. As the technique here reported does not impact transmittance, a graphene TCE with a sheet resistance below 50 Ω/□ could enable efficiencies up to 44%, presenting a promising alternative to indium‐based TCEs.

25.7% efficient PERC solar cell using double side silicide on oxide electrostatically doped (SILO-ED) carrier selective contacts: process and device simulation study

Passivating contacts have recently considered as a superior carrier-selective contact approach for high-efficiency silicon-based photovoltaic devices. However, the conversion efficiencies of the silicon-based passivated emitter and rear cell (PERC) are limited by contact recombination losses that reduce their performance. Therefore, we investigated a new manufacturable silicide on oxide-based electrostatically doped (SILO-ED) carrier-selective contact to suppress the contact recombination losses and reduce the saturation current density (j 0). For the first time, double side electrostatic doping is introduced to the PERC devices to form the carrier selective passivating contacts. First, a conventional PERC device was designed and the effects of surface recombination velocity (SRV) at both contacts were studied. After that, single and double SILO-ED based contacts are introduced into the device and a systematic analysis is performed to understand the tunneling phenomena and improve the conversion efficiency compared to existing PERC cells. The front SILO-ED based device with back contact SRV of 10 cm s−1 showed a power conversion efficiency of 25.4% with j 0 (14.3 fA·cm−2). In contrast, the double SILO-ED device delivered 25.7% conversion efficiency by further suppressing the j 0 to 11.8 fA·cm−2 by implementing SILO-ED approach with two different metal silicides such as erbium silicide (ErSi2) and palladium silicide (Pd2Si) on front and rear contact surface. The champion double SILO-ED PERC solar cell delivered a conversion efficiency of 25.7% with an open circuit voltage (V OC) of 742 mV. The results reported in this study would help to develop superior passivating contact-based PERC solar cells for higher efficiencies.

The non-volatile electrostatic doping effect in MoTe2 field-effect transistors controlled by hexagonal boron nitride and a metal gate

The electrical and optical properties of transition metal dichalcogenides (TMDs) can be effectively modulated by tuning their Fermi levels. To develop a carrier-selectable optoelectronic device, we investigated intrinsically p-type MoTe2, which can be changed to n-type by charging a hexagonal boron nitride (h-BN) substrate through the application of a writing voltage using a metal gate under deep ultraviolet light. The n-type part of MoTe2 can be obtained locally using the metal gate pattern, whereas the other parts remain p-type. Furthermore, we can control the transition rate to n-type by applying a different writing voltage (i.e., − 2 to − 10 V), where the n-type characteristics become saturated beyond a certain writing voltage. Thus, MoTe2 was electrostatically doped by a charged h-BN substrate, and it was found that a thicker h-BN substrate was more efficiently photocharged than a thinner one. We also fabricated a p–n diode using a 0.8 nm-thick MoTe2 flake on a 167 nm-thick h-BN substrate, which showed a high rectification ratio of ~ 10−4. Our observations pave the way for expanding the application of TMD-based FETs to diode rectification devices, along with optoelectronic applications.

Sensitivity Analysis of Junction Free Electrostatically Doped Tunnel-FET Based Biosensor

The electrostatic doping technique has a remarkable ability to reduce random dopant fluctuations (RDFs), fabrication complexity and high thermal budget requirement in the fabrication process of nano-scale devices. In this paper, for the first time it has been propose and simulated a junction-free electrostatically doped tunnel field-effect transistor (JF-ED-TFET) based biosensor for label-free biosensing applications. The dielectric modulation concept has been used to sense biomolecules using a nano-cavity incorporated within the gate oxide layer near to the source end. The sensing response of the JF-ED-TFET biosensor has been analyzed in terms of the electric field, energy band and transfer characteristic and sensitivity in terms of ON-current, ION/IOFF ratio and subthreshold swing. The sensitivity of the biosensor has been investigated based on practical challenges such as different filling factors and step-profiles generated from the steric hindrance. The effect of temperate and nano-cavity dimension variations on device performance has been also analyzed. In this work, various types of biomolecules such as Streptavidin (k = 2.1), Ferro-cytochrome c (k = 4.7), keratin (k = 8) and Gelatin (k = 12) has been considered for the performance investigation.

Electrostatic doping determined by band alignment in graphene on ferroelectric LiNbO3(0001) polar surfaces

Herein, first-principles density functional theory calculations are performed to investigate the interface coupling and electrostatic doping effect in the graphene/LiNbO3(0001) [denoted as Gr/LNO(0001)] heterostructure. The results show that, in addition to the coupling mechanism of the large ionic–van der Waals interaction, an unusual electrostatic doping, which is in contrast with the polarization compensation mechanism, appears in the Gr/LNO(0001) system: for graphene adsorbed on the thermodynamically preferred ferroelectric LiNbO3(0001) [denoted as LNO(0001)] positive (Z+) and negative (Z−) surfaces, carriers are of p- and n-type, respectively. Further analysis indicates that the electrostatically doped effect of the graphene layer adsorbed on the LNO(0001) polar surfaces should be determined by the particular band alignment between the LNO(0001) polar surfaces and graphene. Our studies provide theoretical evidence for designing p–n homojunctions in a graphene sheet by engineering the domain structure of the LNO(0001) ferroelectric substrates. Furthermore, the significant change in carrier density caused by the reversal of the ferroelectric polarization direction suggests that the Gr/LNO(0001) system could be a promising platform to explore ferroelectric field-effect transistors.

Steep slope carbon nanotube tunneling field-effect transistor

Tunneling field-effect transistors (TFETs) have emerged as a potential candidate to outperform conventional metal-oxide-semiconductor FETs at low voltages, since their operation mechanism can overcome the fundamental subthreshold swing (SS) limit of 60 mV/decade at room temperature. We report carbon nanotube (CNT) based TFETs with abrupt p-i-n tunneling junctions controlled by electrostatic doping. Minimum SS (SSmin) of ∼41 mV/dec is observed with nearly no temperature dependence, as clear evidence of the TFET operation. We further investigate devices using CNTs with smaller bandgaps, reporting a record high band-to-band tunneling (BTBT) current of ∼100 nA for a single CNT. Non-linear output characteristics are observed as expected for devices operating outside of the quantum capacitance limit (QCL). Overall, electrostatically doped CNT TFETs shine a promising path for low-power electronic applications.

Design of a Low-Power Short-Channel Electrostatically Doped Silicene Nanoribbon FET

In this article, the transfer and output characteristics of an electrostatically doped (ED) 4-armchair silicene nanoribbon (4-ASiNR) field-effect transistor (FET) with three gates are investigated. The numerical simulations are carried out based on the self-consistent solution of the Poisson and Schrodinger equations within the nonequilibrium Green’s function (NEGF) formalism, implemented in the NanoTCAD ViDES simulator. Results show that ED SiNR-FET has better characteristics than chemically doped (CD) SiNR-FET. Additionally, ED-device is inherently free of negative impacts of impurities on the transistor’s performance. The ED SiNR-FET functionality is analyzed using different channel lengths, introducing the extended channel ED-device (ECED) with an improved ${I}_{ \mathrm{\scriptscriptstyle ON}} / {I}_{ \mathrm{\scriptscriptstyle OFF}}$ ratio of $3.8\times 10^{5}$ and a significant ${I}_{ \mathrm{\scriptscriptstyle ON}}$ of 4.6 mA/ $\boldsymbol \mu \text{m}$ . A 15 nm ECED SiNR-FET with an 8 nm channel is studied under different temperatures and supply voltages. Based on the results, low-power (LP) and high-performance (HP) applications are suggested for the ECED-device, with the minimum subthreshold swing of 64 mV / dec and the maximum transconductance of $63~\boldsymbol \mu \text{S}$ , respectively.

A methodical survey on present state of art for electrostatically-doped tunnel FETs and its future prospects

Important characteristic of the Tunnel Field Effect Transistors (TFETs) to exhibit steep switching properties makes it suitable for applications in the fields of 5G, cloud computing, faster wireless communication and many others. Despite the innumerous possible applications, the heavily doped-source and drain region in TFET demands ion-implantation and cost-inefficient annealing techniques for the optimum fabrication of the device. In this context, Electrostatically-Doped (ED) TFET is the alternative solution for a low-thermal budget device. However, a challenging area in the field of sub-nano scaled ED-TFET is to accomplish abrupt tunneling junction. Recent developments in ED-TFET have led the research community to work on new structures in order to achieve abrupt tunneling junction. The present paper elaborates a large number of existing ED-TFETs along with their specifications and predicted electrical performance. Moreover, a complete state-of-art of performance parameters of ED-TFET such as on-current (ION), off-current (IOFF), subthreshold swing (SS) and threshold voltage (Vth) have been thoroughly discussed in this paper. A detailed and methodical study of this kind may help the research community to find the well collated relevant information about ED-TFETs at one single place.

Silicon-On-Nothing Electrostatically Doped Junctionless Tunnel Field Effect Transistor (SON-ED-JLTFET): A Short Channel Effect Resilient Design

This work investigates the novel device structure, silicon-on-nothing electrostatically doped junctionless tunnel field effect transistor (SON-ED-JLTFET) with high-K stacked hetero-gate technology for its short channel effects (SCEs) immune properties. Here, its analog/RF device performance metrices are also analyzed using calibrated 2-D technology computer-aided design (TCAD) simulation study. This device is expected to exhibit the fundamental advantages of SON technology, i.e. it should be more immune towards SCEs, like threshold voltage roll-off, drain induced barrier lowering (DIBL) even for devices with less than 10 nm channel length. Moreover, owing to its electrostatic doping instead of metallurgical doping, the detrimental doping control issues, such as mobility degradation, higher fabrication thermal budget and statistical random dopant fluctuations (RDFs) can no more degrade the device performance. This helps in realization of more process variations immune design. Here the detailed device sensitivity analysis with respect to the various crucial devices dimensional parameters variation is also carried out.

Design approach to improve the performance of JAMFETs

In this paper, the authors propose the use of electrostatic doping for n + drain region formation in Junctionless accumulation mode field effect transistors (JAMFET). This electrostatically doped drain (EDD) JAMFET employs an additional unbiased electrode (auxiliary electrode) of low workfunction on the intrinsic drain region. This technique effectively suppresses the tunneling leakage, thereby reducing I OFF by 6 orders. The tunneling of electrons from valence band of channel to conduction band of drain happens due to enhanced band bending in OFF-state (V GS = 0 V, V DS = 1 V). The presence of additional electrode in EDD-JAMFET increases the width of tunnel barrier formed at channel–drain junction in OFF-state improving the I ON/I OFF ratio by 6 orders. The gate length scaling demonstrates that leakage suppression of EDD-JAMFET is more effective with approximately 3 orders smaller I OFF even at gate length of 5 nm. The performance of graded channel device (GC-EDD-JAMFET) by electrostatic doping is also explored. Significant improvements are observed in terms of I ON/I OFF, subthreshold slope SS, DIBL and f T. Finally, the analogue parameters such as Transconductance generation factor G m/I D, Intrinsic gain A V, output conductance G D, and ‘G m/I D × f T’ performance metrics are investigated which show significant improvement at small bias current, making it suitable for ultra-low power applications.

Photodiode with low dark current built in silicon-on-insulator using electrostatic doping

In this paper, we demonstrate experimentally a novel SOI-based photodiode using electrostatic doping and fabricated in a simple, low-cost process. Unlike a conventional ion-implanted pn junction diode, the electrostatically doped devices feature extremely low reverse-bias current. When used for photodetection, our devices exhibit a dark current three decades lower than a conventional photodiode and provide excellent detectivity even under low optical power density. Our electrostatically-doped diodes also feature enhanced response in the near-UV and 1/f low-frequency noise.

High carrier density, electrostatic doping in organic single crystal semiconductors using electret polymers

Control of the carrier density with high doping levels is a fundamental technology in semiconductor processing. However, unavoidable structural disorder in organic semiconductors can be introduced by chemical doping methods. Here, we synthesize a novel class of ionic polymers that generate a quasi-permanent electric field, and demonstrate that organic semiconductors in proximity to the ionic polymer can be electrostatically doped with significantly high carrier densities up to 5.6 × 1013 cm−2, which results in a low sheet resistance of ca. 60 kΩ. Electret doping presented here is expected to lead to an in-depth understanding of electric phase transitions in organic semiconductors.

Design and performance analysis of low-power SRAM based on electrostatically doped tunnel CNTFETs

An electrostatically doped (ED) tunnel carbon nanotube field-effect transistor (CNTFET)-based six-transistor (6T) static random-access memory (SRAM) cell is designed and simulated in HSPICE. The performance of the ED tunnel CNTFET 6T SRAM cell is analyzed based on various figures of merit (FOMs), viz. the read/write noise margin, power dissipation, and read/write delay. Simulation results for the ED tunnel CNTFET-based 6T SRAM are compared with those for a conventional CNTFET-based 6T SRAM cell, revealing that the former shows improved FOMs without losing stability. The read noise margin is improved by 9.2% and 7.5% at VDD of 0.9 V and 0.5 V, while the write noise margin is improved by 16% and 14% at VDD of 0.9 V and 0.5 V, respectively. The power dissipation is reduced by 9 pW at VDD of 0.9 V and by 4 pW at VDD of 0.5 V. The results demonstrate the stability of the proposed ED tunnel CNTFET SRAM for low-power applications.

Electrical suppression of all nonradiative recombination pathways in monolayer semiconductors.

Defects in conventional semiconductors substantially lower the photoluminescence (PL) quantum yield (QY), a key metric of optoelectronic performance that directly dictates the maximum device efficiency. Two-dimensional transition-metal dichalcogenides (TMDCs), such as monolayer MoS2, often exhibit low PL QY for as-processed samples, which has typically been attributed to a large native defect density. We show that the PL QY of as-processed MoS2 and WS2 monolayers reaches near-unity when they are made intrinsic through electrostatic doping, without any chemical passivation. Surprisingly, neutral exciton recombination is entirely radiative even in the presence of a high native defect density. This finding enables TMDC monolayers for optoelectronic device applications as the stringent requirement of low defect density is eased.

Continuous Control and Enhancement of Excitonic Valley Polarization in Monolayer WSe2 by Electrostatic Doping

AbstractEnhancement and continuous control of the excitonic valley polarization in electrostatically doped monolayer WSe2 are demonstrated. Under excitation with circularly polarized light, 20% valley polarization of excitons around the charge neutrality condition at 70 K is increased to 40% by modulating the electron/hole density up to 2 × 1012 cm−2. This increase originates from slow valley relaxation for neutral exciton between the K and −K valleys owing to screening of long‐range e–h exchange interactions by doped carriers. The gate‐dependences of the exciton valley polarization at various temperatures are reproduced by theoretical calculations, which holds potential for next‐generation valleytronic devices continuously controlled by an applied bias voltage.

A novel electrostatically doped ferroelectric Schottky barrier tunnel FET: process resilient design

This work investigates a process-variation resilient electrostatically-doped ferroelectric Schottky-barrier tunnel FET (ED-FE-SB-TFET) based on negative capacitance (NC). The key attributes of ED-FE-SB-TFET are perovskite ferroelectric (FE) gate stack-induced NC behavior and electrostatic doping to induce pockets at both source/drain and channel interfaces. The positive feedback among the electric dipoles in FE material leads to intrinsic voltage amplification and enhanced gate controllability, thus it facilitates faster switching transitions. The proposed ED-FE-SB-TFET endeavors to create a substantial reduction in the ambipolar current ( $$I_\mathrm{Amb}$$ ), steep sub-threshold slope, paramount boost in drive current, lower drain-induced barrier-lowering, and enhanced scalability. It also obviates the need for metallurgical doping, hence ion-implantation or dopant segregation techniques employed for planar SB-TFETs pocket-doping are no longer required, and it also modifies effective Schottky barrier height and Schottky tunneling barrier width significantly to enhance the device behavior. It offers a simplified fabrication process, and it is highly resilient towards process variations, doping control issues, and random dopant fluctuations. Moreover, there is a reduced thermal budget that facilitates its fabrication on single crystal silicon-on-glass substrate realized by wafer scale epitaxial transfer. Results reveal its potential as strong candidate for next generation, scaled and low power applications.

A novel dynamically configurable electrostatically doped silicon nanowire impact ionization MOS

In this paper, a novel dynamically configurable, electrostatically doped silicon nanowire impact ionization MOS (E-SiNW-IMOS) based on dopant-free technology is investigated. The key attribute of the proposed device is its polarity controlled dynamic reconfigurability of charge gating mechanism from impact ionization to band-to-band tunneling. This ensures that same device can act as E-SiNW-IMOS or electrostatically doped silicon nanowire Tunnel FET (E-SiNW-TFET) depending on bias conditions. It consists of an undoped SiNW and three independent all-around-gates two polarity gates to realize n+ and p+ regions in undoped nanowire by electrostatic doping and a control gate to initiate impact ionization/tunneling. Combination of biases applied at polarity gates and control gate configures both the operating mechanism and device polarity. This enables the potential co-integration of IMOS (offering high gain and ultra steep switching behavior) and TFET (with extremely low leakage current and power-efficiency) on a single chip. A calibrated 3-D TCAD study reveals consistent static device behavior for both the devices considered. It offers a simplified fabrication process as it avoids the need of ion implantation and thermal annealing, thereby reducing thermal budget. Further, it is highly resilient towards process variations, doping control issues, voltage variations and random dopant fluctuations (RDF).

Computational Study of Hybrid Nanomaterial/Insulator/Silicon Solar Cells

We present a computational study on hybrid nanomaterial-insulator-silicon solar cells where single-walled carbon nanotube or graphene forms the emitter as well as top conducting electrode on n-type crystalline silicon having a thin interfacial tunnel oxide. The effects of nanomaterial doping and tunnel oxide thickness on cell characteristics are modeled. Similar to bulk emitters, cell efficiency could be increased by chemical doping (p-type) of the nanomaterial. Unlike bulk, nanomaterial could get electrostatically doped (n-type) due to its low quantum capacitance, by the surface charge density in silicon. For chemically undoped graphene on lightly ( $10^{{16}}$ /cm $^{{3}}$ ) doped silicon, efficiency loss due to the electrostatic doping effect is $\sim 11$ %. A moderate p-type chemical doping (0.2 eV shift in Fermi level) of graphene reduces the aforementioned loss to $\sim 2$ %. The electrostatic doping effect in carbon nanotube-based cells is relatively small and independent to nanotube’s chemical doping. For tunnel oxide thickness $\ge 2$ nm, photogenerated carrier accumulation at silicon/oxide interface considerably enhances the electrostatic doping effect. The effect of tunnel oxide thickness variation on fill factor and open circuit voltage is shown to be qualitatively similar to standard bulk metal–insulator–silicon solar cells. Our model predicts an optimal oxide thickness of $\sim 1$ nm which confirms the experimental reports.