Gate-grounded n-channel MOSFET (GGNMOS) has been widely used in electrostatic discharge (ESD) protection applications. In this letter, an enhanced GGNMOS, called the EGGNMOS, is proposed and demonstrated. The new device has the same topology as the conventional GGNMOS, except that a few P+ regions are being added to the N+ guard ring (NGR). This novel approach enables the formation of parasitic silicon-controlled rectifiers (SCR’s), thus, resulting in a much higher current handling capability in the EGGNMOS than the GGNMOS under the same silicon footprint. Our experimental results indicate that the proposed EGGNMOS, with an ESD design window suitable for 5V-CMOS technologies, could achieve an ESD failure current density eight time higher that the GGNMOS. Moreover, the transient overshoot characteristic of EGGNMOS is comparable with that of the GGNMOS. Three-dimensional TCAD simulation has also been carried out to verify that the NGR isolation functionality of EGGNMOS is not being comprised.