Electromigration Degradation Research Articles

Statistical study of electromigration in gold interconnects

During operation of integrated circuits, electromigration gradually degrades the metallic interconnects, eventually leading to complete failure. In recent decades, electromigration has been studied mainly for the widely used aluminum and copper interconnects, however, gold interconnects used for GaAs devices also experience significant electromigration degradation. We present physics-based modeling and simulation of electromigration in gold interconnects. A comprehensive analysis of the statistical properties of electromigration failure and the influence of varying temperature and geometric properties is performed. The previously published experimental observations on the behavior of the mean failure time and the associated standard deviation are in agreement with the obtained simulation results. In particular, the simulation reproduces an 85% decrease of the standard deviation for a via surface of 31.36μm2 compared to the value for a via surface of 6.76μm2.

Microstructural impact on electromigration reliability of gold interconnects

Interconnect segments of gold metallization used for GaAs devices are susceptible to significant electromigration degradation and have a microstructure with thousands of grains. In this work, a complete physics-based analysis of electromigration in gold is presented. A novel approach for the numerically efficient simulation of an interconnect containing a large number of grains is introduced. By building grain compounds containing hundreds of grains and equipping them with appropriate models, the dependence of statistical failure features on the variation of geometric properties is investigated. The experimentally observed dependence of the mean failure time and the associated standard deviation of the failure times on the interconnect geometry is well reproduced by our simulations.

Electromigration Analysis of Solder Joints for Power Modules Using an Electrical-Thermal-Stress-Atomic Coupled Model

Abstract The larger current densities accompanying increased output of power modules are expected to degrade solder joints by electromigration. Although previous research has experimentally studied electromigration in solder, die-attach solder joints in Si-based power modules have not been studied because the average current density of the die-attach solder is much smaller than the threshold of electromigration degradation. However, in die-attach solder, the electromigration degradation may appear where current crowding occurs. This report describes electromigration analysis of die-attach solder joints for Si-based power modules using an electrical-thermal-stress-atomic coupled model. First, we validate our numerical implementation and show that it can reproduce the distributions of vacancy concentrations and hydrostatic stress almost the same as the analytical solutions even at current densities assuming current crowding. We then simulate the die-attach solder joint with an Si-based power device and a substrate. Due to current crowding, the current density at the edge of the solder exceeds the electromigration threshold. Unlike general electromigration phenomena, the vacancy concentration increases at the center and decreases at the edges of the solder joint, regardless of whether it is on the cathode side or anode side, due to the longitudinal driving force in the solder joint generated by the current crowding. Creep strain increased remarkably at the anode edge and the cathode center. The absolute vacancy concentration clearly increased with increasing current density and size ratio. Creep strain significantly increased with increasing current density, size ratio, and temperature.

Self-heating aware EM reliability prediction of advanced CMOS technology by kinetic Monte Carlo method

The self-heating aware electromigration (EM) reliability of back end of line (BEOL) is investigated by a developed kinetic Monte Carlo (KMC) simulator with consideration of the microscopic physical mechanisms including the migration of metal ions. The developed simulator can reproduce the void morphology and the evolution of metal wires resistance during EM simulation, which is validated by experimental results. The self-heating from the nanosheet MOSFETs is evaluated, adding the extra heat for interconnects. The EM degradation in different layers of metal wires is analyzed by utilizing KMC simulator. The impacts of power density and aspect ratio of metal wires on EM lifetime are discussed with the coupling effects of self-heating and Joule heat.

Modeling of FinFET SRAM array reliability degradation due to electromigration

Effective assessment of degradation induced by electromigration (EM) is necessary for the design of reliable circuits based on FinFET technology. In this paper, a new methodology is proposed where FinFET SRAM cell array activity is used to evaluate the resistance degradation due to EM. The implementation of this methodology consists of analysis of stress evolution, a time-dependent resistance model, cell array activity extraction, and a customized algorithm for cell array reliability evaluation. The stress model is derived from the material transport equation which contains the driving forces due to the gradient of vacancy concentration, temperature, hydrostatic stress, and EM itself. The time-dependent resistance shift describes the effect of stress evolution. The customized algorithm is applied to calculate the resistance degradation while considering the characteristics of metal wire arrays in SRAMs. The statistical degradation in a FinFET SRAM cell array reveals that, for the tested case, in addition to the percentage of the workload in various operating modes, the cell array activity distribution also affects EM degradation. More evenly distributed cell activity results in better EM reliability.

Electromigration Check: Where the Design and Reliability Methodologies Meet

Due to technology scaling, electromigration (EM) signoff has become increasingly difficult, mainly due to the use of inaccurate methods for EM assessment, such as the empirical Black’s model. Results of recent measurements performed on power grid-like structures isolated in the power grid environment have demonstrated that the weak link approach cannot accurately predict lifetime of the power grids. It calls for significant over-design, while, today, there is very little margin left for EM. Numerous observations clearly indicate that there is a need for a new EM checking approach that accurately models EM degradation using physics-based models, combined with a mesh model to account for redundancy, while being fast enough to be practically useful. In this paper, we present a novel approach for power grid EM checking using physics-based models that can account for process, voltage and temperature variations across the die. Existing physical models for EM in metal branches were extended to track EM degradation in multi-branch interconnect trees. Our results, for a number of IBM power grid benchmarks, confirm that Black’s model is overly inaccurate. The lifetimes found using our physics-based approach are on average 2.75x longer than those based on a Black’s model, as extended to handle mesh power grids. With a maximum runtime of 2.3 h among all the IBM benchmarks, our method appears to be suitable for large VLSI circuits.

Power Grid Electromigration Checking Using Physics-Based Models

Due to technology scaling, electromigration (EM) signoff has become increasingly difficult, mainly due to the use of inaccurate methods for EM assessment, such as the empirical Black’s model. In this paper, we present a novel finite-difference-based approach for power grid EM checking using physics-based models, that can account for process, voltage, and temperature variations across the die. Our main contribution is to extend existing physical models for EM in metal branches to track EM degradation in multibranch interconnect trees. The extended model is represented as a homogeneous linear time invariant system. We also detect early failures and account for their impact on grid lifetime. We speed up our implementation by proposing a macromodeling-based filtering scheme and a predictor-based approach. Our results, for a number of IBM power grid benchmarks, confirm that Black’s model is overly inaccurate. The lifetimes found using our physics-based approach are on average $ {2.75\times }$ longer than those based on a (calibrated) Black’s model, as extended to handle mesh power grids. With a maximum runtime of 2.3 h among all the IBM benchmarks, our method appears to be suitable for very large scale integration circuits.

Investigation of Electromigration Degradation Mechanism in Ti/Pt/Au Ohmic Contacts to p-GaAs Under High Current Density Stress

The degradation mechanism of Ti/Pt/Au ohmic contacts to p-GaAs was identified experimentally under high direct-current density stress in detail. A revised measuring structure was designed based on the circular transfer length method (CTLM), in which the high current density of $0.8\times 10^{5}$ A/cm2 was applied vertically, while the contact resistance was measured horizontally between two contact electrodes. According to revised CTLM, the specific contact resistance was measured during stress. The results indicated that specific contact resistance showed an exponential dependence on the aging time. The depth profiling results obtained from the Auger electron spectroscopy showed that Pt penetrated into the Au layer during stress. Furthermore, some voids were observed at the Au/Pt interface, and intermixing began to form within metal layer during stress. These results demonstrated that the degradation of Ti/Pt/Au ohmic contacts to p-GaAs was attributed mainly to the electromigration and Joule heating along the current direction under high current density.

Effect of the Crystallinity on the Electromigration Resistance of Electroplated Copper Thin-Film Interconnections

Dominant factors of electromigration (EM) resistance of electroplated copper thin-film interconnections were investigated from the viewpoint of temperature and crystallinity of the interconnection. The EM test under the constant current density of 7 mA/cm2 was performed to observe the degradation such as accumulation of copper atoms and voids. Formation of voids and the accumulation occurred along grain boundaries during the EM test, and finally the interconnection was fractured at the not cathode side but at the center part of the interconnection. From the monitoring of temperature of the interconnection by using thermography during the EM test, this abnormal fracture was caused by large Joule heating of itself under high current density. In order to investigate the effect of grain boundaries on the degradation by EM, the crystallinity of grain boundaries in the interconnection was evaluated by using image quality (IQ) value obtained from electron backscatter diffraction (EBSD) analysis. The crystallinity of grain boundaries before the EM test had wide distribution, and the grain boundaries damaged under the EM loading mainly were random grain boundaries with low crystallinity. Thus, high density of Joule heating and high-speed diffusion of copper atoms along low crystallinity grain boundaries accelerated the EM degradation of the interconnection. The change of Joule heating density and activation energy for the EM damage were evaluated by using the interconnection annealed at 400 °C for 3 h. The annealing of the interconnection increased not only average grain size but also crystallinity of grains and grain boundaries drastically. The average IQ value of the interconnection was increased from 4100 to 6200 by the annealing. The improvement of the crystallinity decreased the maximum temperature of the interconnection during the EM test and increased the activation energy from 0.72 eV to 1.07 eV. The estimated lifetime of interconnections is increased about 100 times by these changes. Since the atomic diffusion is accelerated by not only the current density but also temperature and low crystallinity grain boundaries, the lifetime of the interconnections under EM loading is a strong function of their crystallinity. Therefore, it is necessary to evaluate and control the crystallinity of interconnections quantitatively using IQ value to assure their long-term reliability.

A model for statistical electromigration simulation with dependence on capping layer and Cu microstructure in two dimensions

A model has been developed to simulate electromigration degradation in an interconnect segment in two dimensions using finite differences. The model was deployed on a parallel computer to statistically assess the lifetimes. The simulation takes into account the diffusion paths for electromigration mass transport along the grain boundaries and the capping layer. The microstructure is generated with a Monte Carlo algorithm, using a modified Potts model. Diffusivities along the grain boundaries and the capping layers were applied as multiples of a base diffusivity and were statistically scattered. The simulation results correlate well with electromigration tests.

Comparative study of the microstructure and mechanical strength of tin-copper (Sn0.7Cu) solder modified with silver (Ag) by both alloying and doping methods

In order to compare the effectiveness of alloying methods with doping methods, we have studied the microstructure and mechanical strength of Sn0.7Cu solder and two kinds of Ag modified Sn0.7Cu solders, i.e., Sn0.7Cu0.3Ag (prepared by alloying pure Sn, Cu, and Ag metals) and Sn0.7Cu + 0.3Ag (prepared by doping Ag nanoparticles into Sn0.7Cu). Solder joints were sent for mechanical tests and microstructure observation after aging at 90 °C for up to 500 h. Electromigration (EM) test models were built to evaluate the resistance of solders to EM degradation at an average current density of 0.79 × 104 A/cm2. Experimental results revealed that both Ag modified Sn0.7Cu solders had higher mechanical strength and stronger resistance to EM than Sn0.7Cu. This improvement was due to the introduction of dispersed Ag3Sn intermetallic compounds (IMCs), which acted as a second phase to refine the bulk solder, stop dislocations and hinder atomic migration. Sn0.7Cu0.3Ag was found to be more effective in reinforcing the mechanical strength than Sn0.7Cu + 0.3Ag, since the shear strength and microhardness of the former solder were respectively 12.79 % and 1.01 % higher than the latter one. The products of diffusivity and effective charge number DZ*, which represented the EM rate, for Cu atoms were measured to be 3.49 × 10−9, 1.91 × 10−9, 2.64 × 10−9 cm2/s for Sn0.7Cu, Sn0.7Cu0.3Ag, and Sn0.7Cu + 0.3Ag, respectively. The superior performance of Sn0.7Cu0.3Ag was ascribed to the smaller size and wider distribution of Ag3Sn IMCs in the solder matrix. To conclude, the alloying method produced greater improvement than the doping method in the microstructure and mechanical strength of Sn0.7Cu solder.

Electromigration in lead-free solder joints under high-frequency pulse current: An experimental study

The insatiable demand for miniaturization of consumer electronics has brought continuing challenges in the electronic packaging field. As a consequence, immense information processing duties, high current density and large joule heating are exerted on the package, which makes electromigration and thermomigration a serious reliability issue. In this study, high frequency pulse current electromigration degradation experiments were carried out on Sn96.5%Ag3.0%Cu0.5 (SAC305 - by weight) solder joints. During the test, frequency, current density and duty factors are used as controlling parameters. The nominal current density varied from [Formula: see text] to [Formula: see text], pulsed direct current frequency ranged from 2 MHz to 10 MHz and duty factor varied between 30% and 80% with a controlled ambient temperature at 70℃. It was observed that mean time to failure was inversely proportional to the current density and duty factor. Higher frequency leads to a shorter lifetime within the frequency range we studied. Scanning electron microscope image shows that damage develops at both current crowding corners and the skin layer of solder joints. A mean time-to-failure relationship of lead-free solder joints under pulsed current loading is proposed based on the experimental data.

Investigation on the multi-voids formation during electromigration degradation in dual damascene Cu lines

The work described in the present paper is about electromigration induced void formation mechanisms in Cu lines. An unusual behavior observed on the electrical resistance of some samples suggests the presence of more than one void in the stressed lines. The scope of this paper is about the origin of these voids; mainly how they appear in the lines and how they affect the Cu lines reliability.

Electromigration in Lead – Free Solder: A Power IC Perspective

Over the past few years, lead - free solder interconnects have been significantly incorporated into electronic products, and are increasingly found in high performance computing systems and in their associated power electronics. As power and current levels increase within these products, the overall reliability of a lead-free solder based system can be impacted by an increasing risk of finding electromigration (EM) degradation during the product lifetime, especially if the product is operating at higher temperatures and with very high current densities. This paper provides a high-level technical overview of lead-free electromigration and describes the key factors and issues that can influence the EM performance of lead-free interconnects, especially in the environments in which power electronics are typically found.

Oxygen-Induced Barrier Failure in Ti-Based Self-Formed and Ta/TaN Barriers for Cu Interconnects

To understand the electromigration degradation in Cu interconnects that utilize the TiOx self-formed barrier (SFB) probably due to Cu oxidation at the Cu/barrier interface, Cu films deposited on TiOx SFB and conventional Ta/TaN barriers were annealed in atmospheres of various oxygen concentrations. The Ta layer was preferentially oxidized to give Ta2O5, and contained a large amount of oxygen. The barrier layer, which consisted of Ta2O5 and Ta(O), could not suppress Cu diffusion. The TaN layer seemed to remain even after annealing at 400 °C in 10 ppm O2, and still suppressed Cu diffusion. This suggests that the TaN layer plays a key role to suppress barrier failure induced by oxygen originating from pores in dielectrics. On the other hand, the oxygen-induced barrier failure was observed in the TiOx SFB after annealing at 500 °C in 5 ppm O2 and more. Oxygen facilitated Cu2O formation above the TiOx SFB, and the Cu2O formation caused discontinuity of the TiOx SFB, leading to the barrier failure. The less oxidized Ti2O3 and TiO in the TiOx SFB were not further oxidized to TiO2 by oxygen in atmospheres, and thus they would not be oxygen absorbers suppressing the Cu2O formation above the barrier. Thus, for suppressing the Cu2O formation, it is essential to increase oxygen barrier ability of the TiOx SFB (probably increasing Ti concentration of the TiOx SFB).

Electromigration analysis of solder joints under ac load: A mean time to failure model

In this study, alternating current (ac) electromigration (EM) degradation simulations were carried out for Sn95.5%Ag4.0%Cu0.5 (SAC405- by weight) solder joints. Mass transport analysis was conducted with viscoplastic material properties for quantifying damage mechanism in solder joints. Square, sine, and triangle current wave forms ac were used as input signals. dc and pulsed dc (PDC) electromigration analysis were conducted for comparison purposes. The maximum current density ranged from 2.2×106A/cm2 to 5.0×106A/cm2, frequency ranged from 0.05 Hz to 5 Hz with ambient temperature varying from 350 K to 450 K. Because the room temperature is nearly two-thirds of SAC solder joint’s melting point on absolute temperature scale (494.15 K), viscoplastic material model is essential. Entropy based damage evolution model was used to investigate mean time to failure (MTF) behavior of solder joints subjected to ac stressing. It was observed that MTF was inversely proportional to ambient temperature T1.1 in Celsius and also inversely proportional to current density j0.27 in A/cm2. Higher frequency will lead to a shorter lifetime with in the frequency range we studied, and a relationship is proposed as MTF∝f-0.41. Lifetime of a solder joint subjected to ac is longer compared with dc and PDC loading conditions. By introducing frequency, ambient temperature and current density dependency terms, a modified MTTF equation was proposed for solder joints subjected to ac current stressing.

Investigation of smart power DMOS devices under repetitive stress conditions using transient thermal mapping and numerical simulation

Temperature distribution in diced and packaged DMOS devices subjected to repetitive stress is analyzed using transient interferometric mapping (TIM) technique combined with measurements on diode built-in temperature sensors. The effect of DMOS device position on dice, duty cycle and chip ambient temperature on thermal distribution is studied. The TIM experiments and transient temperature measurements are in good agreement with numerical 3D thermal simulations. Failure analysis data after long term pulse stress testing indicate electromigration degradation of the top metal.

Suppression of Electromigration Early Failure of Cu/Porous Low-k Interconnects Using Dummy Metal

The electromigration (EM) lifetime of Cu/porous low-k interconnects was evaluated by EM experiments in which the effect of back-flow stress was negligible. The EM lifetime of the downstream mode was reduced using a porous low-k film (SiOCH) as an intermetal dielectric (IMD) in comparison with using a SiO2 dielectric. The reduction in EM lifetime was observed only at low cumulative failure probability, considered as “early failure”. The early failure was caused by the formation of a slit void under a via. It was found that the early failure was suppressed by placing a dummy metal near the metal/via contact that inhibited the formation of a slit void. The EM degradation of Cu/porous low-k interconnects is likely to be caused by the mechanical properties of porous low-k film. The dummy metal supports the porous low-k film near the metal/via contact, which leads to improved EM.

Geometry and Microstructure Effect on EM-Induced Copper Interconnect Degradation

Statistical analysis of electromigration (EM) lifetimes of inlaid copper interconnects, in situ microscopy experiments at embedded inlaid copper interconnect structures, and numerical simulations of grain growth and EM degradation processes are necessary for future on-chip interconnect systems with high immunity to EM-induced failure. Experimental results, i.e., statistics of lifetime and void distributions, copper microstructure data from electron backscatter diffraction studies, as well as in situ scanning electron microscopy and transmission X-ray microscopy studies of EM degradation processes, are discussed for inlaid interconnect structures, varying geometry and process conditions. EM failure statistics for a large number of interconnects and in situ studies for a selected number of samples, which allow to visualize the time-dependent evolution of voids, demonstrate that interconnect degradation and, eventually, interconnect failure depend on interface bonding and the copper microstructure. With decreasing interconnect dimensions, the copper microstructure will become more critical for interconnect reliability.

Microstructure Effect on EM-Induced Degradations in Dual Inlaid Copper Interconnects

A novel physical model and a simulation algorithm are used to predict electromigration (EM)-induced stress evolution in dual inlaid copper interconnects. The aim of the current simulation was to investigate the dual effect of the microstructure, which consists of the effect of grain boundaries (GBs) and the effect of texture-related variations of the modulus of elasticity on the stress evolution in copper lines caused by EM. The major difference between our approach and the previously described ones is the accounting of additional stress generated by the plated atoms. The results of the numerical simulation have been proven experimentally by EM degradation studies on fully embedded dual inlaid copper interconnect test structures and by subsequent microstructure analysis, mainly based on electron backscatter diffraction (EBSD) data. The virtual EM-induced void formation, movement, and growth in a copper interconnect were continuously monitored in an <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">in</i> <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">situ</i> scanning electron microscopy experiment. The copper microstructure, particularly the orientation of grains and GBs, was determined with EBSD. For interconnects with interfaces that resist atomic transport and where GBs are the important pathways for atom migration, degradation and failure processes are completely different for microstructures with randomly oriented GBs compared with ldquobamboolikerdquo microstructures. The correspondence between simulation results and experimental data indicates the applicability of the developed model for optimization of the physical and electrical design rules.