Electrical Characteristics Of Thin-film Transistors Research Articles

Modeling of Electrical Characteristics of Thin-Film Transistors Based P3HT:ZnO Blend: Channel Length Layer Effect

Modeling of Electrical Characteristics of Thin-Film Transistors Based P3HT:ZnO Blend: Channel Length Layer Effect

Fine-Tunable Emission Pulse Generation Circuit Based on p-Type Low-Temperature Poly-Si Thin-Film Transistors for Active Matrix Organic Light-Emitting Diode Displays

Active matrix organic light-emitting diode (AMOLED) displays have deployed the compensation techniques to cope with the luminance non-uniformity issues caused by variations on electrical characteristics of thin-film transistors (TFTs). While some compensation circuits require control signals of longer pulse widths than a line time, the luminance control as well as the higher bit depth representation have been also accomplished by adjusting the pulse widths. A proposed EM pulse generation circuit consists of 11 p-type low-temperature poly-Si (LTPS) TFTs and a one coupling capacitor. While previous tunable circuits could address pulse widths of either even or odd multiples of a line time, the proposed circuit can generate any multiples by changing phases of additional clock signals. In particular, the internal inverter is implemented with a load connected to the output of a previous stage’s inverter to reduce the power consumption over pulse widths. The coupling capacitor is also connected between two adjacent stages through one TFT, eliminating coupling noises on the output pulses. The proposed EM circuit is simulated at a line time of 3.8 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu$</tex-math> </inline-formula> s for a 120 Hz <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\text{3840}$</tex-math> </inline-formula> <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\times $</tex-math> </inline-formula> <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\text{2160}$</tex-math> </inline-formula> display. The results ensure that pulse widths from three to 2160 lines are generated successfully without coupling noises and the small variation on power consumption from 1.23 to 0.33 mW is achieved at 30 stages for the whole range of pulse widths, compared to the large range from 1.26 to 76.91 mW with the inverter of a diode-connected load.

Observation of Hydrogen-Related Defect in Subgap Density of States and Its Effects Under Positive Bias Stress in Amorphous InGaZnO TFT

In amorphous oxide semiconductors, hydrogen-related defects have been unable to be observed from the electrical characteristics of thin-film transistors (TFTs) in comparison to oxygen-related defects. Here, the hydrogen-related defect is observed as the Gaussian distributed density of states (DoS) in ${E}_{\text {C}}-{0.6}$ eV level by using the photoresponse of C-V characteristics in In-Ga-Zn-O (IGZO) TFTs. Coupled with X-ray photoelectron spectroscopy (XPS), it is identified as hydroxide ion (OH−), which both passivates oxygen vacancy defects and supplies the carriers as shallow donors. Furthermore, the evolution of DoS under positive bias stress and its origin are comparatively investigated for IGZO TFTs with three types of gate insulators (GIs), such as low-temperature atomic layered deposited Al2O3, thermally grown SiO2, and double-layered GIs.

Impact of Dehydrogenation Annealing Process Temperature on Reliability of Polycrystalline Silicon Thin Film Transistors

This letter investigates variations in polycrystalline silicon thin film transistor (TFT) performance under illumination and negative bias temperature instability (NBTI) tests due to different dehydrogenation annealing temperatures during the fabrication process. The depth of the density of state (DOS) in polysilicon can be indirectly determined by the TFT response to light illumination, since dangling bonds act as recombination centers. The electrical characteristics of TFTs after undergoing NBTI can also be indicative of the bonding type of silicon atoms. By analyzing the results of these reliability tests, the type of DOS can be clarified, which is beneficial for realizing the relationship between performance and reliability.

Investigation of the Capacitance-Voltage Electrical Characteristics of Thin-Film Transistors Caused by Hydrogen Diffusion under Negative Bias Stress in a Moist Environment.

In this study, the impact of moisture on the electrical characteristics of an amorphous In-Ga-Zn-O thin-film transistor (a-IGZO TFT) was investigated. In commercial applications of such TFTs, high stability and quality performance in humid environments are essential. During TFT operation under ambient moisture, the electrolysis of water molecules occurs via the tip electric field effect. Hydrogen diffuses from the etch-stop layer or back-channel into the main channel under a negative electric field. The hydrogen atoms act as shallow donors (which causes the carrier concentration in the channel to rise), causing the threshold voltage (VTH) to shift in the negative direction. Hydrogen diffusion from the overlap of the source/drain and gate electrodes to the channel center caused by the tip electric field induces a significant barrier lowering and VTH shifts in a short-channel device. However, under negative bias stress (NBS) in ambient moisture, the negative VTH shift is more obvious in short- than in long-channel devices, indicating suppressed hydrogen diffusion in long-channel devices. This is attributed to the electrolysis of water by the tip electric field at the source, drain, and gate electrodes, which causes hydrogen to diffuse to the center of the channel. Here, a novel physical model of the capacitance-voltage (C-V) electrical property changes under ambient moisture is proposed, based on the early appearance of abnormalities in the C-V measurements. The electrolysis of water caused by the tip electric field and electrical abnormalities caused by hydrogen diffusion into the a-IGZO active layer are explained by this model. A secondary-ion mass spectrometry analysis shows that hydrogen content in the channel generally increases under NBS in ambient moisture. The degradation behavior due to moisture in a-IGZO is clarified. Thus, inhibiting the tip electric field may benefit future flexible-display and gas-sensing applications.

Artificially Fabricated Subgap States for Visible-Light Absorption in Indium-Gallium-Zinc Oxide Phototransistor with Solution-Processed Oxide Absorption Layer.

We present a solution-processed oxide absorption layer (SAL) for detecting visible light of long wavelengths (635 and 532 nm) for indium-gallium-zinc oxide (IGZO) phototransistors. The SALs were deposited onto sputtered IGZO using precursor solutions composed of IGZO, which have the same atomic configuration as that of the channel layer, resulting in superior interface characteristics. We artificially generated subgap states in the SAL using a low annealing temperature (200 °C), minimizing the degradation of the electrical characteristics of thin-film transistor. These subgap states improved the photoelectron generation in SALs under visible light of long wavelength despite the wide band gap of IGZO (∼3.7 eV). As a result, IGZO phototransistors with SALs have both high optical transparency and superior optoelectronic characteristics such as a high photoresponsivity of 206 A/W and photosensitivity of ∼106 under the influence of a green (532 nm) laser. Furthermore, endurance tests proved that the IGZO phototransistor with SALs can operate stably under red laser illumination switched on and off at 0.05 Hz for 7200 s.

High-Performance Amorphous Zinc–Tin–Oxide Thin-Film Transistors With Low Tin Concentration

In this paper, we present thin-film transistors (TFTs) with a zinc–tin–oxide (ZTO) layer achieved through magnetron co-sputtering. Amorphous ZTO TFTs with an Sn concentration of 2.49%, 6.95%, 7.11%, 11.95%, and 16.47% were fabricated, to investigate the effect of low-doped Sn. With a doping of 2.49% Sn, the electrical characteristics of TFTs can be obviously improved. After annealing at 440 °C, the optimal TFTs displayed a field-effect mobility of 8.71 cm2/ $\text{V}\cdot \text{s}$ , a high $\text{I}_{\mathrm{ on/off}}$ ratio of over $10^{8}$ , a subthreshold swing of 0.17 V/decade, and a turn-on voltage of −0.4 V, even with an Sn concentration of only 11.95%. Meanwhile, the shift of turn-on voltage under negative gate bias stress was only −0.4 V.

The effect of a source-contacted light shield on the electrical characteristics of an LTPS TFT

The electrical characteristics of a low-temperature polycrystalline silicon thin-film transistor (TFT) with a source-contacted light shield (SCLS) are observed and analyzed. Compared with that of a conventional TFT without a light shield (LS), the on-current of the TFT with an SCLS is lower because the SCLS blocks the fringing electric field from the drain to the active layer. Furthermore, the gate-to-source capacitance (Cgs) of the TFT with an SCLS in the off and saturation regions is higher than that of a conventional TFT, which is due to the gate-to-LS capacitance (Cg-LS). The electrical characteristics of the TFT with an SCLS are thoroughly investigated by two-dimensional device simulations, and a semi-empirical Cg-LS model for SPICE simulation is proposed and verified.

Quantum-Mechanical Analysis of Amorphous Oxide-Based Thin-Film Transistors

In this paper, we analyzed the electrical characteristics of amorphous oxide-based thin-film transistors (TFTs) with extremely thin active layers using a quantum-mechanical method (density gradient method) and a technology computer-aided design simulator. We observed that the evaluation of the TFT performance using the classical method resulted in errors, especially, when the interfacial-defect density of states was high. The electrical characteristics of the TFTs are influenced differently by the bulk and interfacial states when the quantum-mechanical effect is considered. Therefore, it is essential to apply the quantum effect to analyze the electrical characteristics of amorphous oxide-based TFTs with extremely thin active layers.

P-50: Application of High Temperature Debonding Layer in the Fabrication of Flexible AMOLED Displays

Flexible AMOLED display has received great attention in recent years. In this paper, we provided a method of fabricating flexible AMOLED display by using a nanocomposite material as a debonding layer (DBL). This material provided flexible substrate with good debonding capability even after 450°C low-temperature poly-silicon (LTPS) process. After array and OLED process, the panels were released by the mechanical roller debondor(MRD). The effect of temperature on debonding force of flexible substrate was investigated. Besides, electrical characteristics of thin-film transistors (TFT) and pitch variation after separation were also studied. Finally, the fixed curvature of Flexible AMOLED display was showed.

급속 열처리가 a-IGZO 박막의 전도에 미치는 영향

The conduction behavior and electron concentration change in a-IGZO thin-films according to the RTA (rapid thermal annealing) were studied. The electrical characteristics of TFTs (thin-film-transistors) annealed by different temperatures were measured. The sheet resistance, electron concentration, and oxygen vacancy of a-IGZO film were measured by the four-point-probe-measurement, hall-effect-measurement, and XPS analysis. The RTA process increased the driving current of IGZO TFTs but the VTH shifted to the negative direction at the same time. When the RTA temperature is higher than , the leakage current at off-state increased significantly. This is attributed to the increase of oxygen vacancy resulting in the increase of electron concentration. We demonstrate that the RTA is a promising process to adjust the VTH of TFT because the RTA process can easily modify the electron concentration and control the conductivity of IGZO film with short process time.

Improved Performance of Amorphous InGaZnO Thin-Film Transistor With &lt;inline-formula&gt; &lt;tex-math notation="TeX"&gt;$\hbox{Ta}_{2}\hbox{O}_{5}$&lt;/tex-math&gt;&lt;/inline-formula&gt; Gate Dielectric by Using La Incorporation

In this paper, a comparative study of amorphous InGaZnO thin-film transistors with $\hbox{Ta}_{2}\hbox{O}_{5}$ and TaLaO gate dielectrics has been conducted. It is found that the electrical characteristics of thin-film transistors, including saturation carrier mobility, subthreshold swing, hysteresis, and on-off current ratio, can be effectively improved by the incorporation of La in $\hbox{Ta}_{2}\hbox{O}_{5}$ gate dielectric, which is ascribed to the fact that La incorporation can enlarge the bandgap of Ta oxide and its conduction-band offset with InGaZnO and also reduce the trap densities in the gate dielectric and at the InGaZnO/gate-dielectric interface. As a result, the sample with higher La concentration in the gate dielectric presents superior electrical characteristics, e.g., a high carrier mobility of $\hbox{30.9} \hbox{cm}^{2}/\hbox{V}\cdot\hbox{s}$ , a small subthreshold swing of 0.17 V/dec, and slight hysteresis. Moreover, low-frequency noise measurement and X-ray photoelectron spectrum further support that the improvements in electrical properties are due to reduced trap densities induced by the incorporation of La in the $\hbox{Ta}_{2}\hbox{O}_{5}$ gate dielectric.

Enhancement of the electrical characteristics of thin-film transistors with indium–zinc–tin oxide/Ag/indium–zinc–tin oxide multilayer electrodes

Transparent indium–zinc–tin oxide (IZTO)-based thin-film transistors (TFTs) with IZTO/Ag/IZTO multilayer electrodes were fabricated on glass substrates using a tilted dual-target radio-frequency magnetron sputtering system. The IZTO TFTs with IZTO/Ag/IZTO multilayer electrodes exhibited a high optical transmittance in a visible region. The threshold voltage, the mobility, and the on/off-current ratio of the TFTs with IZTO/Ag/IZTO multilayer electrodes were enhanced in comparison with those of the TFTs with ITO electrodes. The source/drain contact resistance of the IZTO TFTs with IZTO/Ag/IZTO multilayer electrodes was smaller than that of the IZTO TFTs with ITO electrodes, resulting in enhancement of their electrical characteristics.

Degradation study and calculation of density-of-states in PTCDI-C8 channel layer from the electrical characteristics of thin-film transistors

N-type organic thin film transistor (OTFT) with a top-contact structure was fabricated by thermal vapour deposition using N,N′-Dioctyl-3,4,9,10-perylenedicarboximide (PTCDI-C8) as an n-channel layer on Si/SiO2 substrate. The density of localised states (DOS) in the gap of PTCDI-C8 is estimated by studying the temperature dependence of the electrical characteristics of OTFT. The measurements were done immediately after the devices fabrication (non-degraded devices) and also after 2 h of exposure to air (degraded devices). The extracted field effect mobility decreased from 0.02 to 0.004 cm2 V−1 s−1 and threshold voltage increased from 25.3 to 40.5 V for the degraded OTFT. The degradation of OTFTs was due to the trapping of majority charge carriers in the localised trap states created by adsorbed oxygen in the PTCDI-C8 layer. These localised trap states were found to be situated at around 0.15 eV above the lowest unoccupied molecular orbit level. The study of DOS in OTFTs gives a complete understanding of trap-limited transport in organic thin film semiconductors.

Effect of Oxygen Partial Pressure on Electrical Characteristics of Amorphous Zinc-Tin-Oxide Thin-Film Transistors

We fabricated and studied the electrical characteristics of thin-film transistors with an amorphous zinc-tin–oxide (a-ZTO) channel, which was deposited by radio frequency magnetron co-sputtering under different oxygen partial pressures. The effect of varying the oxygen concentration on the electrical properties and device performance of the a-ZTO TFTs was investigated. A positive shift observed in the threshold voltage with increasing oxygen suggests that the number of oxygen vacancies in the a-ZTO film decreased. With an oxygen flow rate of 4 %, a threshold voltage of 2.25 V, an on-off current ratio of 2.1 × 103, and a subthreshold slope of 0.8 V·dec−1were obtained.

Improved Characteristics of InGaZnO Thin-Film Transistor by Using Fluorine Implant

The effects of fluorine incorporation in amorphous InGaZnO by ion implant on the characteristics of InGaZnO thin-film transistor have been investigated. The electrical characteristics of thin-film transistor can be improved by this treatment due to increase of carrier concentration and passivation of defects in InGaZnO. Consequently, the saturation carrier mobility can be increased from 25.2 cm2/V·s to a high value of 34.0 cm2/V·s, and the output current can be nearly doubled. However, device degradation is observed for very high fluorine dose above 1.0 × 1015 /cm2, possibly ascribed to excessive interstitial fluorine atoms and too many fluorine-induced electrons in InGaZnO.

Poly-silicon thin-film transistors without active layer pattern for high current performance with large operational range

We report the effect of thin-film transistors (TFTs) without an active pattern (TFTs w/o an active pattern) on the improvement of the drain current and on the reduction of the drain-induced barrier lowering (DIBL) effect. The electrical characteristics of TFTs w/o an active pattern are immensely different from those of normal TFTs because they are composed of a channel area with wholly preserved excimer laser annealing processed poly-silicon (poly-Si) and a specially designed gate electrode. An un-etched poly-Si layer can be utilized as a channel region by designing the gate metal. The extended electric field following the shape of the gate electrode increases the drain current by six to seven times compared to that of normal TFTs. Furthermore, the extended channel area can reduce the DIBL effect considerably. Since the un-etched poly-Si layer has no sharp slope angles or tips on the edge of the precursor, TFTs w/o an active pattern are highly resistant to breakdowns of the gate insulator. Finally, the reducing photo-lithography process on the precursor layers of TFTs effectively simplifies back-plane fabrication.

Quantitative Extraction of Temperature-Dependent Barrier Height and Channel Resistance of a-SIZO/OMO and a-SIZO/IZO Thin-Film Transistors

Temperature (T)-dependent electrical characteristics of thin-film transistors fabricated using oxide-metal-oxide (OMO) and indium-zinc-oxide (IZO) as electrodes and amorphous silicon-doped IZO (a-SIZO) as channel material were studied. The measured data were fit, using a Schottky diode/resistor/Schottky-diode-equivalent circuit model, to obtain the barrier height and the channel resistance. The barrier height coefficients α of the IZO and OMO electrode devices were found to be 1.59 and 1.61 meV/K, respectively. The T-dependent resistivity of the a-SIZO channel material was consistent with the variable range hopping conduction mechanism.

Electrical Characteristics of Thin-Film Transistors Fabricated Utilizing a UV/Ozone-Treated TiO2 Channel Layer

Thin-film transistors (TFTs) utilizing TiO2 channel layers were fabricated by using a solution process. Atomic force microscopy images showed that the surface morphology of the TiO2 films became uniform due to the ultraviolet (UV)/ozone treatment. X-ray photoelectron spectroscopy showed that the UV/ozone treatment reduced the amount of oxygen deficiency in the TiO2 films, resulting in a decrease of the electron concentration on the surface. The performance of the TFT devices was significantly improved due to a decrease of the off-current level resulting from the enhanced uniformity and the decrease of the trap level resulting from the UV/ozone treatment.

Performance improvement with a combined scheme of rapid thermal annealing and multi-channel structure for poly-Si TFTs with various device dimensions

This study presents a combined scheme of rapid thermal annealing (RTA) and multi-channel structure for improving the performance of polycrystalline silicon (poly-Si) thin film transistors (TFTs). Results show that RTA treatment can improve device performance by decreasing the number of in-grain defects and improving the quality of the gate oxide. The multi-channel structure improves the electrical characteristics of the poly-Si TFTs by decreasing the number of grainboundary defects. Thus, the combined scheme can effectively reduce defect states and improve the gate-oxide’s quality simultaneously, resulting in a significant improvement in the performance of poly-Si TFTs. In addition, the performance improvement is particularly apparent for the TFTs with a thinner gate oxide and smaller channel length. Therefore, the proposed scheme is a good candidate for improving the electrical characteristics of TFTs for use in small-to-medium size displays.