Effect Of Substrate Resistivity Research Articles

Current-voltage simulation analysis of MIS structure utilizing aluminium nitride on high resistivity silicon

High resistivity silicon is increasingly becoming one of the subjects of interest in optimizing the performance of MIS photodetectors as it offers better bias responses compared to low resistivity silicon. The incorporation of thin AlN as the tunnelling insulator in MIS structure utilizing high resistivity silicon has shown promising photocurrent to dark current ratios, suggesting potential integration of the structure. In this work, the MIS structure on high resistivity silicon with AlN tunnelling insulator is simulated and empirically modelled using previous experimental work. The effects of substrate resistivity and AlN thickness are then evaluated. Simulation work shows good agreement with the previous experimental work, except for the photocurrent characteristics in the inversion region, where the recorded values are 107 magnitude lower than the reported experimental values. The photocurrent characteristics for MIS structures on high resistivity silicon is recorded to be higher than the structures on low resistivity silicon. Meanwhile, both dark current and photocurrent increases with decreasing AlN thickness up until 1 nm. Lastly, no conclusive evidence from this simulation work to show any tunnelling behaviour in the inversion region for all cases.

Test beam measurement of ams H35 HV-CMOS capacitively coupled pixel sensor prototypes with high-resistivity substrate

In the context of the studies of the ATLAS High Luminosity LHC programme, radiation tolerant pixel detectors in CMOS technologies are investigated. To evaluate the effects of substrate resistivity on CMOS sensor performance, the H35DEMO demonstrator, containing different diode and amplifier designs, was produced in ams H35 HV-CMOS technology using four different substrate resistivities spanning from 80-1000 ohm cm-1. A glueing process using a high-precision flip-chip machine was developed in order to capacitively couple the sensors to FE-I4 Readout ASIC using a thin layer of epoxy glue with good uniformity over a large surface. The resulting assemblies were measured in beam test at the Fermilab Test Beam Facilities with 120 GeV protons and CERN SPS H8 beamline using 180 GeV pions. The in-time efficiency and tracking properties measured for the different sensor types are shown to be compatible with the ATLAS ITk requirements for its pixel sensors.

Efficient Modeling of Crosstalk Noise on Power Distribution Networks for Contactless 3-D ICs

An efficient and frequency-dependent model describing the crosstalk noise on power distribution networks due to inductive links in contactless 3-D ICs is presented. A two-step approach is followed to model the crosstalk effect. During the first step, the mutual inductance between the power distribution network and the inductive link is analytically determined. Due to the weak dependence of mutual inductance to frequency, a magnetostatic model is proposed for this step. The model includes the physical and electrical characteristics of both the on-chip inductor and the wires of the power distribution network. In this way, different power network topologies can be modeled facilitating noise analysis in the vicinity of the on-chip inductor. This approach is justified by the typical use of regular power network topologies in modern integrated circuits. In the second stage, the noise is assessed with SPICE simulations, considering the mutual inductance between the two structures from the first step and the resistance variations due to high frequency effects. Thus, an efficient, scalable, and accurate method for the analysis of the crosstalk effects due to inductive links is provided, without resorting on computationally expensive and time consuming full-wave simulations. Compared with the full-wave simulations, the induced noise is evaluated four orders of magnitude faster with the proposed model. The accuracy of the proposed model is within 10% of the respective noise computed with a commercial electromagnetics simulator using the finite element method. An analysis including the effect of substrate resistivity on the crosstalk noise is also presented.

Impact of substrate resistance and layout on passivation etch-induced wafer arcing and reliability

Wafer arcing, as a form of plasma-induced damage, occurs randomly, varies among different products and introduces problems into production yield and reliability. Conventional arcing theory is based on substrate conductive paths, for which the arcing frequency decreases as the substrate resistance increases. However, we observed the reverse result, i.e., silicon-on-insulator (SOI) and integrated passive device (IPD) wafers with high substrate resistance suffered a high frequency of passivation (PA) etch-induced arcing. In addition, the newly developed through silicon vias (TSV) interposer process for three-dimensional (3D) packaging also encountered a similar problem. To explain and solve these problems, we used substrates of different resistivities using the arcing-enhanced method to study this PA etch-induced wafer arcing phenomenon and revealed the mechanism underlying the effect of substrate resistance, the role of the seal ring, the root cause of the layout’s effect on arcing frequency and the impact on reliability. Next, we determined that the reduction in arcing relies on the simultaneous optimization of the process and the layout and observed that the reduction of the arcing source helps to improve product reliability. Finally, improvement methods and guidelines were proposed for both the process and the layout.

Effects of substrate resistivity and interface defect density on performance of solar cell with silicon heterojunctions

For silicon heterojunction solar cell with p-type a-Si:H back surface field, the effects of substrate resistivity on the performance of solar cell with different defect densities on the front and the rear surfaces of the p-type c-Si wafer are investigated numerically by computer simulation. The results indicate that the optimized resistivity of the substrate (ρop) is related to the interface defect density on the front surface of c-Si wafer (Dit1), and ρopincreases with the increase of Dit1.The value scale of resistivity of substrate is influenced greatly by the interface defect density on the rear surface of c-Si wafer (Dit2) for ρ>ρop, and the larger the value of Dit2, the smaller will the range of acceptable ρ value be.

Large-signal analysis of substrate effects in RF-power SOI-LDMOS transistors

Large-signal analysis of RF-power SOI-LDMOS transistors has been done on devices with different substrates resistivities. The effect of substrate resistivity on efficiency and output power has been investigated in class-AB operation and especially the loss mechanisms are studied. The large-signal performance is compared with the small-signal performance in an attempt to couple those parameters more tightly to each other. It is shown that the resistivity has great impact on the efficiency of the devices and the differences are related to losses in the substrate. The result verifies earlier indications that either a very high or very low substrate resistivity is beneficial to minimize the substrate losses. The study also shows interesting connections between the small-signal output resistance and capacitance and their large-signal counterparts derived from optimum load impedances.

Substrate resistance in composite membranes for organic vapour/gas separations

Composite membranes with a rubbery polymer skin layer are promising for the separation of organic vapours (e.g., light olefins and volatile organic compounds (VOCs)) from nitrogen for emission control and recovery of valuable components. Because of the high flux of composite membranes, the resistance of the substrate becomes increasingly important to the overall permeation. The effect of substrate resistance on gas permeation was studied using flat poly(ether block amide)/polysulfone (PEBA/PSf) and poly(dimethyl siloxane)/polyetherimide (PDMS/PEI) hollow fiber composite membranes. It was found that for a given substrate, the selectivity of the PEBA/PSf membrane for the separation of binary methanol/N 2 and ethanol/N 2 mixtures decreased as the PEBA skin layer thickness was reduced. The selectivity of the PDMS/PEI composite membrane to C 2H 4/N 2 and C 3H 6/N 2 was much lower than the intrinsic selectivity of PDMS. This is attributed to the substrate resistance that represents a significant contribution to the overall mass transport resistance for the permeation of highly permeable components (e.g., VOCs), while the skin layer may still dominate the permeation of slow permeant (e.g., N 2). Depending on the magnitude of the substrate resistance relative to the skin layer, the membrane permselectivity can be compromised substantially. In the development of advanced composite membranes, when the skin thickness is reduced, the substrate structure should be optimized so as to minimize the effect of the substrate resistance.

Prey versus substrate as determinants of habitat choice in a feeding shorebird

Many shorebirds on their non-breeding grounds feed on macrobenthic fauna which become available at low tide in coastal intertidal flats. The Eastern Curlew Numenius madagascariensis in Moreton Bay Australia, varies greatly in density among different tidal flats. This study asks: how important is the abundance of intertidal prey as a predictor of this variation? We quantified feeding curlews’ diet across 12 sites (different tidal flats, each re-visited at least eight times), through 970 focal observations. We also estimated the abundance of total macrobenthic fauna, potential prey taxa and crustacean prey on each tidal flat; measured as the number of individuals and a relative biomass index per unit substrate surface area obtained from substrate core samples. We estimated curlew density at each site using low-tide surveys from every site visit. Curlew density showed a strong positive association with both the density and biomass of fauna and of potential prey ( r values all around 0.70) across the 12 flats. Associations with crustacean density and biomass were also statistically significant (r values both 0.60). However, these variables also showed a strong negative correlation with a measure of substrate resistance (based on the amount of hard material in the substrate core), which was the best predictor of curlew density ( r = −0.82). Curlews were most abundant at sites with the least resistant substrate, and these sites also generally had the highest faunal density and biomass. When the effect of substrate resistance was statistically removed, curlew density was no longer significantly correlated with fauna density and biomass. This suggests that macro-scale habitat choice by Eastern Curlew on their non-breeding grounds is more strongly influenced by prey availability (which is higher when substrate resistance is lower) than by prey density or biomass, although in Moreton Bay a positive correlation across sites meant that these factors were synergistic.

Investigation of SOI-LDMOS for RF-Power Applications Using Computational Load Pull

Small-signal and computational load-pull simulations are used to investigate the effect of substrate resistivity on efficiency in high-power operation of high-frequency silicon-on-insulator-LDMOS transistors. Identical transistors are studied on substrates with different resistivities. Using computational load pull, their high-power performance is evaluated. The results are compared to previous investigations, relating the off-state output resistance to high-efficiency operation. From the large-signal simulation, an output circuit model based on a load-line match is extracted with parameters traceable from small-signal simulations. It is shown that, albeit high off-state output resistance is a good indication, it is not sufficient for high efficiency in a high-power operation. The bias and frequency dependence of the coupling through the substrate makes a more detailed on-state analysis necessary. It is shown that very low resistivity and high-resistivity SOI substrates both result in a high efficiency at the studied frequency and bias point. It is also shown that a normally doped medium-resistivity substrate results in a significantly lower efficiency.

A 5.2-GHz cascade-mos 0.35-?m BiCMOS technology ultra-low-power LNA using a novel floating-body method

We report on a 5.4-mW ultra-low dc-power MOS LNA at 5.2 GHz, which is implemented based on 0.35-μm BiCMOS technology. The small-signal substrate resistance effect on the drain node of the common-source amplifiers is investigated. Also, the use of the floating method improves both the power gain and noise figure (NF) of MOS LNA. This amplifier achieves a Gain/NF × PDC ratio figure of merit of 0.402 (l/mW), which is the best reported at the 5-GHz band and is suitable for 5.2-GHz wireless LAN applications. © 2005 Wiley Periodicals, Inc. Microwave Opt Technol Lett 45: 363–367, 2005; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.20824

Optimizing the response of Schottky barrier position sensitive detectors

One of the key criteria in measuring the effectiveness of position sensitive detectors (PSDs) is that of sensitivity—how large an electrical signal can be produced for a given change in the incident light position. The larger the signal produced, then the less additional electronics for amplification required. In this paper we report on optimizing device response by altering substrate thickness and substrate resistivity. We have found that thinner substrates result in greatly increased sensitivities with equal if not improved linearities compared with the equivalent thicker substrate devices. In this work we compare three Schottky metals, Al, Ti and Ta. The improvements in sensitivities for Al devices were greatest at more than 100%, while with Ti and Ta, improvements were better than 50%. Another aspect of the work currently under investigation is the effect of substrate resistivity on the sensitivity and linearity of devices. Preliminary results so far show that high resistivity devices produce markedly higher sensitivities but also respond more to levels of background light, to which low resistivity devices are essentially impervious.

Modeling and Optimization of Substrate Resistance for RF-CMOS

A predictive, physically based substrate resistance model for CMOS transistors operating at radio frequencies (RF) is described. This analytical model is scalable with transistor size and layout geometry. Measurement results confirm that the model accurately predicts the effect of substrate resistance on the transistor output impedance up to 20 GHz, including gate and drain bias dependencies. Minimization of the substrate resistance can be achieved by using substrate tap rings with small spacer distances and short finger widths.

Small-signal substrate resistance effect in RF CMOS cascode amplifier

With common-source RF application amplifier, it is well known that the small substrate resistance helps to improve the output resistance as well as the transconductance. This idea can be easily extended to all CMOS transistors in RF applications. However, with cascode amplifier at high frequencies, the maximum available gain, noise figure minimum, and the tuned output impedance are improved by increasing the substrate resistance of the common-gate transistor, so that the range of operational frequency can be extended. These contradicting phenomenons between the common-source and common-gate topology can be explained theoretically, and the supporting measurement results are presented base on a 0.35 μm CMOS technology.

An analysis of small-signal substrate resistance effect in deep-submicrometer RF MOSFETs

Two different explanations of the S/sub 22/ kink phenomenon in deep-submicrometer RF MOSFETs have been reported: Hjelmgren and Litwin (see IEEE Trans. Electron Devices, vol.48, no.2, p.397-399, 2001) attributed the phenomenon to the substrate resistance, while Lu et al. (see ibid., vol.49, no.2, p.333-340, 2001) concluded that it results from the transconductance, or simply speaking, the size of the transistor. In this paper, we extend the dual-feedback circuit methodology for the three-terminal FET model proposed by Lu et al. into a more general four-terminal model in order to account for the influence of the substrate resistance. Our results show that, for a given MOSFET, either substrate resistance or transconductance may cause a kink in S/sub 22/. In addition to the single kink, which results from the above two factors, the double kinks, which appear when the substrate resistance of a MOSFET is within a middle range (approximately 10/sup 2/ to 10/sup 4/ /spl Omega/), can also be accounted for by our extended model. Experimental data representative of 0.25 /spl mu/m gate MOSFETs are adopted to verify our theory. Excellent agreement between theoretical values and experimental data has been found, which indicates our theory can successfully explain the S/sub 22/ kink phenomenon in deep-submicrometer RF MOSFETs.

A 5.2-GHz LNA in 0.35-μm CMOS utilizing inter-stage series resonance and optimizing the substrate resistance

A current-reused two-stage low-noise amplifier (LNA) topology is proposed, which adopts a series inter-stage resonance and optimized substrate resistance of individual transistors. The characteristics of the series inter-stage resonance in gain enhancement are analyzed and compared with other alternatives. The contradicting effects of substrate resistance on common-source and common-gate amplifiers are analyzed and proposed guidelines for high-gain operation. The LNA is implemented based on a 0.35-μm CMOS technology for 5.2-GHz wireless LAN applications. Measurements show 19.3dB of power gain, 2.45 dB of noise figure, and 13.2 dBm of output IP3, respectively, for the dc power supply of 8 mA and 3.3 V.

Small-signal substrate resistance effect in RF CMOS identified through device simulations

An anomalous dip in the measured s/sub 22/ characteristic, as well as a decrease in the output resistance, of MOS devices for rf applications was found to be a pure ac effect caused by the small-signal substrate transconductance. The study of the ac characteristics of multifinger transistors in rf applications with a high-resistivity substrate also puts a question mark on the possibility of achieving fully scalable models, considering the observed ac substrate effect.

Effect of Substrate on “On‐Resistance” of a Power Metal‐Oxide Semiconductor Field‐Effect Transistor Device

The on‐resistance of a power metal‐oxide semiconductor field‐effect transistor device was found to differ dramatically based on substrate supplier. Differences in substrate resistance could not account for the observed change in the total device on‐resistance, . Other possible factors, bulk microdefects generated by oxygen precipitation and drain contact resistance, could affect the observed difference in and were investigated accordingly. Substrates from three different suppliers with and without the addition of a 2 h, 700°C precipitation nucleation heat cycle were compared. The difference in bulk microdefect densities between the substrates could not account for the observed change in . By adding an aluminum backmetal layer prior to the deposition of the TiNiAg backmetal, was decreased regardless of the prebackmetal cleaning process. This revealed that the effect of substrate resistivity on the contact resistance of backmetal was the dominant cause of discrepancies between the substrates. © 1999 The Electrochemical Society. All rights reserved.

Substrate Resistance Effect on Charge-Pumping Current in Polycrystalline Silicon Thin Film Transistors

A model is proposed to explain the pulse transition time dependence of the charge-pumping current in polycrystalline silicon thin film transistors (poly-Si TFTs). When the gate pulse transition times are short, the charge-pumping current is increased abnormally due to the substrate resistance of poly-Si TFTs. The model is in good agreement with measured charge-pumping current, which enables accurate trap characterization.

A Novel Body-Tied Silicon-On-Insulator(SOI) n-channel Metal-Oxide-Semiconductor Field-Effect Transistor with Grounded Body Electrode

A novel body-tied silicon-on-insulator(SOI) n-channel metal-oxide-semiconductor field-effect transistor with grounded body electrode named GBSOI nMOSFET has been developed by wafer bonding and etch-back technology. It has no floating body effect such as kink phenomena on the drain current curves, single-transistor latch and drain current overshoot inherent in a normal SOI device with floating body. We have characterized the interface trap density, kink phenomena on the drain current () curves, substrate resistance effect on the curves, subthreshold current characteristics and single transistor latch of these transistors. We have confirmed that the GBSOI structure is suitable for high-speed and low-voltage VLSI circuits.

The effect of substrate resistivity on threshold voltage shifts due to radiation-induced damage in IGFET

This paper describes the dependence of the radiation-induced threshold voltage shift (δVt) of n-channel IGFET devices on the substrate doping concentration and the concentration of segregated boron atoms in the oxide. Substrate resistivities of 0.1 and 0.5 Ω/cm were used. The thicknesses of the investigated gate oxides varied from 17.0 to 50.0 nm. The devices were irradiated with Al Kα (1.49 keV) X-rays to different radiation doses at identical dose rates. The threshold voltages were measured before and after irradiation, employing an optically assisted hot electron injection technique. Following irradiation and hot electron injection, the threshold voltage shifts due to fixed positive charge (ΔVFPC) and neutral electron traps (ΔVNET) were determined. The radiation-induced threshold voltage shifts due to FPCs were greater for the 0.5 Ω/cm wafer than for the 0.1 Ω/cm wafer, and the threshold voltage shifts due to NETs were greater for the 0.1 Ω/cm substrate. The interface concentration of boron in the oxide at different depths obtained from Suprem-III simulations was related to induced threshold voltage shifts.