Effective Generation Lifetime Research Articles

Investigation of metal contamination induced by a through silicon via reveal process using direct Si/Cu grinding and residual metal removal

We investigated metal contamination induced by a through silicon via (TSV) reveal process using direct Si/Cu grinding and residual metal removal. A complementary metal oxide semiconductor (CMOS) wafer including TSVs was bonded to a glass support substrate, and a TSV reveal process was performed by direct Si/Cu grinding and residual metal removal. Then, metal contamination near the SiO2/Si interface on the front side of the wafer was investigated by using a pulsed-MOS capacitor technique and measuring the effective generation lifetime and effective surface generation velocity before and after this TSV reveal process. The results of Zerbst analysis showed that the changes in average effective generation lifetime and average effective surface generation velocity were −5.4 and +4.2%, respectively. These results demonstrate that the effect of metal contamination induced by our TSV reveal process on circuit components is small.

Investigation of generation-recombination centres of Au/n-GaAs Schottky diodes with InAs self-assembled quantum dots

Capacitance and reverse current–voltage measurements have been performed as a function of temperature on Au/n-GaAs Schottky diodes with InAs quantum dots (QDs) embedded between two GaAs spacers. The spacers were either doped or undoped containing a QD layer equivalent to 3 monolayer (ML) QD coverage. In the investigated temperature range of 77–350 K and for all the diodes measured, the apparent free electron concentration close to the QDs layer is lower compared to the concentration at the interface between GaAs doped buffer layer and GaAs n +-substrate, showing that the QDs induce more traps than those created at a conventional interface. Theoretical fitting of the capacitance–voltage characteristics yields the values of the energy level, the sheet concentration and the dispersion of the distribution of the confined states induced by the InAs quantum dots, which is higher for the diode with doped GaAs spacers than for the diode with undoped spacers. The effective activation energies of the traps, obtained from the effective generation lifetime calculated from reverse voltage current, agree well with the results obtained from the theoretical fitting.

Characterization of Strained Si/SiGe with Raman, Pulsed MOS Capacitor, and Gate Oxide Integrity Measurements

We use several characterization techniques including Raman spectroscopy, pulsed metal-oxide-semiconductor (MOS) capacitor capacitance-time, and gate oxide integrity measurements to characterize strained silicon/relaxed SiGe/graded SiGe/Si samples. The effective generation lifetime depends on the defect density in the various layers varying from 10-4 s near the surface to 10-7 s in the graded and highly defective SiGe. GOI statistical analysis shows worsening oxide breakdown as the Ge concentration in the SiGe increases.

Electrical properties of GaAs–Al0.46Ga0.54As superlattice within a wider quantum well

We report on electrical studies preformed on GaAs–Al0.46Ga0.54As superlattice (SL) with a wider quantum well (QW) embedded in the middle of the structure. We perform capacitance–voltage (C–V) and deep-level transient spectroscopy (DLTS) measurements in order to show the QW electrical activity within determination of corresponding properties. Besides, we determine the effective generation lifetime depth profile for this structure by using capacitance- and reverse current–voltage measurements. Electrical field effect studies at room temperature lead us to propose that tunneling effect is responsible for electrons injection and emission into/from the active region of the studied structure. We believe that tunneling can affect the efficiency of the carrier collection into the active layer in this structure, which is of a considerable interest for the development of heterostructures lasers operating at room temperature.

Electrical properties of MOS structures on nitrogen-doped Czochralski-grown silicon: A positron annihilation study

Measurements of interface trap density, effective generation lifetime (GL) and effective surface generation velocity have been performed using different methods on selected MOS structures prepared on nitrogen-doped Czochralski-grown (NCz) silicon. The application of the positron annihilation technique using a pulsed low energy positron system (PLEPS) focused on the detection of nitrogen-related defects in NCz silicon in the near surface region. In the case of p-type Cz silicon, all the results could be used for the testing of homogeneity. In n-type Cz silicon, positron annihilation was found insensitive to nitrogen doping.

Czochralski-grown nitrogen-doped silicon: Electrical properties of MOS structures; A positron annihilation study

Czochralski-grown nitrogen-doped (NCZ) silicon was studied using different methods. Measurements of interface traps density, effective generation lifetime and effective surface generation velocity were performed on selected Metal-Oxide-Semiconductor (MOS) structures. Application of the positron annihilation technique (PAS)—pulsed low energy positron system (PLEPS)—was focused on the detection of nitrogen-related defects in NCZ silicon in the near surface region. PAS—PLEPS technique gave relevant results on p-type NCZ silicon. Low sensitivity in the application to n-type NCZ silicon discriminates the PAS—PLEPS technique and should be alternated by other experimental technique. On the other hand, more pertinent measurement of generation lifetime was performed on MOS structures with n-type Si. Although the generation lifetime decreases in NCZ silicon, considerable lateral homogenization of the relaxation time was observed on the wafer.

Effective generation lifetime depth profile in InAs quantum dots grown on InAlAs/InP(0 0 1)

Capacitance– and reverse current–voltage (C–V) measurements have been performed on a Schottky barrier structure incorporating InAs quantum dots (QDs) embedded in n-type InAlAs matrix. The electron confined energy level positions in the QDs have been deduced from a capacitance–voltage analysis. Three electron levels have been found at about 240 meV, 180 meV and 70 meV via the InAlAs conduction band edge, and were attributed to the s ground state, the first p excited state and the d state, respectively. The variation of the leakage current density as a function of the depletion layer width has revealed an additional reverse current in the plane containing the dots. It was attributed to the discharging of the InAs QDs through the InAlAs barrier. The effective generation lifetime depth profile was derived from the C–V and the reverse current–voltage measurements. The effective generation lifetime was found to be controlled by the confined states in the QDs. Electrical field effect studies lead us to suggest a mechanism of electrons injection and emission into/from the confined states in the QDs.

A new determination of minority carrier generation characteristics in a MOS channel—CCD process by DLTS

Capacitance transients of NMOSFETs realized in a CCD technology have been analyzed by DLTS spectroscopy. Due to the small contribution of generation in the depleted region, the Zerbst method gives erroneous values for the effective generation lifetime. This work shows that, by analyzing the two peaks obtained in our DLTS spectra, it is possible to distinguish two mechanisms of minority carrier generation without making any assumption about the dominant process. The relative contribution of each mechanism (diffusion from the bulk and generation in the space charge region) to the inversion layer creation is obtained from a new treatment of DLTS signals.

Measurement of carrier generation lifetime in SOI devices

This paper presents a new, simple method of measuring the generation lifetime in SOI (silicon-on-insulator) MOSFETS. Lifetime is extracted from the transient characteristics of MOSFET subthreshold current. Using this technique, generation lifetime was mapped across finished SIMOX (separation by implantated oxygen) wafers, BESOI (bonded and etchedback SOI) wafers, and UNIBOND wafers. BESOI material evaluated in this study had about seven times longer effective generation lifetime than SIMOX material and the three types of the SOI wafers are shown to have a lifetime variation of ±20% across four inch wafers. The generation lifetime was also found to depend on the device fabrication process.

A simple technique to measure generation lifetime in partially depleted SOI MOSFETs

This work presents a new, simple method of measuring the generation lifetime in silicon-on-insulator (SOI) MOSFETs. Lifetime is extracted from the transient characteristics of MOSFET subthreshold current. Using this technique, generation lifetime was mapped across finished SIMOX (Separation by IMplantation of OXygen) wafers and BESOI (Bonded and Etchedback SOI) wafers. BESOI material evaluated in this study had about seven times longer effective generation lifetime than SIMOX material and both the SIMOX and the BESOI are shown to have a lifetime variation of /spl plusmn/10% across four inch wafers.

Leakage current in GaInAs/InP photodiodes grown by OMVPE

Reverse-bias dark current and zero-bias dynamic conductance are studied for large area p-i-n photodiodes of Ga 0.47In 0.53As grown on InP substrates by organometallic vapor phase epitaxy (OMVPE). The leakage in GaInAs homojunction mesa diodes is dominated by generation current near the intersection of the mesa surface with the GaInAs depletion region. The dynamic conductance at zero volts depends on both the length and orientation of the perimeter for these diodes. Double heterostructure InP/GaInAs/InP photodiodes with the p-n junction in the InP demonstrate lower zero-bias conductance which depends on diode area. The temperature dependence of leakage current in a double heterostructure p-i-n diode on a p-substrate is approximately fit by generation current in the GaInAs as well but with a much larger effective generation lifetime. The lowest leakage current measured is J = 3.6 × 10 -7 A/ cm 2 at - 10 V for this structure. Responsivities of these diodes at 1300 nm are 0.9 A/W for reverse biases 6 V. Using InP regrowth, 600 μm diodes with 300 K dynamic conductance < 7 × 10 -7 Ω -1 and responsivity 0.95 A/W at 0 V are fabricated.

Oxygen Implanted Layers in Silicon Electrical and Microstructural Characterization

ABSTRACTWe report on an investigation of ‘buried’ oxygen implants formed by 0+ implantation at 400 KeV and 3.5 MeV into p-type CZ (100) wafers with a dopant density NA 1015 cm−3. Peak concentrations of 1 × 1019 cm−3 to 2 × 1020 cm−3. were investigated. Test devices were fabricated on implanted and annealed wafers using conventional wafer processing. For the 400 keV implants, a 4 µm epitaxial buffer layer was grown subsequent to the 0+ implant. For a dose of 3 × 1015 cm−2 the lifetime reduction ratio for the effective generation lifetime τg at the implant peak is greater than 103 relative to an unimplanted region where τg = 150 µS. C-V and SRP profiles show evidence for oxygen donor compensation. TEM analysis reveals a well defined layer at 1 µm with respect to the original implant surface containing a relatively high density of small precipitates and dislocation loops. DLTS measurements on diodes reveal 2 electron traps designated as E1 and E2. The trap energy ∆E and capture cross section σ are (EC-ET)1 = 0.41 ± 0.020 eV and (EC-ET)2 = 0.22 ± 0.030 eV with σ 1019 cm-3. The estimated trap density NT for the dominant trap is 8.2 × 1013 cm−3 for a calculated peak 0+ implant concentration of 6.8 × 1019 cm−3. The values of ∆E are in good agreement with values for unimplanted CZ wafers subjected to 2-step precipitation anneals. The experimental results provide direct evidence that ion implantation provides an effective method of introducing atomic oxygen in silicon at concentration exceeding its solid solubility during processing to produce a buried low lifetime region.