Drift Layer Research Articles

Study of anode doping and avalanche in foundry compatible 1.2 kV vertical GaN PiN diodes

Foundry compatible vertical GaN PiN diodes were fabricated. The devices investigated in this work are based on 8 um drift layer thickness to achieve ∼1.2 kV of voltage blocking. Three different anode doping levels were fabricated on three wafers with the same p-layer thickness, and planar hybrid edge termination. The moderate anode doping level of 1 × 1018 cm−3 has achieved the highest breakdown voltage of 1.2 kV and its temperature-dependent breakdown behavior proved an avalanche behavior. Furthermore, our electroluminescence displayed the breakdown at the edge of the anode. Our simulation results imply an improvement in the field management with moderate anode doping.

Carrier lifetime modulation on current capability of SiC PiN diodes in a pulsed system

Silicon carbide (SiC) PiN diode has shown substantial promise as the freewheel diode for switch protection in a pulsed system. In this paper, we investigate the carrier lifetime (τ) modulation on pulsed current capability of SiC PiN diodes. The carrier lifetime in 4H–SiC is modulated by the generation of the Z1/2 center through neutron irradiation. Surprisingly, we found that the pulsed current of SiC PiN diodes shows a limited improvement when the carrier lifetime (τ) increases from 0.22 to 1.3 μs, while is significantly promoted as the carrier lifetime increases from 0.03 to 0.22 μs. This changing trend is obviously different from the on-state resistance, which decreases with the increased carrier lifetime. The simulation result indicates that the heat generation (i.e., maximum temperature rise) inside the PiN diodes, especially in the drift layer, is remarkably aggravated in the pulse tests for τ < 0.1 μs, but which is significantly suppressed as carrier lifetime rises to 0.2 μs and above. Therefore, the dependence of pulsed current on carrier lifetime is ascribed to the heat generation resulting from the carrier lifetime controlled conductivity modulation effect, which hence affects the temperature rise and brings about the failure of SiC PiN diodes under high pulsed current.

7.86 kV GaN-on-GaN PN power diode with BaTiO3 for electrical field management

Devices based on gallium nitride (GaN) have great potential for high power switching applications due to the high breakdown field and high electron mobility. In this work, we present a vertical GaN-on-GaN PN power diode using high dielectric constant material, BaTiO3, for electrical field management and high breakdown voltages, in together with an optimized guard-ring and field plate design. Numerical simulation shows that with high-k dielectrics implemented, the peak electrical field at the PN interface is mitigated from 3.5 to 3.1 MV/cm under a reverse bias of −9.05 kV. The device design with BaTiO3 shows a breakdown voltage of 9.65 kV or about 600 V improvement. The fabricated diodes with a 57 μm thick drift layer demonstrate a breakdown voltage of 7.86 kV on a bulk GaN substrate. The device has an on-resistance of 2.8 mΩ cm2 and a Baliga figure of merit of 22 GW/cm2.

Development and analysis of thick GaN drift layers on 200 mm CTE-matched substrate for vertical device processing

This work reports the epitaxial growth of 8.5 µm-thick GaN layers on 200 mm engineered substrates with a polycrystalline AlN core (QST by QROMIS) for CMOS compatible processing of vertical GaN power devices. The epitaxial stack contains a 5 upmum thick drift layers with a Si doping density of 2 × 1016 cm−3 and total threading dislocation density of 4 × 108 cm−2. The thick drift layer requires fine-tuning of the epitaxial growth conditions to keep wafer bow under control and to avoid the formation of surface defects. Diode test structures processed with this epitaxial stack achieved hard breakdown voltages > 750 V, which is shown to be limited by impurity or metal diffusion from the contact metal stack into threading dislocations. Conductive Atomic Force Microscopy (cAFM) reveals some leakage contribution from mixed type dislocations, which have their core structure identified as the double 5/6 atom configuration by scanning transmission electron microscopy images. Modelling of the leakage conduction mechanism with one-dimensional hopping conduction shows good agreement with the experimental data, and the resulting fitting parameters are compared to similar findings on silicon substrates. The outcome of this work is important to understand the possibilities and limitations of vertical GaN devices fabricated on large diameter wafers.

On the super-junction formed by using field plate for lateral AlGaN/GaN-based Schottky barrier diodes

In this work, by using numerical TCAD simulations, we have systematically studied the impact of different field plates (FPs) on the electrical characteristics for lateral AlGaN/GaN-based Schottky barrier diodes (SBDs) with recessed anode. The FP enables the formation of a super-junction. When compared with the reference device without a FP, the proposed SBDs can generate charge-coupling effect between the FP and the recessed anode region, which can effectively reduce the electric field magnitude at the metal/sidewall interface. We also find that the electric field profiles can be affected by the FP length, insulation layer thickness and different insulation materials with various dielectric constants. By doing so, we can enhance the breakdown voltage by homogenizing the electric field distribution in the GaN drift layer. Then, the electric field at the recessed anode region can be decreased and the GaN drift layer can be extensively depleted.

Vertical NiO/β-Ga2O3 rectifiers grown by metalorganic chemical vapor deposition

The performance of vertical Schottky and NiO/β-Ga2O3 p-n heterojunction rectifiers in which the Ga2O3 was grown by metalorganic chemical vapor deposition (MOCVD) is reported. The Si-doped Ga2O3 drift layers employed in the study had a doping concentration of 7.6 × 1015 cm−3 with a thickness of approximately 6 μm. High-angle annular dark-field scanning transmission electron microscopy imaging revealed an absence of interfacial features or extended defects around the drift layer region, indicating that MOCVD provides high-quality β-Ga2O3 epitaxial films for fabrication of vertical rectifiers. Both Schottky and NiO/Ga2O3 p-n heterojunction rectifiers attained the highest reported breakdown voltage of 486 and 836 V, respectively, for this growth technique. The heterojunction rectifiers showed an on/off ratio surpassing 109 within the voltage range of 0 to −100 V. Additionally, the Schottky barrier diodes demonstrate an on/off ratio of up to 2.3 × 106 over the same voltage range. These findings highlight the promise of MOCVD as a growth method for the type of rectifiers needed in power converters associated with an electric vehicle charging infrastructure.

Carrier removal rates in 4H–SiC power diodes – A predictive analytical model

An analytical model for predicting the proton and neutron radiation-induced carrier removal in silicon carbide (4H–SiC) diodes, is developed. It is primarily aimed towards a fast calculation of the carrier removal rates (ηe) and critical fluence (above which the diode drift layer is fully compensated), for a wide range of particle energies and diode ratings. The model utilizes the NIEL (non-ionizing energy loss) concept along with the actual carrier removal rate values for SiC available in the literature. A comparison to Si power devices is also made. The results from the predictive model suggest that diodes with a lower voltage rating can sustain a higher particle fluence and displacement damage before their drift layers are fully compensated. This provides radiation hardening guidelines for 4H–SiC power diodes at a device engineering level, which can help improve the reliability of circuits in harsh environment applications, such as space. The model is validated through TCAD simulations incorporating the proton-induced defects, as well as experimentally by irradiating SiC diodes with 2 MeV protons. The extracted compensation levels are in good agreement with those predicted by the analytical model, validating its potential in predicting carrier removal rate of SiC diodes for radiation prone environments.

Low Al-content n-type Al[formula omitted]Ga[formula omitted]N layers with a high-electron-mobility grown by hot-wall metalorganic chemical vapor deposition

In this work, we demonstrate the capability of the hot-wall metalorganic chemical vapor deposition to deliver high-quality n-AlxGa1−xN (x = 0–0.12, [Si] = 1×1017 cm−3) epitaxial layers on 4H-SiC(0001). All layers are crack-free, with a very small root mean square roughness (0.13–0.25 nm), homogeneous distribution of Al over film thickness and a very low unintentional incorporation of oxygen at the detection limit of 5×1015 cm−3 and carbon of 2×1016 cm−3. Edge type dislocations in the layers gradually increase with increasing Al content while screw dislocations only raise for x above 0.077. The room temperature electron mobility of the n-AlxGa1−xN remain in the range of 400–470 cm2/(V.s) for Al contents between 0.05 and 0.077 resulting in comparable or higher Baliga figure of merit with respect to GaN, and hence demonstrating their suitability for implementation as drift layers in power device applications. Further increase in Al content is found to result in significant deterioration of the electrical properties.

Improved reverse-bias breakdown behavior in fully-vertical GaN-on-Si Schottky barrier diodes with a thin AlN layer within the GaN drift layer

In this study, we investigated the effect of inserting a 1 nm thick AlN thin-film layer in the drift layer of a GaN-on-Si Schottky barrier diode to improve the reverse-bias breakdown voltage. The breakdown voltage was significantly improved from 258 V (without an AlN layer) to 338 V (with an AlN layer placed at the bottom of the drift layer), indicating that the AlN thin layer played an important role in the breakdown voltage characteristics. Furthermore, x-ray diffraction measurements and stress evaluations indicate that the AlN thin-film layer inserted at the bottom of the drift layer can significantly reduce the film stress and improve the breakdown voltage of the device.

1 mm2, 3.6 kV, 4.8 A NiO/Ga2O3 Heterojunction Rectifiers

Large area (1 mm2) vertical NiO/β n-Ga2O/n+ Ga2O3 heterojunction rectifiers are demonstrated with simultaneous high breakdown voltage and large conducting currents. The devices showed breakdown voltages (VB) of 3.6 kV for a drift layer doping of 8 × 1015 cm−3, with 4.8 A forward current. This performance is higher than the unipolar 1D limit for GaN, showing the promise of β-Ga2O3 for future generations of high-power rectification devices. The breakdown voltage was a strong function of drift region carrier concentration, with VB dropping to 1.76 kV for epi layer doping of 2 × 1016 cm−3. The power figure-of-merit, VB 2/RON, was 8.64 GW·cm−2, where RON is the on-state resistance (1.5 mΩ cm2). The on-off ratio switching from 12 to 0 V was 2.8 × 1013, while it was 2 × 1012 switching from 100 V. The turn-on voltage was 1.8 V. The reverse recovery time was 42 ns, with a reverse recovery current of 34 mA.

The Optimization of NiO Doping, Thickness, and Extension in kV-Class NiO/Ga2O3 Vertical Rectifiers

Ga2O3 heterojunction rectifiers have emerged as a novel candidate for various power conversion applications by using NiO as the solution on the p-type side. In this work, the optimized design of high-breakdown (1–7 kV), vertical geometry NiO/Ga2O3 rectifiers was examined using the Silvaco TCAD simulator to determine the electric field distribution for different NiO parameters. The doping concentration (1017–1019 cm−3), thickness (10–70 nm) of the guard ring, and its extension beyond the anode (0–30 µm) are all important in determining where the device breakdown occurs. Spatially, this can vary from the edge of the bilayer NiO extension to directly at the periphery of the top contact, consistent with experimental results. This transition phenomenon is proven to be correlated with the depletion effect by monitoring the depletion width when ramping up the bias and the doping concentration. The breakdown voltage was also calculated as a function of NiO top and bottom layer thicknesses and the doping concentration under different critical breakdown fields, where the latter is determined by the material quality of the drift layer.

High mobility GaN drift layer on Si substrates: The role of surface N vacancy on carbon incorporation

The control of carbon (C) impurity plays a crucial role in achieving high mobility GaN drift layers for GaN vertical power devices. We investigate the effects of NH3 partial pressure on the C incorporation in GaN and find out that the NH3 partial pressure is the key parameter controlling the C concentration. It is found that the C concentration is inversely proportional to the square of NH3 partial pressure under a fixed growth rate. Further physical analysis indicates that higher NH3 partial pressure results in a lower surface N vacancy (VN) concentration and, thus, the lower C incorporation efficiency. Under such a guidance, the C concentration in GaN can be reduced to as low as ∼1.7 × 1015/cm3 at a growth rate of 1 μm/h. As a consequence, a record high electron mobility of 1227 cm2/V·s at the room temperature is achieved for a GaN drift layer grown on Si substrates. Our strategy is effective in C control and paves the way for realizing high performance kV-class GaN vertical power devices on Si substrates.

A membrane, pseudo-vertical p-i-n diamond detector

ABSTRACT We report on the membrane diamond detector, which consists of 5 µm-thick p-i-n diodes and a dedicated front-end ASIC, fabricated in a 65-nm CMOS technology. The p-i-n diode has an attractive feature for low -ray sensitivities due to its extremely thin drift layer, which is difficult to form by etching of bulk diamond with a Metal−Insulator−Metal structure. The pseudo-vertical p-i-n diode structure was formed on the single crystal diamond {111} substrate by MPCVD and dry-etching process. The readout electronics was designed to meet specifications for real-time neutron monitoring in harsh -ray environments. The prototype system was evaluated in charge distribution measurements induced by -particles from Am. The charge spectra were successfully obtained from multi-channels, each of which has a diameter of 250 µm aligning in a pixel matrix. By combining with neutron converters, e.g. B or Li, we expect the detector system as a good candidate for detecting spontaneous fission neutrons, emitted from submerged fuel debris at the Fukushima Daiichi Nuclear Power Plant in Japan.

Comparative Performance Evaluation for 1.2–10kV Conventional and Superjunction GaN Current Aperture Vertical Electron Transistors

The performance potentials and limits for GaN current aperture vertical electron transistors with conventional, doped, and natural polarization superjunction (PSJ) drift layers at 1.2–10 kV breakdown voltage (BV) ratings are quantitatively compared. The static and dynamic performance parameters for each device are simulated and extracted. The specific on‐resistance RON,sp and specific total charge QT,sp (defined as the sum of specific gate charge QG,sp and specific drain–source charge QDS,sp) are extracted from Medici technology computer‐aided design simulations representing both the static and dynamic performance respectively. Moreover, a developed figure‐of‐merit (FoM) (RON,sp · QT,sp) is used to quantitively compare the performance of these field‐effect transistors in the range of BV ratings. Compared to the doped superjunction (DSJ) and conventional CAVETs, natural PSJ CAVET exhibits 1%–60% and 70%–99% reduction in RON,sp, while it is 100 to 1000× reduction in QT,sp, at BV between 1.2 and 10 kV respectively. Simultaneously, 22%–80% and 80%–99% reduction in performance FoM respectively are found.

2.83-kV double-layered NiO/β-Ga2O3 vertical p-n heterojunction diode with a power figure-of-merit of 5.98 GW/cm2

This work demonstrates high-performance NiO/β-Ga2O3 vertical heterojunction diodes (HJDs) with double-layer junction termination extension (DL-JTE) consisting of two p-typed NiO layers with varied lengths. The bottom 60-nm p-NiO layer fully covers the β-Ga2O3 wafer, while the geometry of the upper 60-nm p-NiO layer is 10 μm larger than the square anode electrode. Compared with a single-layer JTE, the electric field concentration is inhibited by double-layer JTE structure effectively, resulting in the breakdown voltage being improved from 2020 to 2830 V. Moreover, double p-typed NiO layers allow more holes into the Ga2O3 drift layer to reduce drift resistance. The specific on-resistance is reduced from 1.93 to 1.34 mΩ·cm2. The device with DL-JTE shows a power figure-of-merit (PFOM) of 5.98 GW/cm2, which is 2.8 times larger than that of the conventional single-layer JTE structure. These results indicate that the double-layer JTE structure provides a viable way of fabricating high-performance Ga2O3 HJDs.

Effect of drift layer doping and NiO parameters in achieving 8.9 kV breakdown in 100 μm diameter and 4 kV/4 A in 1 mm diameter NiO/β-Ga2O3 rectifiers

The effect of doping in the drift layer and the thickness and extent of extension beyond the cathode contact of a NiO bilayer in vertical NiO/β-Ga2O3 rectifiers is reported. Decreasing the drift layer doping from 8 × 1015 to 6.7 × 1015 cm−3 produced an increase in reverse breakdown voltage (VB) from 7.7 to 8.9 kV, the highest reported to date for small diameter devices (100 μm). Increasing the bottom NiO layer from 10 to 20 nm did not affect the forward current–voltage characteristics but did reduce reverse leakage current for wider guard rings and reduced the reverse recovery switching time. The NiO extension beyond the cathode metal to form guard rings had only a slight effect (∼5%) in reverse breakdown voltage. The use of NiO to form a pn heterojunction made a huge improvement in VB compared to conventional Schottky rectifiers, where the breakdown voltage was ∼1 kV. The on-state resistance (RON) was increased from 7.1 m Ω cm2 in Schottky rectifiers fabricated on the same wafer to 7.9 m Ω cm2 in heterojunctions. The maximum power figure of merit (VB)2/RON was 10.2 GW cm−2 for the 100 μm NiO/Ga2O3 devices. We also fabricated large area (1 mm2) devices on the same wafer, achieving VB of 4 kV and 4.1 A forward current. The figure-of-merit was 9 GW cm−2 for these devices. These parameters are the highest reported for large area Ga2O3 rectifiers. Both the small area and large area devices have performance exceeding the unipolar power device performance of both SiC and GaN.

650V Vertical SiC MOSFETs and Diodes with Improved Terrestrial-Neutron Single-Event Burnout

Silicon carbide (SiC) power devices such as Schottky diodes and metal-oxide semiconductor field-effect transistors (MOSFETs) are susceptible to failure by terrestrial neutron single-event burnout (SEB) while in the high-voltage blocking state. In this study the effects of the drift layer design of 650V SiC vertical power diodes and MOSFETs have been studied. TCAD simulations of different device designs have been performed, and fabricated device single-event burnout (SEB) properties are compared between the devices fabricated. We find that the standard 650V devices have a low area-scaled failure-in-time (FIT/cm2) such that essentially no failures (0.01 FIT/cm2) are expected at 400V drain-source bias (VDS) operation and below. An improved design allows the SEB failure rate curve to be shifted downward in failure rate, such that at for a given VDS operation condition, the FIT/cm2 can be decreased by 10 - 100 times, depending on the VDS value. This allows operation at about 75V higher VDS value with a similar SEB failure rate, allowing these devices to be used in a wider range of applications.

Pulsed Forward Bias Body Diode Stress of 1200 v SiC MOSFETs with Individual Mapping of Basal Plane Dislocations

Bipolar degradation is a known problem in the development of SiC MOSFETs when the body diodes (p+ body/ n-drift layer) are forward biased. Mostly higher voltage classes like the 1.7 kV or 3.3 kV SiC MOSFETs have been studied in literature resulting with significant Rdson increase [1-2]. In this work, body diode stress was conducted for 1.2kV SiC MOSFETs, which were mapped with Infra-Red photoluminescence (IR-PL) to determine and localize the exact number of BPDs present in the drift layers of each die [3, 4] and grouped by this criterion. Devices were stressed at extremely high current densities (1200 – 1700 A/cm2) under pulsed conditions. The post-stress analysis shows non-negligible increase of Rdson and Vf. Bipolar degradation occurring from stressing the body diodes at high forward current densities was confirmed by electroluminescence analysis.

General optimization of breakdown voltage and resistivity on power components in terms of doping level and thickness

The emergence of wide band-gap (WBG) materials promises improved performance in semiconductor devices, but also presents significant technical challenges. Developing this immature technology and adapting market-ready silicon-based technology to new materials requires a thorough understanding of the relationship between material properties and the final electrical performance of the component. In this work, we propose a model that relates generic material properties and device-specific parameters (such as doping level or thickness) to the final breakdown voltage and performance of unipolar vertical diodes. Our approach enables optimized device design and evaluation by connecting the electrical performance target with the optimal drift layer characteristics. This model can be applied universally to any material with known impact ionization coefficients, carrier mobility, and thermal activation energy. We focus on diamond as a paradigm for WBG materials, illustrating specific characteristics such as incomplete carrier ionization or elevated doping-dependent critical electric fields. Our model predicts that diamond-based vertical devices with 70 μm layers and doping levels of 1.1015 cm−3 can sustain 20 kV.

S-EVC Method for Sorting Wafers with Defects that Extend to Bar Shaped SSFs

In the previous report [1], we proposed the S-EVC (Selective Expansion-Visualization-Contraction) method (Fig. 1) that effectively screens for malignant BPDs (basal plane dislocations) in the drift and buffer layers, which expand to SSFs (Shockley-type stacking faults), leading to forward voltage degradation. The method intentionally utilizes the REDG (recombination enhanced dislocation glide) mechanism by UV (ultraviolet) irradiation in wafer sorting to replace the so-called burn-in (accelerated current stress) process, which is time-consuming during mass production. In the report, triangular SSFs were examined to verify the effectiveness of the method, but they only occupy a much smaller area of the active region on the chip than bar shaped SSFs. In this study, to improve the S-EVC method to be more practical, we focused on the more serious bar shaped SSFs which have a non-negligible impact on electrical characteristics. The bar shaped SSFs are mostly expanded from TED (threading edge dislocation)-converted BPD at or below the substrate epitaxial layer interface. In PL (photoluminescence) observation by a 710 nm LPF (long-pass filter), the TED-converted BPD and the complete TED extended from the bottom of the substrate are observed as the same dark spot, but it was confirmed that both can be distinguished by the presence or absence of their SSF expansion by UV irradiation. In addition, in order to confirm the validity of the S-EVC method even on the virgin epi wafer, UV irradiation was performed on both the aluminum doped PN structured wafer and the virgin epi wafer, and the similar SSF expansion was observed. Meanwhile, the correlation between UV irradiation and forward voltage degradation was quantified using PiN diodes by comparing the glide velocity of 30°Si (g) core partials for bar shaped SSFs by UV irradiation stress with that by current stress.