Double-sided Polishing Research Articles

Numerical Analysis in Double-Sided Polishing: Mechanism Exploration of Edge Roll-Off

Understanding the mechanism of stress concentration effects on the surface of semiconductor substrate materials—silicon wafers—in Double-Sided Polishing (DSP) is particularly important for improving polishing quality. In this study, a two-dimensional finite element model is established to study the effect of contact state and stress concentration during polishing on edge roll-off (ERO) and polishing rate uniformity. The variation in this contact state is influenced by changes in wafer thickness and the gap between it and the carrier. The model is validated by experiments and helps to further analyze and interpret the experimental results, identifying six stages of contact states during the polishing process. The research indicates that the phenomenon of stress concentration at the edge of a wafer is caused by the pads creating a large amount of compression at the edge of the wafer. Additionally, there appears to be a threshold value during the polishing process, below which the stress concentration on the wafer changes, thereby altering the magnitude of edge roll-off and, ultimately, affecting overall flatness. This study provides a basis for optimizing the process design.

Design of a multi-physics coupling MEMS pressure sensor

The pressure measurement of explosion shock wave puts forward high requirements on the temperature resistance and response speed of the sensor. In this paper, a multi-physics coupling pressure sensor is designed to meet requirements. The sensor mainly consists of a Fabry-Perot cavity optical fiber sensing unit, a piezoelectric pressure sensing unit and a thermometric resistance temperature measurement module. Firstly, the structure of the sensor is designed. The top and bottom surfaces of the Fabry-Perot cavity are composed of a silicon diaphragm and a quartz glass. The piezoelectric pressure sensing unit is an AlN film including its electrodes. Pt thermometric resistance is developed to realize real-time temperature monitoring. Secondly, the fabrication process of the sensor is discussed, especially three key technologies. An Al film is sputtered to increase the reflectivity of the quartz glass. The SU-8 photoresist is applied to accurately control the thickness of Fabry-Perot cavity. Etching is adopted to work out the graphics of the AlN piezoelectric film. At last, a complete fabrication process of the sensor is described. The fabrication of multilayer films begins with a double-sided polishing silicon wafer, while Fabry-Perot cavity was from a double-sided polishing quartz glass. Then two parts of the sensor are combined to ensure the multi-physics coupling sensor to achieve complete function.

Theoretical and experimental analysis for the surface shape evolution of ultrathin workpiece considering the pad surface shape in double-sided polishing

Theoretical and experimental analysis for the surface shape evolution of ultrathin workpiece considering the pad surface shape in double-sided polishing

MOCVD deposited double-sided CeO2 buffer layer for YBCO superconducting film grow on R-plane Al2O3 substrate

Double-sided CeO2/YBCO films were grown on the double-sided polishing R-plane Al2O3 substrate using MOCVD technology. The effects of deposition parameters of the MOCVD setup on the structural orientation and surface morphology of CeO2 buffer layers grown on sapphire substrates were investigated. A series of CeO2 buffer layers were prepared by varying the substrate temperature and oxygen flow rate. The results show that when the substrate temperature is lower than 750 °C and the oxygen flow rate is lower than 400 sccm, CeO2 films is grown in a mixed (00l) and (111) orientations, and when the substrate temperature is 750 °C-840 °C and the oxygen flow rate is higher than 400 sccm, the CeO2 films are grown with a single (001) orientation. When the deposition temperature was 800 °C and the oxygen flow rate was 800 sccm, the CeO2 buffer layer structure had the best orientation with double-sided ω-scan FWHM of 0.019° and 0.02°; the FWHM of double-sided Ф-scan were 1.8° and 1.7°; the RMS roughness on both sides measured by AFM were 1.28 nm. YBCO films grown on this buffer layer have good c-axis epitaxial orientation, and the test results of the pole figure show an in-plane rotation of 45° between YBCO and CeO2 lattices. Thus, the obtained YBCO film has a critical current density of 2 MA/cm2, indicating that the films can be prepared to meet the needs of microwave devices using R-plane Al2O3 substrates.

Experimental and numerical analysis of wafer-to-wafer uniformity in double-sided polishing

Double-sided polishing (DSP) is a key process used to achieve super-flatness for 300-mm silicon wafers. Precisely controlling the uniformity of wafer thickness and flatness by DSP is important in advanced node-integrated circuit manufacturing. In this work, the dependence of variations in wafer-to-wafer thickness on wafer original thickness and carrier thickness was investigated. This research indicates that the thickness difference between the wafer and the carrier affects the deformation of the pad and thus changes the removal rate of material in the DSP process, which finally induces the non-uniformity. Besides, the platen shift caused by inconsistent original wafer thickness or carrier thickness is another key factor affecting wafer-to-wafer thickness uniformity. This work may provide guidance for producing high flatness uniformity wafers by optimizing the DSP process.

Kinematic analysis of double-sided polishing of silicon wafers for improving surface flatness

Silicon wafer geometry is stringently controlled at present in the semiconductor industry. In particular, surface flatness must comply with strict standards because it can affect the success of various downstream manufacturing processes. A double-sided polishing (DSP) process serves as the standard finishing process in the industrial manufacture of large diameter silicon wafers. However, nonuniformities in the removal distribution on a wafer in DSP processes cause deterioration of surface flatness of the wafer. In this study, we derive the relation between DSP conditions and the uniformity of the removal distribution and propose better DSP conditions via kinematic modeling of a DSP process.

Polishing pad design for uniform removal distributions in double-sided polishing

Due to the inevitable, nonuniform relative speed distribution between a workpiece and polishing pads, double-sided polishing (DSP) faces the challenge of nonuniform removal distributions. Hence, maintaining workpiece flatness while perfecting surface finishing remains a challenge in the DSP process. This study controlled the pressure distribution on a workpiece using a polishing pad design to compensate for the nonuniformity. An analytical model of the removal distribution was proposed considering the impact of pressure distribution. Experiments confirmed the proposed model's capability to evaluate the compensating effect of the polishing pad design. Finally, design guidelines for uniform removal distributions were established.

Uniformity Removal Based on Processing Prediction Model of Ring-Pendulum Double-Sided Polishing Method

Uniformity Removal Based on Processing Prediction Model of Ring-Pendulum Double-Sided Polishing Method

Simulation study of a temperature-calibrated double-sided polished optical fiber SPR refractive index sensor.

The temperature of the environment directly affects the accuracy of refractive index (RI) measurement. Therefore, we propose a double-sided polished surface plasmon resonance (SPR) RI fiber sensor, which is available for simultaneous measurement of the RI and temperature in real time. The proposed sensor uses single-mode fiber as a special double-sided polishing structure. The double-sided polishing regions are coated with a gold-silver hybrid film; one side is additionally coated with graphene layers to increase detection sensitivity, and the other side is coated with polydimethylsiloxane on the metal layer for temperature sensing. The simulation result shows that in the range from 1.33 to 1.35, RI sensitivity reaches as high as 2600nm/RIU. In the range from 15°C to 85°C, temperature sensitivity reaches as high as -3.5n m/∘ C. The full width at half maximum is 65nm. Compared with previous studies, the sensitivity is slightly improved, and an excellent temperature compensation effect can be achieved. It is suitable for high-precision measurement of the environment and biochemical aspects.

Shape modulation due to sub-surface damage difference on N-type 4H–SiC wafer during lapping and polishing

The technology enhancement of obtaining 4H–SiC wafers with a concave Si face shape has improved the performance of GaN-on-SiC. For manufacturers, the wafer shape has a tremendous impact on the deposited films quality by increasing defects generation or causing undesirable strain. Therefore, it is crucial to control the wafer shape and explore the mechanism. This study recorded the wafer shape evolution by flatness tester during the machining process of lapping, mechanical polishing (MP), and chemical mechanical polishing (CMP). The varying shapes of SiC wafers are due to surface damage and intrinsic stress caused by the early lapping process, but the intrinsic stress is dominant. The measurement results show that double side MP and single side CMP make the wafer more convex and concave. It indicates that the residual surface stress is involved in shape formation. Perfect symmetrical shape between (0001) Si face and (000 1‾) C face suggests that there is indeed bending stress within the wafer. In this study, atomic force microscopy (AFM), high-resolution X-ray diffractometry (HRXRD), and scanning electron microscopy (SEM) was used to investigate the surface damage between SiC polar faces. According to the results, the damage to the Si face is more severe than that to the C face after double-sided mechanical polishing, leading to the wafer becoming more convex.

Material Removal Rate Prediction for Sapphire Double-Sided CMP Based on RSM-SVM

As a crucial substrate material for optoelectronic materials, sapphire has important applications in both military and civilian fields. In order to achieve the final processing quality of sapphire substrate materials, double-sided chemical mechanical polishing (DS-CMP) is a necessary process, which is also a guarantee for the preparation of high-end LED chips. In this article, the sapphire DS-CMP processing plan based on the Box-Behnken design is obtained and experimented. Then, a hybrid approach of response surface method (RSM) and support vector machines (SVM) algorithm is established as the material removal rate (MRR) prediction model for sapphire DS-CMP. Furthermore, the material removal process of sapphire DS-CMP, the influence of response variables on the MRR of sapphire DS-CMP, and the prediction results of RSM-SVM on sapphire DS-CMP are analyzed respectively. From the experimental results, the maximum MRR obtained is 387.59 nm min−1, which is more than 6 times the reported MRR of single-sided CMP under similar process parameters. The mean square error of predicted value through RSM-SVM is basically around ±10% of the experimental value, which possess satisfied validity for the MRR prediction of sapphire DS-CMP. Finally, both top and bottom surface quality of sapphire wafers after DS-CMP processing was investigated.

Nonuniformity of material removal in a double-sided polishing process: Formation of convex curves

In a double-sided polishing (DSP) process, a workpiece typically takes on a convex shape due to the nonuniformity of material removal in the radial direction. This convexity causes significant difficulties in satisfying the required surface flatness for workpieces, especially in the manufacture of silicon wafers. However, the reason for the nonuniformity of material removal is unknown, resulting in no theoretical approach for solving the convexity. This study aims to provide an understanding of the cause of the above typical DSP results regarding global workpiece shape and construct guiding principle for determining better DSP conditions in terms of solving the convexity. To that end, this study explores the radial distribution of relative speed between a workpiece and polishing pads because the relative speed is the primary factor that determines material removal. The relation between DSP conditions and the radial uniformity of the relative speed is investigated analytically. The findings are used to construct an indicator as guiding principle for determining DSP conditions to obtain additional uniform relative speed in the radial direction.

Double-sided polishing photonic crystal fiber biosensor based on surface plasmon resonance for cancer single cell detection

In this paper, we propose a high sensitivity double-sided polishing photonic crystal fiber biosensor based on surface plasmon resonance. The performance of the sensor was analyzed by the finite element method, including the influence of different pore sizes and positions, polishing depth, pore spacing, metal thickness, refractive index (RI), and manufacturing error (5%) on the sensing performance. And the performance of practical application in cancer detection was analyzed. The use of a double-sided polishing structure and coating with a gold layer not only increases the contact area between the analyte and gold layer but also provides a large-enough space for the analysis channel, which is conducive to the actual manufacture and use. The sensor has a detection range of 1.35–1.39, maximum wavelength sensitivity of 21,500 nm/RIU, average wavelength sensitivity of 9550 nm/RIU, amplitude sensitivity of − 1057.1756 RIU − 1 , R 2 of 0.98265, figure of merit of 250, and maximum resolution of 4.68 × 1 0 − 6 , which can be used in cancer detection and other biological areas.

Experimental and theoretical analysis of single-sided and double-sided chemical mechanical polishing of sapphire wafers

Experimental and theoretical analysis of single-sided and double-sided chemical mechanical polishing of sapphire wafers

Investigation of crystal structure formation by electropulse treatment of amorphous Ti50Ni25Cu25 alloy ribbons

The study of the effect of electropulse treatment with a variable duration on the crystallization processes and the structure of a amorphous TiNiCu alloy with 25 at.% Cu in comparison with isothermal annealing and heating at a constant speed was carried out. The alloy was fabricated by rapid-quenching from the liquid state (melt spinning technique) at the cooling rate of the melt of about 106 °C/s in the form of a ribbon with a thickness of 28 μm with a surface crystal layer with a thickness of about 2-3 μm. To remove the crystal layer, the method of double-sided electrochemical polishing was used. The studies were carried out by methods of differential scanning calorimetry, metallography and scanning electron microscopy. It was established that the formation of the crystalline phase in the electropulse treatment of the amorphous ribbon occurs from the surface to the inner part due to the predominant formation and growth of columnar crystals with subsequent nucleation and growth of crystals in the rest of the ribbon.

Mathematical model of double-sided polishing of a group of simultaneously processed silicon wafers

Mathematical model of double-sided polishing of a group of simultaneously processed silicon wafers

Investigation of the kinematics of a new machine for double-sided polishing of optical planeparallel plates

Investigation of the kinematics of a new machine for double-sided polishing of optical planeparallel plates

A novel measurement method for the torque acting on the upper platen in a three-way double-sided lapping/polishing machine

In double-sided lapping and polishing processes, the friction coefficients between the workpiece and platens or pads are important parameters for understanding or improving the lapping and polishing processes. However, the friction coefficients have not been investigated in detail owing to insufficient measurement methods for the torques acting on the upper and lower platens, which are necessary to evaluate the friction coefficients. Thus, a novel measurement method for the torque acting on the upper platen in a three-way double-sided machine was proposed in this study. In the method, the torque is measured based on the forces acting on the holders supporting the upper platen rotation. The torques were measured with the method in double-sided lapping experiments, and they were confirmed to agree with the theoretical torque variation. Furthermore, the friction coefficient between the workpiece and upper pad identified with the proposed method was also verified by comparing with the friction coefficient measured in the single-sided lapping experiment. In addition, the estimation method of the lower platen torque based on the motor torque was investigated by utilizing the proposed method, and we found the lower platen torque was estimated accurately by taking a sufficient warm-up time or by modeling the torque loss in transmission path. Therefore, accurate measurement of the torques acting on the upper and lower platens, which is an effective tool for understanding or improving the process, was realized.

Polishing pad for reducing edge roll-off while maintaining good global flatness of silicon wafer

In the double-sided polishing process of silicon wafers, there is a strong demand to reduce amount of edge roll-off (ERO) while improving global flatness of a wafer. In the present study, we clarified the negative effects of uneven wear of the polishing pads on the global flatness of a wafer can be suppressed when the deformation of the polishing pads is large. As for the ERO, we found small deformation of the polishing pad near the top surface was effective in reducing the amount of ERO. In addition, we revealed small distance from the surface of the polishing pad at the area under the wafer to that at the area around the wafer was also effective in reducing the amount of ERO. On the basis of the findings, we developed a three-layered polishing pad which was expected to reduce the amount of ERO while achieving the good global flatness.

Double-Sided Polishing Simulation Based on the Gap Theory - Theory of Pressure Distribution Analysis and Conditions for High Flatness

The double sided polishing technique is often applied to achieve high total thickness variance (TTV) of large silicon wafers that are employed to manufacture integrated circuit (IC) cards and smartphones. However, the theoretical analysis of high TTV is not sufficiently studied for the double sided polishing. Whereas, a polishing simulation for single sided polishing based on the gap theory was already developed. This simulation results were compared to the experimental results and indicate good behavior characteristics. This study presents a description of the theory for analyzing pressure distribution for double sided polishing and the simulation results of the surface generation process. It was demonstrated that the average of total running distance is nearly equal for the upper and the lower plates. Improved flatness is obtained when the rotation speed differences of the upper and lower plate rotations for the carrier revolution are equal. Furthermore, it was shown that TTV of less than 0.04 μm with a flatness of less than 0.05 μm may be attained when the cone upper plate with the optimum slope and the flat lower plate are employed with lower carrier rotation.