Polishing pad for reducing edge roll-off while maintaining good global flatness of silicon wafer

Abstract

In the double-sided polishing process of silicon wafers, there is a strong demand to reduce amount of edge roll-off (ERO) while improving global flatness of a wafer. In the present study, we clarified the negative effects of uneven wear of the polishing pads on the global flatness of a wafer can be suppressed when the deformation of the polishing pads is large. As for the ERO, we found small deformation of the polishing pad near the top surface was effective in reducing the amount of ERO. In addition, we revealed small distance from the surface of the polishing pad at the area under the wafer to that at the area around the wafer was also effective in reducing the amount of ERO. On the basis of the findings, we developed a three-layered polishing pad which was expected to reduce the amount of ERO while achieving the good global flatness.