Double Line Frequency Research Articles

Design and Control of Single-Phase Double-Stage PV-MPPT System

In the double-stage Photovoltaic-Maximum Power Point Tracking (PV-MPPT) systems, the performance of each stage and the MPPT algorithm may affect the system performance. This study gives the design and control of a single-phase double-stage PV-MPPT system with a cascade controller. For the DC-link voltage control, a classical PI controller is employed. However, double-line frequency harmonic emerges inherently in the DC-link voltage. This voltage harmonic causes a third harmonic in the injected grid current. Therefore, a proportional multi-resonant controller is used in the inner current loop controller to control the grid current and suppress the third harmonic. The designed system's steady-state and dynamic performance are tested under different PV power and sudden power changes. The simulation results show that the injected grid current is in phase with the grid voltage and has a low THD value. Also, the DC-link voltage is stable under even sudden power changes. The results prove the effectiveness of the designed system.

Theoretical and simulation analysis of DC bus current fluctuation control strategies of modular multilevel converter under AC side fault conditions

Modular Multilevel Converters (MMCs) play a crucial role in high-voltage DC (HVDC) systems due to their adaptable control and swift response capabilities. However, AC side faults could introduce asymmetric double-line frequency components into the MMC's circulating current, jeopardizing DC bus stability. Although strategies to mitigate DC side fluctuations are well-established, a detailed comparison of their operational impacts remains unexplored. The operational effects of MMCs under AC side faults are firstly examined in this study, including issues related to grid-connected current asymmetry and DC bus current fluctuations. Subsequently, two targeted control schemes are devised based on the goals of suppressing the double-line frequency components and only the zero-sequence components of circulating current. Through simulation, these approaches are contrasted, delineating their advantages and disadvantages in terms of circulating current suppression, submodules(SMs) capacitance voltage fluctuation, and other performance metrics, which could provide a foundational reference for designing and selecting MMC control strategies under AC side faults.

CLLC Modeling and Control in V2G Mode to Mitigate Double-Line Frequency Current for High-Power Density On-Board Charger

CLLC Modeling and Control in V2G Mode to Mitigate Double-Line Frequency Current for High-Power Density On-Board Charger

Control Approach of Grid-Connected PV Inverter under Unbalanced Grid Conditions

In grid-connected photovoltaic (PV) systems, power quality and voltage control are necessary, particularly under unbalanced grid conditions. These conditions frequently lead to double-line frequency power oscillations, which worsen Direct Current (DC)-link voltage ripples and stress DC-link capacitors. The well-known dq frame vector control technique, which is effective under normal conditions, struggles with oscillatory component management in unbalanced grid conditions. To address this issue, this paper presents an advanced control approach designed for grid-connected PV inverters. The proposed approach is effective at reducing oscillations in the DC-link voltage at double the grid frequency, thereby enhancing system stability and component longevity. This method introduces a feedback control method designed to regulate oscillatory components that appeared within the dq frame and suppress the DC-link voltage oscillations under imbalance conditions, including single line-to-ground (SLG) faults. Additionally, the control scheme incorporates a maximum power point tracking (MPPT) controller to optimize PV efficiency. Comprehensive simulations demonstrate the effectiveness of this method in maintaining sinusoidal current injections and stabilizing DC-link voltage during unbalanced grid conditions. Simulation results show that the control scheme effectively stabilizes DC-link voltage, maintains balanced grid current, and ensures constant active power under various conditions, including SLG faults and solar irradiance changes.

A simplified space vector modulation for the single-phase active power decoupling quasi-Z-source inverter

The double-line frequency ripple power of the single-phase quasi-Z source inverter (qZSI) will result in a large designed qZS impedance on the dc side, which can be greatly reduced by the coupled-type active power decoupling (APD) method. However, the traditional sinusoidal pulse width modulation (SPWM) for the APD-qZSI needs extravagant APD storage capacitance and may cause abnormal operation under low load conditions. Classical space vector modulation (SVM) has higher flexibility and dc-link voltage utilization, but it cannot be directly applied to the APD-qZSI. In this paper, a simplified SVM method for the coupled-type APD-qZSI is proposed, where the switching time sequence is transformed to carrier-based pulse width modulation, so the shoot-through control of the qZSI is easy to implement. Next, the passive component parameters and normal operation range of the traditional SPWM and the proposed SVM are analyzed and compared. The proposed SVM has a smaller APD storage capacitance but a slightly larger ac side filter inductance. In addition, the decreased current of the APD branch under SVM can help suppress the abnormal operation of the inverter, so the APD-qZSI can operate at a lower load condition. Finally, experimental results validate the effectiveness and superiority of the proposed SVM method.

Topology synthesis of integrated active power decoupling converters using asymmetrical H-bridge circuits

Aiming to handle the inherent double-line frequency ripple power in single-phase power systems, a lot of active power decoupling (APD) topologies have been developed. In this paper, a general method is introduced to synthesize APD topologies. The main construction idea is to insert a rectifier/inverter into asymmetrical H-bridge circuits (AHCs) or replace the switch/diode in the AHCs with a rectifier/inverter. This approach not only reveals the formation process of existing APD topologies but also deduces new APD topologies. Finally, an experimental case study has been carried out to illustrate the feasibility and effectiveness of the proposed topology synthesis method.

Bidirectional Control With Fitting Model-Based Synchronous Rectification and Input Ripple Current Feedforward for SiC Bidirectional CLLC EV Charger

Conventional CLLC Synchronous Rectification (SR) typically adopts detection circuits to sense the high frequency signals. It can hardly be used in the high voltage SiC applications directly as it is sensitive to high dv/dt and may cause false operation. A bidirectional control is proposed for the SiC CLLC charger to achieve the SR function and mitigate the input ripple current. Considering the switching frequency and load, the SR on-time is calculated by the proposed three-order fitting model with low calculation source and high immunity to high dv/dt. Moreover, an input ripple current feedforward control is proposed in the discharging mode, which adds the extracted double line-frequency ripple current to the bus voltage reference. It not only achieves low SR conduction loss, but also reduces the input ripple current largely in the discharge. A 6.6-kW SiC bidirectional CLLC charger was built. Compared to the conventional SR, the CLLC efficiency of proposed SR improves 0.28% at 6.6 kW in the charge. In the discharge, the reduction of CLLC input ripple current at the double line-frequency is up to 91%. The overall charging and discharging efficiencies are 95.4% and 96.1% at full load, respectively.

Multidimensional Design of DC-Link for Two-Stage Solid-State Transformer Cell Considering Second-Order Harmonic Current Distribution

In a two-stage solid-state transformer (SST) cell, the grid power pulsates at the double-line frequency, yielding second-order harmonic current (SHC) across the unit. SHC into the DC/DC stage causes extra losses in the semiconductors and magnetics, resulting in reduced efficiency and lifetime at the gain of lower DC-link requirement. This paper investigates how the DC-link design affects the SHC distribution using a proposed impedance model, which in turn impacts losses, volume and overall reliability. Particularly, the overall lifetime is evaluated considering the reliability interactions between components resulting from varied DC-link design. The newly introduced reliability dimension provides further insight into the DC-link design, in addition to the voltage ripple requirement and efficiency-power density tradeoff. The model and design concept are verified by the simulation and experiment.

An Active Power Decoupling-Integrated Reduced-Switch Current-Fed Switched Inverter

In recent literature, high-gain dc–ac inverters are employed in grid-connected photovoltaic (PV) systems. These inverters can have several features, such as shoot-through immunization and buck/boost capabilities achieving a wide range of operations with reliability and minimum distortion. One such example is the single-phase reduced-switch current-fed switched inverter (RSCFSI). This article proposes the enhanced boost control-based pulsewidth modulation (EBC-PWM) strategy for RSCFSI to improve the inverter’s dc–ac gain. Being a single-phase inverter, RSCFSI suffers from the double-line frequency ripple problem. However, a low-frequency (LF) ripple analysis reveals that the RSCFSI is also plagued with fundamental frequency ripple, which poses additional challenges for the active power decoupling (APD) integration and corresponding closed-loop controllers. Although both LF ripples can be alleviated using markedly large passive elements, the power density and reliability of the inverter worsen. In this article, an APD-integrated RSCFSI (APDRSCFSI) is introduced as a solution that deflects the aforementioned LF ripple energy to an auxiliary capacitor without adding more active switches. As a result, the inverter can employ smaller passive elements. In addition, the EBC-PWM strategy is also extended for APDRSCFSI, improving its dc–ac voltage gain and voltage stress. A closed-loop control technique that combines output voltage control and APD functionality is also illustrated. A hardware prototype is used to corroborate the advantages of APDRSCFSI.

Minimization of Low Frequency Current Oscillation in Resonant Link of a Solid State Transformer by Passive Filters

Solid State Transformer (SST) is expected to be a key component in future smart grid systems, which integrates MVAC grid with LV DC/AC grid. For a three stage SST, resonant converter is a potential candidate as the DC-DC stage due to its high conversion efficiency. However, it exhibits an oscillation of 100 Hz (double line frequency) in the high frequency (HF) link current, which increases device current stress and conduction loss. This paper proposes an analytical model which determines the magnitude of this oscillation at different power factor operations. The obvious solution to minimize this oscillation is to keep a high value of capacitor at each MVDC bus, but it reduces the power density of the system. Therefore, this paper proposes an improved solution with a combination of inductor and capacitor at the LVDC bus. The proposed filter reduces the RMS value of the HF link current by 29% at unity power factor operation. The dynamics of the proposed filter is also included in the control system design by deriving a dynamic equivalent circuit in this paper. The design is verified in a laboratory prototype of 8 kVA, 1.65 kV/300 V solid state transformer.

An Active Power Ripple Mitigation Strategy for Three-Phase Grid-Tied Inverters Under Unbalanced Grid Voltages

This letter proposes an active power ripple mitigation strategy for the three-phase three-wire grid-tied inverter. Under the unbalanced grid voltage scenarios, the double-line frequency oscillation will have occurred on the inverter output power and the dc-link voltage. Traditionally, the three-phase four-wire or the three-phase four-leg topology could be adopted to deal with this issue. Besides, the negative and the zero-sequence current component can be controlled to cancel out the power ripple. However, the circuit cost and control complexity might be increased. Therefore, a virtual phase-current regulation (VPCR) method is developed by adding compensation to the current feedback of the fault voltage. The compensation value is consistent with the voltage drop ratio, which can effectively offset the actual power ripple. The main feature of the VPCR is its simplicity, whereas it can be realized via the digital signal processor without adding extra circuit components. Theoretical analysis and mathematical derivations of the VPCR will also be revealed. Finally, a 3 kW prototype circuit with both simulation and experimental results verify the performance and feasibility of the proposed strategy. The experimental results show that the output power ripple can be eliminated with 64.3% via the proposed VPCR.

Low Frequency Current Ripple Suppression for Two-Stage Single-Phase Inverter Based on Impedance Editing

The instantaneous output power of the two-stage single-phase inverter pulsates at double-line frequency, generating a large amount of second harmonic current (SHC) in the front-end dc-dc converter and input dc source. The SHC is harmful to the system performance. To address the issue, a control strategy based on port-impedance editing, where inductor current feedforward (ICFF) and bus voltage feedforward paths are employed, is proposed to reduce the low frequency ripple in the article. Due to only bandpass filter employed in each feedforward path, the proposed control scheme is relatively easy to be implemented. Under the control strategy, the dc-bus port-impedance of dc-dc converter is increased rapidly at double-line frequency, while staying low impedance for other frequencies. What is more, different ICFF paths are taken into insight to obtain optimized path. Meanwhile, the small signal model of front-end dc-dc converter is established and the design principle of key parameters is provided for the derived control strategy. Furthermore, the dynamic response with bandwidth limitation is also discussed in this article. Finally, a two-stage single-phase inverter prototype was fabricated and tested. The experimental results verify the performance of the proposed strategy with SHC reduction.

An Efficiency-Improved Single-Phase PFC Rectifier With Active Power Decoupling

Active power decoupling (APD) technology is an effective solution to store the double-line frequency ripple power in the single-phase system and remove the bulky aluminum electrolytic capacitors. However, APD introduces power loss because of adding extra switches operating at high frequency, which hurts the system efficiency inevitably. Addressing this issue, this article proposes an improved boost power factor correction (PFC) rectifier with a buck-type APD cell. An auxiliary circuit, composed of a resonant inductor and a diode, is added. With the developed modulation strategy, zero voltage switching of the switches both in the PFC and APD circuits is achieved, which improves the system efficiency significantly. This article first describes operating modes and then analyzes the soft-switching condition of each switch. Finally, a 300 W prototype is built and the experimental result shows that the efficiency is increased by 4%.

A Soft-Switched Power-Factor-Corrected Single-Phase Bidirectional AC–DC Wireless Power Transfer Converter With an Integrated Power Stage

Bidirectional ac–dc wireless power transfer (WPT) converters are widely used in grid-connected electric vehicle systems for grid-to-vehicle and vehicle-to-grid applications. They usually apply a two-stage topology with a bidirectional ac–dc power factor correction converter and a bidirectional dc–dc WPT converter. Such a two-stage topology cannot achieve high efficiency and low cost. Recently, single-stage matrix bidirectional ac–dc WPT converters have been proposed. However, the matrix-converter-based topologies do not utilize remarkably lower count of power switches and generate large double-line frequency ripple in the dc-side voltage or current. This article proposes a new single-phase bidirectional ac–dc WPT topology with an integrated power stage to overcome the drawbacks of the matrix-converter-based topologies and retain the advantages of single-stage topologies. Description of the proposed topology with the modulation and control methods, theoretical analysis, and reference design procedure are presented in detail. Finally, a scaled-down laboratory prototype with 500-W output power is implemented with experimental results presented to validate the principle, analysis, and design.

Power Ripple Control Method for Modular Multilevel Converter under Grid Imbalances

Modular multilevel converters (MMCs) are primarily adopted for high-voltage applications, and are highly desired to be operated even under fault conditions. Researchers focused on improving current controllers to reduce the adverse effects of faults. Vector control in the DQ reference domain is generally adopted to control the MMC applications. Under unstable grid conditions, it is challenging to control double-line frequency oscillations in the DQ reference frame. Therefore, active power fluctuations are observed in the active power due to the uncontrolled AC component’s double line frequency component. This paper proposes removing the active power’s double-line frequency under unbalanced grid conditions during DQ transformation. Feedforward and feedback control methods are proposed to eliminate ripple in active power under fault conditions. An extraction method for AC components is also proposed for the power ripple control to eliminate the phase error occurring with the conventional high-pass filters. The system’s stability with the proposed controller is tested and compared with a traditional MMC controller using the Nyquist stability criterion. A real-time digital simulator (RTDS) and Xilinx Virtex 7-based FPGA were used to verify the proposed control methods under single-line-to-ground (SLG) faults.

Current Stress Optimization of Dual Active Bridge Converter in Two-Stage Single-Phase Inverter System With Second Harmonic Current Shaping

With consideration of double line-frequency instantaneous power in two-stage single-phase inverter system, a second harmonic current shaping (SHCS) method is proposed in this paper to minimize the current stress of front-end dual-active-bridge (DAB) DC/DC converter. The current stress of DAB is optimized by analytical expressions in time domain, so that both the low-frequency fluctuations and inherent high-frequency characteristics of DAB current are considered. As a result, the current stress of DAB can be minimized. The analytical expressions of optimized double line-frequency output current of DAB are derived. An implementation method is presented to combine the traditional single voltage closed-loop (SVC) control method with the feedforward compensation of only double line-frequency output current of DAB. Therefore, the stability and dynamic performance of SVC are not affected by SHCS method. The parameters design of SHCS method is the same as that of SVC method. The minimum current stress and fast dynamic response can be achieved by SHCS method without any compromise. The performance evaluation indicates that SHCS method is superior to traditional methods in terms of optimization effects and implementation method. The experimental results verify the good performance of SHCS method both in steady-state and dynamic state.

Optimization of DC-Link Capacitance Based on the Power Loss Modeling of IGBT for Inverters Under Swing Bus Operation

The power density and reliability of the inverter can be improved with reduced DC-link capacitance by swing bus operation, etc. With insufficient DC-link capacitance, a double line frequency voltage ripple will be superimposed on the DC link, but how this voltage ripple affects the power loss of the IGBT in the inverter system has been seldom discussed. This paper analyzes the influence of voltage fluctuations on the power loss of IGBT and establishes the characteristic database of IGBTs under different operating voltages and currents using a dynamic test chamber. A switching profile-based power loss model has been proposed to evaluate the power loss of IGBT in the single-phase inverter under different DC link voltage ripples. All the theoretical analysis has been verified by a 6-kW inverter platform under swing bus operation (SBO).

Third-Harmonic Current Injection for Wear-Out Reduction in Single-Phase PV Inverters

The expansion of grid-connected photovoltaic (PV) systems over the years has been followed by concerns about the PV inverter reliability. It is well known that single-phase grid-connected PV inverter has a double-line frequency ripple in the dc-link voltage, which increases the wear-out failure probability of the dc-link capacitor and affects the overall inverter reliability. This work uses a third-harmonic current injection to attenuate the double-line frequency ripple in the dc-link capacitor voltage and to improve the PV system reliability. An analytical model capable to describe the effects of the third-harmonic current injection method in the dc-link capacitor is derived. The proposed strategy is validated by simulation and experimental results. The lifetime evaluation is developed considering a 3 kVA PV inverter and one-year mission profiles. The PV inverter failure probability considering an operation period equal to 20 years decreased in 27.17% for the adopted case study. Moreover, this strategy provides a straightforward retrofit of the current inverter technology, requiring no hardwarechanges.

Analysis and Suppression of Voltage Harmonic Distortions of the Single-Phase High Frequency Link Matrix-Type DC–AC Converter

The single-phase high frequency link (HFL) matrix-type DC-AC converter has been widely explored due to its high efficiency, light weight, and high power density, which offers galvanic isolation power conversion without bulky dc link capacitors and soft-switching operation. Different from traditional two-level DC-AC converters, the single-phase HFL matrix-type DC-AC converter has no double-line frequency ripple voltage on the DC side, but the ripple appears on the clamp capacitor, which has not yet been investigated in detail so far. In this paper, the mechanism of the double-line frequency ripple voltage of the clamp capacitor in the single-phase HFL matrix-type DC-AC converter is comprehensively explored, and a mathematical model of the HFL matrix-type DC-AC converter is established. To suppress the effect of the double-line frequency ripple voltage on the power quality and guarantee the good power quality of the AC side, a multi-resonant (MPR) controller is applied to reduce voltage harmonic distortions. A 20-kHz HFL matrix-type DC-AC converter prototype is built. Experimental results have verified the effectiveness of the analysis and applied control scheme.

Battery Current-Sharing Power Decoupling Method for Realizing a Single-Stage Hybrid PV System

Conventionally, the single-stage grid-connected PV inverter needs a large PV-side electrolytic capacitor to suppress the double-line frequency current ripple to keep the PV operating at maximum power point (MPP). However, the short lifetime electrolytic capacitor will reduce the PV inverter’s reliability dramatically. In order to overcome the above problem, a novel battery current-sharing power decoupling (BCSPD) method for hybrid photovoltaic (PV) power systems is proposed in this paper. The proposed BCSPD circuit is parallel-connected with the string PV module to achieve as a single-stage topology. Thus, a high power conversation efficiency can be obtained. The current-injection method is adapted to solve the current ripple problem. Therefore, the required capacitance in PV side can be greatly reduced, so long-life film capacitors can be used instead of electrolytic capacitors. In addition, the battery storage system with the droop control is also used to realize the power regulation function to meet the requirements of actual applications. A 1200 W prototype was designed and implemented to assess the system performance. Experimental results show that the proposed system can track MPP, regulate the load power condition, and reduce current ripple.