Doped Polycrystalline Si Research Articles

Investigation of Contact Resistivities on APCVD (p) Poly-Si for Fired Passivating Contacts

We investigate the properties of boron doped polycrystalline Si (poly-Si) deposited by atmospheric pressure chemical vapor deposition (APCVD) applied to fired passivating contacts (FPC), where no high temperature annealing takes place apart from the contact firing step. X-ray diffraction measurements show that the APCVD poly-Si is already partially crystallized directly after deposition and the crystallite size further increases during firing. Without metallization an implied open circuit voltage of up to 719 mV is achieved. Screen-printing with an Ag paste yields minimal contact resistivities of down to 1 mΩcm² at high firing temperatures. Furthermore, thicker poly-Si layers, accomplished by driving the same wafer multiple times through the APCVD system, generally correspond to lower contact resistivities for the FPC. This can partly be explained by an increasing crystallinity and conductivity during deposition due to the higher thermal budget during deposition for thicker layers as well as by a larger contact area for thicker poly-Si layers. Scanning electron microscopy on sample cross-sections show that almost the entire poly-Si layer is covered with Ag crystallites at high firing temperatures. For lower temperatures a lower density of Ag crystallites in the poly-Si is visible. Both findings hold for planar and textured surfaces.

Pinhole electrical conductivity in polycrystalline Si on locally etched SiNy/SiOx passivating contacts for Si solar cells

State-of-the-art monocrystalline Si (c-Si) solar cells require passivating contacts to achieve a high degree of charge-carrier separation and collection. In this work, we focus on boron-doped polycrystalline Si on locally etched silicon nitride/silicon oxide (PLENO) passivating contacts. In PLENO contacts, excellent surface passivation is provided by the ∼10 nm dielectric bilayer, while pinholes in the dielectric bilayer, that are filled with doped polycrystalline Si, provide charge-carrier selectivity and transport. During PLENO fabrication, etch undercut in the dielectric bilayer occurs. Using electrical characterization and microscopies, we show that undercut causes pinholes to be electrically resistive in PLENO. A processing sequence that eliminates the undercut in the final PLENO structure results in electrically conductive pinholes with low contact resistivity.

Engineering Heterointerface for High-efficiency Silicon Solar Cells

High-performance passivating contacts are crucial to realizing high-efficiency crystalline silicon (c-Si) solar cells. The passivating contacts can efficiently transport photogenerated carriers from c-Si to metal electrodes. A representative passivating contact is the stack of ultra-thin silicon oxide (SiOx) and doped polycrystalline Si. In the structure, the layer thickness of silicon oxide is limited to 1～2 nm to collect photogenerated carriers. For further improvements, we have developed NAnocrystal Transport path in Ultra-thin dielectrics for REinforced passivating contact（NATURE contact）as a new passivating contact. The NATURE contact consists of Si nanocrystals (NCs) and SiOx matrix. The Si NCs and the SiOx matrix function as carrier transport paths and passivation layers for the c-Si surface, respectively. The NATURE contact can attain good passivation performance and conductive property. In this paper, we briefly explain the fundamentals of the passivating contacts and introduce the properties of the NATURE contact.

Nanopinhole Passivating Contact Si Solar Cells Fabricated with Metal‐Assisted Chemical Etching

AbstractMonocrystalline Si (c‐Si) solar cells with passivating contacts based on doped polycrystalline Si (poly‐Si) on ≈2.0 nm silicon oxide (SiOx) require >1000 °C thermal processing to create conducting pinholes in the SiOx layer. However, this high thermal budget can induce bulk defects in the Czochralski c‐Si wafers used as the cell absorber layer. In this work, it is demonstrated that pinholes can instead be created using metal‐assisted chemical etching on planar or textured morphologies, at room temperature. This wet process creates up to 200 nm wide conducting pinholes that are directly observed with transmission electron and atomic force microscopies. High‐performance hole‐selective poly‐Si/SiNy/SiOx and electron‐selective poly‐Si/SiOx passivating contacts are fabricated and implemented in laboratory‐scale solar cells. This process development significantly broadens the range of passivation layer materials, their thicknesses, and surface morphologies, which enables the design of poly‐Si contacts with superior passivating quality.

High Temperature Annealing of ZnO:Al on Passivating POLO Junctions: Impact on Transparency, Conductivity, Junction Passivation, and Interface Stability

We investigate the enhancement in transparency and conductivity of aluminum doped zinc oxide (ZnO:Al) layers upon high-temperature annealing and its impact on contact resistance, as well as, on passivation properties of carrier selective junctions based on doped polycrystalline Si on a passivating silicon oxide (POLO). The temperature stability of these junctions allows annealing of the ZnO:Al/POLO combination up to 600 °C. We prepare ZnO:Al films by dc magnetron sputtering at room temperature. We determine the complex refractive index of ZnO:Al in dependence of post-deposition annealing (PDA) temperature by spectroscopic ellipsometry. High-temperature annealing improves the conductivity and reduces the absorption within ZnO:Al. The optical losses in a ZnO:Al/POLO stack are rather limited by the poly-Si layer than by the ZnO:Al. The sheet resistance improves from roughly 20 000 Ω/sq for 80 nm thick as-deposited ZnO:Al films to 72 Ω/sq after fast firing at 600 °C. At the same time, PDA cures the damage induced in the POLO junctions during ZnO:Al deposition. After PDA with AlxOy capping layers, the passivation quality even surpasses the initial level. A transmission electron microscopy analysis of the interface between the ZnO:Al and the underlying poly-Si reveals the formation of a silicon oxide like interfacial layer after PDA at 400 °C. This interfacial layer causes a high contact resistivity of the metal/ZnO:Al/POLO-junction and could limit the thermal budget for cell processing. Our results indicate that after successful process adjustment, ZnO:Al could substitute In-based transparent conductive oxides on POLO cells for cost reasons, as well as, enable a high efficiency potential.

Electrical activation in boron doped polycrystalline Si formed by sequential lateral solidification

We have investigated the electrical activation in boron doped poly-Si using Hall measurement, 4-point probe, and secondary ion mass spectroscopy. Through doping was conducted using a mass-separated ion implanter with acceleration energies from 20 to 35 keV at doses ranging from 1 × 10 15/cm 2 to 4 × 10 15/cm 2, followed by isothermal rapid-thermal-annealing at temperatures ranging from 550 to 650 °C. The substrates used were poly-Si, produced by two-shot sequential lateral solidification. Reverse annealing, in which a continuous loss of charge carriers occurs, was observed in boron doped poly-Si. We found that implantation conditions play a critical role on dopant activation as well as annealing conditions. We observed that a certain implantation condition does exist where the sheet resistance is not changed upon activation annealing. Damage recovery encountered in activation annealing seems to be closely related to a reverse-annealing phenomenon. We assume that the defect-concentration profile would be more important to activation behavior of poly-Si than integrated defect-density accumulated in the silicon layer.

Proposal for efficient generation of spin-polarized current in silicon

We propose a spin-dependent resonant tunneling structure to efficiently inject spin-polarized current into silicon. By means of a heavily doped polycrystalline Si between the ferromagnetic metal and Si, the Schottky barrier resistance is reduced and consequently the tunneling current density is raised. The small Fermi sea of the charge carriers in Si focuses the tunneling electrons to the resonant spin states within a small region of transverse momentum in the ferromagnet which creates the spin polarization of the current.

IN-SITU TEM INVESTIGATION ON NUCLEATION AND GROWTH BEHAVIOR OF P-DOPED Si THIN FILMS

The nucleation and growth behaviors of undoped and phosphorus doped polycrystalline Si thin films were investigated by in-situ TEM observations. Polycrystalline Si thin films were partially changed to amorphous by ion implantations. A normal grain growth was observed in the undoped Si thin films during heating. On the other hand, the P -doped sample showed the recovery and growth at grain boundary as well as the nucleation of Si nanocrystals at amorphous regions. Although the amorphous hindered the grain growth and acted as the nucleation source of Si nanocrystals at lower temperature, the final grain size of polycrystalline Si at 650°C was larger in the P -doped sample. The carrier mobility of the P -doped Si thin films not only increased with heat treatments, but also was corresponding to the microstructural evolution.

Application of Modified Rapid Thermal Annealing to Doped Polycrystalline Si Thin Films Towards Low Temperature Si Transistors.

Modified thermal annealing was applied to the activation of the polycrystalline silicon films doped as p-type through implantation of <TEX>$B_2H_6$</TEX>. The statistical design of experiments was successfully employed to investigate the effect of rapid thermal annealing on activation of polycrystalline Si doped as p-type. In this design, the input variables are furnace temperature, power of halogen lamps, and alternating magnetic field. The degree of ion activation was evaluated as a function of processing variables, using Hall effect measurements and Raman spectroscopy. The main effects were estimated to be furnace temperature and RTA power in increasing conductivity, explained by recrystallization of doped ions and change of an amorphous Si into a crystalline Si lattice. The ion activation using rapid thermal annealing is proven to be a highly efficient process in low temperature polycrystalline Si technology.

An innovating technological approach for Si–SiGe superlattice integration into thermoelectric modules

This paper presents the development of doped polycrystalline Si–SiGe superlattices as thermoelectric (TE) elements integrated into generators. The modules dimension is 1 cm2, Si and SiGe are in situ doped (n and p types) and realized by CVD (chemical vapor deposition) on a 4 inch (0 0 1) silicon wafer. Si–SiGe superlattice growth will be studied, as well as the integration into thermoelectric modules. Interest in using superlattices as TE materials will be justified by their thermal conductivity measurements. Moreover, process fabrication and different geometry designs will be presented. Finally, the first measurements realized on these modules allowed scavenging 320 mV for a temperature difference of 90 K.

Application of Field-Enhanced Rapid Thermal Annealing to Activation of Doped Polycrystalline Si Thin Films

AbstractActivation of polycrystalline silicon (poly-Si) thin films doped as n-type using selective ion implantation of phosphorous was performed employing field-enhanced rapid thermal annealing where rapid thermal annealing of halogen lamps is combined with alternating magnetic fields. The ion activation was evaluated using Hall effect measurements incorporating the resistivity, the charge carrier concentration, and the mobility. Statistical design of experiments is attempted in order to clarify the effects and interactions of processes variables on field-enhanced rapid thermal annealing towards ion activation: the three processing variables are furnace temperature, power of halogen lamp, and the alternating magnetic field. Hall effect measurements indicate that the furnace temperature and RTA power are found to be dominant in activating the doped polycrystalline Si in dose. The activation process results from the competition between charge carrier concentration and mobility: the increase in mobility is larger than the decrease in charge carrier concentration.

Fermi level pinning and Hf–Si bonds at HfO2: Polycrystalline silicon gate electrode interfaces

Doped polycrystalline Si (poly-Si) gate electrodes on HfO2 films on Si substrates are found not to cause as large shifts in the flat band voltage as those of SiO2 on Si. This effect has been attributed to a weak pinning of the Fermi level at the top poly-Si HfO2 interface. The effect is shown to be consistent with the formation of Hf–Si bonds at an otherwise O-terminated oxide interface. Vacancies, divacancies, and substitutional Si atoms are introduced into models of oxygen-terminated Si–HfO2 (100) interfaces and the resulting Hf–Si bonds are found to create a metallic interface with the Fermi level pinned at about 0.3 eV below the Si conduction band-edge.

Tungsten silicide contacts to polycrystalline silicon and silicon–germanium alloys

Silicon–germanium alloy layers will be employed in the source–drain engineering of future MOS transistors. The use of this technology offers advantages in reducing series resistance and decreasing junction depth resulting in reduction in punch-through and SCE problems. The contact resistance of metal or metal silicides to the raised source–drain material is a serious issue at sub-micron dimensions and must be minimised. In this work, tungsten silicide produced by chemical vapour deposition has been investigated as a contact metallization scheme to both boron and phosphorus doped polycrystalline Si 1− x Ge x , with 0 ≤ x ≤ 0.3. Cross bridge Kelvin resistor (CKBR) structures were fabricated incorporating CVD WSi 2 and polycrystalline SiGe. Tungsten silicide contacts to control polysilicon CKBR structures have been shown to be of high quality with specific contact resistance ρ c values 3 × 10 −7 ohm cm 2 and 6 × 10 −7 ohm cm 2 obtained to boron and phosphorus implanted samples respectively. The SiGe CKBR structures show that the inclusion of Ge yields a reduction in ρ c for both dopant types. The boron doped SiGe exhibits a reduction in ρ c from 3 × 10 −7 to 5 × 10 −8 ohm cm 2 as Ge fraction is increased from 0 to 0.3. The reduction in ρ c has been shown to be due to (i) the lowering of the tungsten silicide Schottky barrier height to p-type SiGe resulting from the energy band gap reduction, and (ii) increased activation of the implanted boron with increased Ge fraction. The phosphorus implanted samples show less sensitivity of ρ c to Ge fraction with a lowest value in this work of 3 × 10 −7 ohm cm 2 for a Ge fraction of 0.3. The reduction in specific contact resistance to the phosphorus implanted samples has been shown to be due to increased dopant activation alone.

Parallel-beams/lever electrothermal out-of-plane actuator

We report on the design, modeling, fabrication and testing of a powerful electrothermal actuator allowing for various modes of movement and exhibiting forces large enough to be usable in a micro-tribotester. The performance of the actuator has been simulated combining numerical and analytical calculations, and then the results were compared with experiments performed in ambient conditions and in vacuum. Theoretical results and measurements are consistent if the temperature dependence of the properties of the polycrystalline Si is taken into account. The temperature dependence of the electrical resistivity and the linear thermal expansion coefficient of the Boron doped polycrystalline Si have been derived from experimental results and self-consistent numerical calculations. We delimited the reversible and irreversible actuation regions of the electrothermal actuator, thus the so-called “plastic deformation” for actuation at high electrical power can be avoided.

Silicidation behaviors of Co/Ti and Co/Hf bilayers on doped polycrystalline Si substrate

Silicide layer structures and morphological change of silicide/Si interface for Co/Ti and Co/Hf bilayers sputter-deposited on P-doped polycrystalline Si substrate and subjected to rapid thermal annealing were investigated and compared with those on single Si substrate. The CoSi-CoSi 2 phase transition temperature is lower and morphological degradation of the silicide layer occurs more severely for Co/refractory metal bilayer on P-doped polycrystalline Si substrate than on single Si substrate. Also, the final layer structure of the films after silicidation annealing was found to depend strongly upon the interlayer metals. In the Co/Ti/poly-Si system, Si atoms pile up at the surface of the silicide layer, while no Si pile-up is observed for the Co/Hf/poly-Si system.

Low Temperature Formation of C54 TiSi2 Bypassing the C49 Phase: Effect of Si Crystallinity, Metallic Impurities and Applications TO 0.10 μm CMOS

ABSTRACTThe mechanism and evolution from the early stages of the Ti/Si reaction by rapid thermal processing (RTP) at 650°C in the presence of Mo doping was studied and compared to the case without Mo doping; for amorphous, polycrystalline and single crystal (100) Si substrates. It was found that for Mo doped polycrystalline Si or Mo doped amorphous Si, the low resitivity C54 TiSi2 phase nucleates at the Ti/Si interface and grows following diffusion limited kinetics, bypassing the nucleation of the high resistivity C49 TiSi2 phase. The conventional phase sequence, with C49 TiSi 2 nucleation and growth, was observed on Mo doped (100) Si and all samples without Mo. The mechanism of early C54 nucleation was identified by high resolution transmission electron microscopy (HRTEM): at early stages of the reaction, precursor silicide phases lattice matched to C54 TiSi2 nucleate at the Ti/Mo doped Si interface, and act as templates for epitaxial nucleation of C54 TiSi2. Two such phases were observed, MoSi2 and a phase with spacings of 2.26 Å and 4.2 Å. Image simulations suggest that the structure of the second template phase is based on Mo5Si3. Similar kinetics were observed on large structures and narrow lines for Mo doped Si (except for the case of (100) Si), indicating that this growth mechanism eliminates the linewidth dependence. Implementation on a 0.10 μm CMOS technology of a process combining Mo doping with pre-amorphization (PAI) achieves low source/drain (S/D) sheet resistance, and the first Ti salicide process with low gate sheet resistance down to 0.06 μm.

Low temperature formation of C54–TiSi2 using titanium alloys

We demonstrate that the temperature at which the C49 TiSi2 phase transforms to the C54 TiSi2 phase can be lowered more than 100 °C by alloying Ti with small amounts of Mo, Ta, or Nb. Titanium alloy blanket films, containing from 1 to 20 at. % Mo, Ta, or Nb were deposited onto undoped polycrystalline Si substrates. The temperature at which the C49–C54 transformation occurs during annealing at constant ramp rate was determined by in situ sheet resistance and x-ray diffraction measurements. Tantalum and niobium additions reduce the transformation temperature without causing a large increase in resistivity of the resulting C54 TiSi2 phase, while Mo additions lead to a large increase in resistivity. Titanium tantalum alloys were also used to form C54 TiSi2 on isolated regions of arsenic doped Si(100) and polycrystalline Si having linewidths ranging from 0.13 to 0.56 μm. The C54 phase transformation temperature was lowered by over 100 °C for both the blanket and fine line samples. As the concentration of Mo, Ta, or Nb in the Ti alloys increase, or as the linewidth decreases, an additional diffraction peak appears in in situ x-ray diffraction which is consistent with increasing amounts of the higher resistivity C40 silicide phase.

Ultra thin gate oxide reliability enhanced by carbon contamination free process

In this paper, we have demonstrated that carbon contamination caused by a wafer exposure to clean room air induces the degradation of a gate oxide reliability, and we have improved a gate oxide reliability by using a closed system, where the oxidation is followed by an in-situ phosphorus doped polycrystalline Si (poly-Si) gate formation in the same furnace. Furthermore, in opened system, we have demonstrated the removal of the carbon contamination by using only O 3 gas ambient and O 3 gas ambient combined with IR lamp irradiation.

Stable and efficient electroluminescence from a porous silicon-based bipolar device

A complete process compatible with conventional Si technology has been developed in order to produce a bipolar light-emitting device. This device consists of a layer of light-emitting porous silicon annealed at high temperature (800–900 °C) sandwiched between a p-type Si wafer and a highly doped (n+) polycrystalline Si film. The properties of the electroluminescence (EL) strongly depend on the annealing conditions. Under direct bias, EL is detected at voltages of ∼2 V and current densities J∼1 mA/cm2. The maximum EL intensity is 1 mW/cm2 and the EL can be modulated by a square wave current pulse with frequencies ν≥1 MHz. No degradation has been observed during 1 month of pulsed operation.

極薄い保護酸化膜を有した高濃度リンドープシリコンの昇温清浄化過程

Heavily phosphorus-doped silicon wafers were prepared by the Shiraki method as a chemical treatment. The thermally stimulated desorption (TSD) from these samples with thin oxide films was studied by using Auger electron spectroscopy (AES), electron energy loss spectroscopy (EELS), and mass spectroscopy. The chemical states of the etched surfaces were measured by X-ray photoelectron spectroscopy (XPS). It was found that the thin oxide film on the doped polycrystalline Si surface was desorbed easily at relatively low temperature (560°C), similarly to a single-crystal one. The desorption of the oxide is due to the chemical state from the interface to the near-surface region which includes not only SiO2 but also SiOx. For a single-crystal silicon, a large quantity of phosphorus segregated to the near-surface region even after the oxide had desorbed. It is considered that this phosphorus segregation is attributable to the existence of the strain which is not relaxed because of the low annealing temperature even after desorption of the oxide.