Discrete-time Chaotic Maps Research Articles

Lightweight encryption mechanism with discrete-time chaotic maps for Internet of Robotic Things

Chaotic systems have different characteristics that can be utilized for the purpose of cyber security. These features result from the erratic structure of images, making it difficult for systems to comprehend those images. Therefore, chaotic systems can serve as an effective means of securely storing and concealing images by implementing them in the IoRT for data encryption. In this study, a new lightweight encryption mechanism for IoRT based robots is proposed. A novel chaotic encryption mechanism is designed with discrete-time chaotic maps (Cubic Map and Ricker’s Population Model Map) for more efficiently encrypting large-sized data, such as images and videos, in robots. The test of the developed mechanism was conducted on the NVIDIA Jetson Orin development kit, which is utilized in artificial intelligence-supported robots and boasts high performance and energy efficiency. The study’s most important finding is that the established mechanism is suitable for parallel processing, making it possible to accomplish a high rate of image encryption per second utilizing the proposed method. In order to encrypt large files for IoRT, firstly, random number generation was performed and statistical tests were carried out. Then, encryption operations were performed with the developed encryption algorithm and security analyses were realized. The performances of the proposed mechanism will be compared with some studies in the literature. Based on the obtained image analysis and encryption performance, it has been shown that the developed mechanism can be easily used with high security for IoRT.

Robust Chaos With Novel 4-Transistor Maps

This brief presents four discrete-time chaotic map circuits, including three new map circuits and one that has been previously reported. The designs are hardware efficient as they each contain only four Metal Oxide Semiconductor (MOS) transistors. They offer robust chaotic performance with wide chaotic space and uniform entropic properties. The wide chaotic region is essential for applications where parametric perturbation can push the system out of the desirable chaotic region. The chaotic performance is analyzed using a bifurcation plot, Lyapunov exponent, correlation coefficient, sample entropy, and Shannon entropy, and improvement over previous transistor-level designs is demonstrated. The proposed method can be useful in applications such as random number generation, reconfigurable and flexible computing, side-channel attack mitigation, logic obfuscation, and chaos-based cryptography. A chaotic oscillator design is proposed and its application in a chaos-based reconfigurable logic gate is presented, as well.

An Improved Gumowski–Mira Map with Symmetric Lyapunov Exponents

The symmetric Lyapunov exponents (LEs) are known to be an inherent property of continuous-time conservative systems. However, the research on this interesting phenomenon in a discrete-time chaotic map has not been reported. Thus, this paper presents an improved 2D chaotic map based on Gumowski–Mira (GM) transformation, which has a stable fixed point or an unstable fixed point depending on its control parameters. Furthermore, it can display symmetric LEs and an infinite number of coexisting attractors with different amplitudes and different shapes. To demonstrate the complex dynamics of the 2D chaotic map, this paper studies its control parameters related to dynamical behaviors employing numerical analysis methods. Then, the hardware implementation based on STM32 platform is established for illustrating the numerical simulation results. Next, the random performance of the 2D chaotic map is tested by NIST FIPS140-2 suite. Finally, an image encryption algorithm based on the 2D chaotic map is designed, and the results obtained reveal that the proposed chaotic map has excellent randomness and is more suitable for many chaos-based image encryptions.

Cascading CMOS-Based Chaotic Maps for Improved Performance and Its Application in Efficient RNG Design

We present a general framework for improving the chaotic properties of CMOS-based chaotic maps by cascading multiple maps in series. Along with two novel chaotic map topologies, we present the 45 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$nm$ </tex-math></inline-formula> designs for four CMOS-based discrete-time chaotic map topologies. With the help of the bifurcation plot and three established entropy measures, namely, Lyapunov exponent, Kolmogorov entropy, and correlation coefficient, we present an extensive chaotic performance analysis on eight unique map circuits (two under each topology) to show that under certain constraints, the cascading scheme can significantly elevate the chaotic performance. The improved chaotic entropy benefits many security applications and is demonstrated using a novel random number generator (RNG) design. Unlike conventional mathematical chaotic map-based digital pseudo-random number generators (PRNG), this proposed design is not completely deterministic due to the high susceptibility of the core analog circuit to inevitable noise that renders this design closer to a true random number generator (TRNG). By leveraging the improved chaotic performance of the transistor-level cascaded maps, significantly low area and power overhead are achieved in the RNG design. The cryptographic applicability of the RNG is verified as the generated random sequences pass four standard statistical tests namely, NIST, FIPS, Diehard, and TestU01.

Hardware Implementation of Chaotic Zigzag Map Based Bitwise Dynamical Pseudo Random Number Generator on Field-Programmable Gate Array

In this study, successful real-time implementation of discrete-time chaotic zigzag map as a Random Number Generator on field-programmable gate array (FPGA) environment is presented. For hardware implementation, in addition to ready-use circuit elements defined on 32-bit floating-point numbers, very high-speed integrated circuit hardware description language (VHDL) is used. In the scope of this study, cryptographic critical competencies such as system reliability and randomness quality related to nonlinear dynamic behaviour of zigzag map are examined. H function post - processing technique is used in the system for random numbers with low statistical quality achieved from chaotic system. Also NIST 800-22 standard test technique is used for statistical verification of bit sequences obtained from the generator. In addition to its practical applicability, the results show that the zigzag map can be used as a random number generator for embeded cryptographic applications.

Estimating entropy rate from censored symbolic time series: A test for time-irreversibility

In this work, we introduce a method for estimating the entropy rate and the entropy production rate from a finite symbolic time series. From the point of view of statistics, estimating entropy from a finite series can be interpreted as a problem of estimating parameters of a distribution with a censored or truncated sample. We use this point of view to give estimations of the entropy rate and the entropy production rate, assuming that they are parameters of a (limit) distribution. The last statement is actually a consequence of the fact that the distribution of estimations obtained from recurrence-time statistics satisfies the central limit theorem. We test our method using a time series coming from Markov chain models, discrete-time chaotic maps, and a real DNA sequence from the human genome.

Implementation and Performance Analysis of True Random Number Generator on FPGA Environment by Using Non-periodic Chaotic Signals Obtained from Chaotic Maps

In this study, FPGA implementation of a hybrid random number generator (HRNG) based on digital design techniques is given. The ring oscillators (ROs) are used as the noise source of HRNG, and true randomness is obtained by sampling jitter signals forming on the oscillators. The statistical quality and reliability of random number generators that used jitter as source of true randomness alone are often cryptographically insufficient. For this reason, one-dimensional discrete-time chaotic maps such as quadratic map, logistic map and Bernoulli shift map are benefited in order for HRNG to meet these cryptographic requirements. In contrast to many studies in the literature, non-periodic signals derived from chaotic systems of a powerful source of entropy are used instead of periodic signals for the sampling of jitter signals in the system. Depending on the usage of chaotic systems, output bit rate and reliability of high generator model that does not need post-processing techniques and is easily applicable to digital devices are obtained. The hybrid system is tested in total six different scenarios for two separate ring oscillator (RO) architectures of 25 and 114 pieces consisting of three different chaotic maps and equal-length inverters. The statistical qualifications of the random numbers obtained from HRNG for each scenario are verified by NIST 800-22 tests. Also, for each scenario, the design parameters of the generator are examined and the hardware performances and non-periodicity analyses of the chaotic maps are performed. Based on the obtained results, it is demonstrated that the HRNG based on non-periodic sampling can be used for cryptographic purposes.

Dynamic Analysis of Digital Chaotic Maps via State-Mapping Networks

Chaotic dynamics is widely used to design pseudo-random number generators and for other applications such as secure communications and encryption. This paper aims to study the dynamics of discrete-time chaotic maps in the digital (i.e., finite-precision) domain. Differing from the traditional approaches treating a digital chaotic map as a black box with different explanations according to the test results of the output, the dynamical properties of such chaotic maps are first explored with a fixed-point arithmetic, using the Logistic map and the Tent map as two representative examples, from a new perspective with the corresponding state-mapping networks (SMNs). In an SMN, every possible value in the digital domain is considered as a node and the mapping relationship between any pair of nodes is a directed edge. The scale-free properties of the Logistic map's SMN are proved. The analytic results are further extended to the scenario of floating-point arithmetic and for other chaotic maps. Understanding the network structure of a chaotic map's SMN in digital computers can facilitate counteracting the undesirable degeneration of chaotic dynamics in finite-precision domains, helping also classify and improve the randomness of pseudo-random number sequences generated by iterating chaotic maps.

One-Dimensional Nonlinear Model for Producing Chaos

Motivated by the concept of circuit design in digital circuit, this paper proposes a one-dimensional (1D) nonlinear model (1D-NLM) for producing 1D discrete-time chaotic maps. Our previous works have designed four nonlinear operations of generating new chaotic maps. However, they focus only on discussing individual nonlinear operations and their properties, but fail to consider their relationship among these operations. The proposed 1D-NLM includes these existing nonlinear operations, develops two new nonlinear operations, discusses their relationship among different nonlinear operations, and investigates the properties of different combinations of these operations. To show the effectiveness of 1D-NLM in generating new chaotic maps, as examples, we provide four new chaotic maps and study their dynamics properties from following three aspects: equilibrium point, stability, and bifurcation diagram. Performance evaluations are provided using the Lyapunov exponent, Shannon entropy, correlation dimension, and initial state sensitivity. The evaluation results show that these new chaotic maps have more complex chaotic behaviors than existing ones. To demonstrate the performance of 1D-NLM in practical applications, we use a pseudo-random number generator (PRNG) to compare new and existing chaotic maps. The randomness test results indicate that new chaotic map generated by 1D-NLM shows better performance than existing ones in designing PRNG.

Improving the pseudo-randomness properties of chaotic maps using deep-zoom

A generalized method is proposed to compose new orbits from a given chaotic map. The method provides an approach to examine discrete-time chaotic maps in a “deep-zoom” manner by using k-digits to the right from the decimal separator of a given point from the underlying chaotic map. Interesting phenomena have been identified. Rapid randomization was observed, i.e., chaotic patterns tend to become indistinguishable when compared to the original orbits of the underlying chaotic map. Our results were presented using different graphical analyses (i.e., time-evolution, bifurcation diagram, Lyapunov exponent, Poincaré diagram, and frequency distribution). Moreover, taking advantage of this randomization improvement, we propose a Pseudo-Random Number Generator (PRNG) based on the k-logistic map. The pseudo-random qualities of the proposed PRNG passed both tests successfully, i.e., DIEHARD and NIST, and were comparable with other traditional PRNGs such as the Mersenne Twister. The results suggest that simple maps such as the logistic map can be considered as good PRNG methods.

Discrete-time chaotic-map truly random number generators: design, implementation, and variability analysis of the zigzag map

In this paper, we introduce a novel discrete chaotic map named zigzag map that demonstrates excellent chaotic behaviors and can be utilized in truly random number generators (TRNGs). We comprehensively investigate the map and explore its critical chaotic characteristics and parameters. We further present two circuit implementations for the zigzag map based on the switched current technique as well as the current-mode affine interpolation of the breakpoints. In practice, implementation variations can deteriorate the quality of the output sequence as a result of variation of the chaotic map parameters. In order to quantify the impact of variations on the map performance, we model the variations using a combination of theoretical analysis and Monte-Carlo simulations on the circuits. We demonstrate that even in the presence of the map variations, a TRNG based on the zigzag map passes all of the NIST 800-22 statistical randomness tests using simple post processing of the output data.

STATISTICAL TESTING OF A CHAOS BASED CMOS TRUE-RANDOM NUMBER GENERATOR

As faster Random Number Generators become available, the possibility to improve the accuracy of randomness tests through the analysis of a larger number of generated bits increases. In this paper we first introduce a high-performance true-random number generator designed by authors, which use a set of discrete-time piecewise-linear chaotic maps as its entropy source. Then, we present by means of suitably improved randomness tests, the validation of this generator and the comparison with other high-end solutions. We consider the NIST test suite SP 800-22 and we show that, as suggested by NIST itself, to increase the so-called power of the test, a more in-depth analysis should be performed using the outcomes of the suite over many generated sequences. With this approach we build a framework for RNG high quality testing, with which we are able to show that the designed prototype has a comparable quality with respect to the other high-quality commercial solutions, with a working speed that is one order of magnitude faster.

GENERATION OF PSEUDO-CHAOTIC SEQUENCES

This paper deals with the spectral properties of pseudo-random signals generated in maximum-length shift registers. It is shown that infinitely long registers are comparable in behavior with one-dimensional discrete-time chaotic maps. Therefore the theory, results and tools developed for chaotic systems can be applied to the design of the spectral properties of maximum-length shift register sequences.