Robust Chaos With Novel 4-Transistor Maps

Abstract

This brief presents four discrete-time chaotic map circuits, including three new map circuits and one that has been previously reported. The designs are hardware efficient as they each contain only four Metal Oxide Semiconductor (MOS) transistors. They offer robust chaotic performance with wide chaotic space and uniform entropic properties. The wide chaotic region is essential for applications where parametric perturbation can push the system out of the desirable chaotic region. The chaotic performance is analyzed using a bifurcation plot, Lyapunov exponent, correlation coefficient, sample entropy, and Shannon entropy, and improvement over previous transistor-level designs is demonstrated. The proposed method can be useful in applications such as random number generation, reconfigurable and flexible computing, side-channel attack mitigation, logic obfuscation, and chaos-based cryptography. A chaotic oscillator design is proposed and its application in a chaos-based reconfigurable logic gate is presented, as well.