Diode Reverse Recovery Research Articles

Optimum Boundary Inductance Control Concerning Limited PF for a DCM Boost PFC Converter

The discontinuous conduction mode boost power factor correction converter features zero-current turn- on for the switch, no reverse recovery in diode, and constant frequency operation. With traditional constant duty ratio control, the power transfer in each switching cycle exhibits great difference during a half-line cycle. Consequently, the peak and root mean square values of the inductor current are large, the same goes for the switch and diode. This increases not only the current stress of the power components but also the conduction and switching turn- off loss, and lowers the efficiency of the converter. Introducing third and fifth harmonics into the input current and varying the duty cycle correspondingly can reduce the aforementioned power transfer difference, and provide huge space for the increment of boundary inductance as well. An optimum boundary inductance control concerning limited power factor (PF) is proposed in this paper. For the maximum boundary inductance of the converter within wide input voltage range, the optimum harmonics amounts are analyzed and figured out. The proposed method brings about efficiency improvement, output voltage ripple reduction, and PF increase as well, especially at high input voltages. A prototype has been built and the experimental results are presented to show the validity of the scheme.

A Wide Voltage-Ratio Dual-Output DC Converter for Charging Series-Connected Batteries

In this study, a dual-output converter with a wide input voltage range is proposed for directly equalized charging of series-connected batteries without additional power conversion losses. Compared with most of the equalized charging topologies, such as the those with a multi-winding transformer or voltage multiplier, the proposed converter could be applied to different voltage conversion ratio applications. The proposed converter is capable not only of step-down but also step-up/down power conversions for different input voltage levels. By operating in discontinuous conduction mode, the diode reverse recovery losses can be eliminated and operation stability can also be enhanced. The operation principles and design criteria are both illustrated. A prototype of charging two series-connected LiFePO4 batteries is constructed. Corresponding experimental results of different input voltage levels are provided to verify the performance and validity.

A Lossless Turn-on Snubber for Reducing Diode Reverse Recovery Losses in Bidirectional Buck/Boost Converter

In this letter, we introduce a simple turn- on snubber for the conventional bidirectional converter. This snubber notably reduces the current reduction rate of the converter main diodes at turn- off . Hence, the reverse recovery losses, which are the dominant losses in the bidirectional converter, are almost eliminated. These features are achieved with a minimum circulating current and no extra voltage or current stress. The conventional bidirectional converter with the proposed snubber is analyzed, and to confirm the analysis, the experimental results are presented.

Diode Reverse Recovery Process and Reduction of a Half-Wave Series Cockcroft–Walton Voltage Multiplier for High-Frequency High-Voltage Generator Applications

This paper investigates the diode reverse recovery process and reduction of a half-wave (HW) series Cockcroft–Walton (CW) voltage multiplier based on the steady-state analysis for high-frequency high-voltage (HV) generator applications. The diode reverse recovery process for a multistage voltage multiplier is analyzed after the introduction of steady-state operation. The diode reverse recovery problem is the bottleneck to further increase the circuit operation switching frequency for achieving high power density and short HV pulse rise and decay times. The diode reverse recovery problem is mainly caused by the diodes in the first-stage voltage multiplier. It is suggested that the most effective and economic way to alleviate the diode reverse recovery problem is by employing diodes without reverse recovery such as silicon carbide Schottky diodes in the first stage only. The silicon carbide Schottky diode without reverse recovery needs to be used only in the first stage of the voltage multiplier to effectively mitigate the reverse recovery problems at high frequency. The 300 kHz switching frequency three-stage voltage multiplier circuit hardware prototype experimental results finally validate the analysis. A technology demonstrator of a 300 kHz 8 kW 160 kV HV generator based on the proposed hybrid silicon carbide and silicon diode solution for the HW series CW voltage multiplier is provided finally.

A Soft-Switching Step-Down PFC Converter With Output Voltage Doubler and High Power Factor

In this paper, a new soft-switching bridgeless single-phase power factor correction (PFC) converter is presented and analyzed. Employing an auxiliary switch, the input current dead angle that is the main drawback of the existing buck-type PFCs is omitted, and thus, the power factor (PF) is improved, which is the main contribution of the paper. Proposed PFC converter operates under discontinuous conduction mode (DCM) and draws sinusoidal input current from power supply inherently. All switches and diodes are turned on and off under soft switching, which leads to low switching losses and elimination of diode reverse recovery problems. Also, minimum numbers of semiconductor devices are in the power flow path that reduce the conduction losses. A 120-W laboratory prototype is implemented and experimental results verify the validity of theoretical analysis and show efficiency of 92.1%. In addition, total harmonic distortion (THD) of 3.3% is achieved and the input current harmonics complies with IEC61000-3-2 Class D requirements.

Family of zero voltage transition interleaved converters with low voltage and current stress

This study presents a family of zero voltage transition (ZVT) interleaved converters which utilises a simple auxiliary cell. The ZVT cell has only a single auxiliary switch for multi-phase interleaved converters. In the proposed converters, all semiconductor devices operate under fully soft switching condition. The main switches turn on and turn off under zero voltage switching (ZVS) condition while the auxiliary switch turns on and turns off under zero current switching (ZCS) condition. Besides, all the converter main and auxiliary diodes turn off under ZCS condition which alleviates the diodes reverse recovery problem. The ZVT cell imposes no extra current and voltage stresses on the semiconductor devices. The effectiveness of the proposed method is evaluated by a 100 kHz, 200 W two-phase interleaved boost converter and the theoretical analysis and design procedure are discussed in detail. Furthermore, the results of an implemented laboratory prototype are provided which are consistent with the theoretical analysis.

Improvement of Power-Conversion Efficiency of AC–DC Boost Converter Using 1:1 Transformer

This paper proposes a circuit structure that can improve the power-conversion efficiency $\eta _{e}$ of an AC–DC boost converter. The circuit uses a 1:1 transformer and a voltage boost circuit composed of an inductor, a capacitor, and a diode. The transformer forces the converter to operate in continuous conduction mode for input current, and thereby reduces input ripple. The voltage boost circuit enables the switch to operate in critical conduction mode, so the power loss due to turn- on of switch and reverse recovery of diode is minimized. The proposed converter has high $\eta _{e}$ over a wide range of AC input voltage $V_{{\rm{ac}}}:\,\eta _{e}= 92.9\% $ at $V_{{\rm{ac}}}= {\text{85}}\,{\text{V}}$ and $\eta _{e}= 97.4\% $ at $V_{{\rm{ac}}}= {\text{265}}\,{\text{V}}$ , when the converter was operated at DC output voltage of 400 V and output power of 500 W. The temperature of the switch stabilized at ∼84 °C for $V_{{\rm{ac}}}= {\text{85}}\,{\text{V}}$ , at ∼70 °C for $V_{{\rm{ac}}}= {\text{110}}\,{\text{V}}$ , and at ∼42 °C for $V_{{\rm{ac}}}= {\text{220}}\,{\text{V}}$ , whereas that in other AC–DC converters either failed or stabilized at much higher levels. The proposed converter is well suited to systems that require an input voltage range of 85–265 V in root-mean-square value.

Critical Conduction Mode Boost PFC Converter With Fixed Switching Frequency Control

Critical conduction mode (CRM) boost power factor (PF) correction converter features zero-current turn-on for the switch and no reverse recovery in diode, which is suitable for low-to-medium power applications. However, the switching frequency varies in a line cycle, and the wide variation range of the switching frequency is different under different input voltage and load conditions. This makes the conducted electromagnetic interference (EMI) spectra appearing great differences and complicates the design of EMI filter. In this paper, based on the expression of the switching frequency for traditional CRM control strategy, a variable on-time control strategy is proposed, and the implementation circuit is designed to realize a fixed switching frequency in a half-line cycle. The proposed strategy also achieves a lower output voltage ripple and a lower peak current for the power components. In spite of the PF decrease, the input current harmonic values are much lower than the IEC 61000-3-2 Class D limits. A 120 W prototype has been fabricated and tested in the laboratory and the experimental results are presented to verify the effectiveness of the proposed method.

SJ-MOSFET with wave-type field limiting ring for high di/dt robustness of body diode reverse recovery

In this letter, a novel Superjunction Metal-Oxide -Semiconductor Field Effect Transistor with wave-type field limiting ring (WFLR-SJ-MOSFET) is proposed to improve the di/dt robustness of body diode reverse recovery. When SJ-MOSFET body diode goes through reverse recovery, the WFLR can suppress and rebuild the peak electric field which is resulted from the large current flowing through the sensitive terminal boundary region. As a consequence, the ruggedness of dynamic avalanche during reverse recovery is optimized. Finally, the di/dt robustness of WFLR-SJ-MOSFET body diode reverse recovery is improved by 3.2 times from 72 A/μs to 320 A/μs comparing with the conventional SJ-MOSFET.

Interleaved High Step-Up DC-DC Converter Based on Voltage Multiplier Cell and Voltage-Stacking Techniques for Renewable Energy Applications

A novel interleaved high step-up DC-DC converter based on voltage multiplier cell and voltage-stacking techniques is proposed for the power conversion in renewable energy power systems. The circuit configuration incorporates an input-parallel output-series boost converter with coupled inductors, clamp circuits and a voltage multiplier cell stacking on the output side to extend the voltage gain. The converter achieves high voltage conversion ratio without working at extreme large duty ratio. The voltage stresses on the power switches are significantly lower than the output voltage. As a result, the low-voltage-rated metal-oxide-semiconductor field-effect transistors (MOSFETs) can be employed to reduce the conduction losses and higher conversion efficiency can be expected. The interleaved operation reduces the input current ripple. The leakage inductances of the coupled inductors act on mitigating the diode reverse recovery problem. The operating principle, steady-state analysis and design guidelines of the proposed converter are presented in detail. Finally, a 1-kW prototype with 28-V input and 380-V output voltages was implemented and tested. The experimental results are presented to validate the performance of the proposed converter.

DC-Link Current and Voltage Ripple Analysis Considering Antiparallel Diode Reverse Recovery in Voltage Source Inverters

In this paper, a method is proposed to investigate the dc-link current and voltage ripple calculations in voltage source inverters by considering the reverse recovery of the antiparallel diodes. The impact of the diode reverse recovery transient on the dc-link current and voltage within the switching period is first analyzed. The analysis indicates that the current ripple rms value is affected by the value of inverter switching frequency, diode reverse recovery time, and current. However, the diode reverse recovery shows negligible impact on the dc-link voltage ripple calculation, since the difference between the voltage ripples calculated by the proposed and existing method is less than 1%. To evaluate the estimation accuracy of the dc-link current ripple rms value by the proposed method, the experiments are implemented and the comprehensive analysis is done under different operating conditions, including various power factors, modulation indexes, inverter output currents, and inverter switching frequencies. Experimental results show that the accuracy of dc-link rms current ripple calculation by the proposed method is in the range of $\pm$ 5% and increased by up to 7% compared with the existing method neglecting the antiparallel diode reverse recovery.

Selection of Inductor and Snubber Capactor to Optimize the Size and Efficiency of DC-DC Switching Power Converter

This paper presents a selection of inductor and snubber capacitor in non-isolated synchronous DC-DC switching power converter. The circuit is made to operate in Synchronous Discontinuous Conduction Mode (SDCM)/Forced Continuous Conduction Mode (FCCM) of operation for minimum inductor value, to reduce the size, weight and cost of the converter. The turn off loss of the switch induced by SDCM of operation is minimized by connecting snubber capacitor across the transistor switch. Before the switch is turned ON, snubber capacitor requires certain amount of energy must be stored in the inductor to discharge the capacitor energy [1]. The question is how much capacitor and inductor value is required. A series of MATLAB script are executed to find minimum inductor value for FCCM of operation and to select snubber capacitor for maximum efficiency. Complementary gate signals are used to control the ON and OFF of main and auxiliary switch. SDCM of operation due to complementary control gate signal scheme, minimum turn on loss of the transistor switch and low diode reverse recovery loss are achieved. Thus the Zero Voltage Resonant Transition (ZVRT) of transistor switch is realized, both turn on and turn off loss is minimized and also removes the parasitic ringing in inductor current.

Determination of Minority Carrier Lifetime of Holes in Diamond p-i-n Diodes Using Reverse Recovery Method

The extracted minority carrier lifetime in the n-layer of a diamond p-i-n diode on (111)- oriented diamond is presented here using the diode reverse recovery method. The storage time delay and the reverse current varied as a function of the ramp time for the applied signal. The storage time delay and reverse current was extracted for zero ramp time by considering a capacitive overshoot effect that can occur during the measurement. The minority carrier lifetime of holes was measured to be ~ 6 ns. The results obtained were compared to p-i-n diodes on (100)- where the n-side was fully depleted. The storage time delay was found to be negligible in the (100)- case. Further, time resolved cathodoluminescence measurements support the lifetime results obtained from the reverse recovery method.

A Multifunctional Double Pulse Tester for Cascode GaN Devices

Gallium Nitride (GaN) power devices with low switching and conduction losses can lead to superior power density in numerous power conversion applications. Their fast switching speeds, however, pose challenges in dynamic device characterization. The large parasitic inductances and contact impedances in conventional double pulse testers (DPTs) meant for Si devices, make them unsuitable for GaN characterization. GaN devices are directly soldered on to testers for minimizing parasitic effects. Furthermore, currently different testers are used for different types of device characterization, requiring the device under test to be repeatedly soldered to different boards. This paper proposes a multifunctional tester well suited for GaN devices and capable of completing all the dynamic characterization on the same board. The proposed tester is able to characterize: device turn on and off transition under hard and soft switching, dynamic Rdson, diode reverse recovery, and device reverse conduction voltage drop. The proposed tester has been implemented in hardware and the functions are validated with tests on a cascode GaN device. Some special properties of the cascode GaN device seen from these tests are highlighted. Detailed design procedures for selecting the critical components of the DPT are presented.

Novel high step‐up dual switches converter with reduced power device voltage stress for distributed generation system

This study introduces a new dual switches converter with a high voltage gain and reduced power device voltage stress. Using a three-winding coupled inductor and voltage multiplier, the proposed converter achieves a high step-up voltage gain without a large duty cycle. However, unlike other converters with coupled inductor, the power device voltage stress in the proposed converter is dramatically reduced. The two clamped diodes not only alleviate the voltage spike across the metal–oxide–semiconductor field-effect transistor (MOSFET), but also reduce the diode reverse recovery issue. The efficiency can be improved as circuit allows the use of low on-resistance MOSFETs and Schottoky diodes in applications where this might not have been possible with conventional topologies. The basic operational principle and relevant theoretical analysis are presented in this study. Finally, practical results from a laboratory prototype are presented to verify the performance of the proposed converter.

Analysis and implementation of high‐gain non‐isolated DC–DC boost converter

High step-up DC-DC converters are increasingly required in many industrial applications. Conventional topologies operate at extreme duty cycle, high-semiconductor voltage stress, switching loss, and diode reverse recovery problems. This study presents a new non-isolated high gain, boost converter operating with a modest duty cycle by integrating a coupled inductor and switched capacitor technique. Importantly, the structure of the high-voltage side, together with the switched capacitor, reduces the voltage stress of the power switch to less than one third of the output voltage, which in turn helps to reduce the conduction loss by using a low on-resistance (R ds-on ) switch. The diode voltage stress is less than the output voltage which facilitates faster recovery. Furthermore, the converter employs a passive clamp circuit to recycle the leakage energy. The main switch achieves zero current switching (ZCS) turn-on performance and all diodes achieve (ZCS) turn off reducing reverse recovery related losses. As a result, the circuit exhibits high efficiency performance; which is essential for most modern power electronic applications. In this study, the operational principle and performance characteristics of the proposed converter is presented and validated experimentally with a 250 W, 20V input voltage/190V output voltage prototype circuit.

Next Generation Planar 1700 V, 20 mΩ 4H-SiC DMOSFETs with Low Specific On-Resistance and High Switching Speed

Due to their fast switching speed, knee-free forward characteristics, and a robust, low reverse recovery body diode, SiC MOSFETs are ideal candidates to replace silicon IGBTs in many high-power medium-voltage applications. 1700 V SiC MOSFETs have already been released to production at Wolfspeed based on its 2nd Gen technology. In this paper, we present our latest results in high voltage 4H-SiC MOSFET development. A low specific on-resistance of 4.7 mΩ⋅cm2 has been achieved on 1700 V, 20 mΩ 4H-SiC DMOSFETs at 250°C based on a 3rd generation planar MOSFET platform, which is less than half of the resistance of the previous generation devices. A detailed analysis has been carried out with respect to the static and dynamic characteristics, third quadrant conduction, and body diode reverse recovery charge, etc.

IGBT Switching Characteristic Curve Embedded Half-Bridge MMC Modelling and Real Time Simulation Realization

The Modular Multilevel Converter (MMC) is one of the most attractive topologies in recent years for medium or high voltage industrial applications, such as high voltage dc transmission (HVDC) and medium voltage varying speed motor drive. The wide adoption of MMCs in industry is mainly due to its flexible expandability, transformer-less configuration, common dc bus, high reliability from redundancy, and so on. But, when the sub module number of MMC is more, the test of MMC controller will cost more time and effort. Hardware in the loop test based on real time simulator will save a lot of time and money caused by the MMC test. And due to the flexible of HIL, it becomes more and more popular in the industry area. The MMC modelling method remains an important issue for the MMC HIL test. Specifically, the VSC model should realistically reflect the nonlinear device switching characteristics, switching and conduction losses, tailing current, and diode reverse recovery behaviour of a realistic converter. In this paper, an IGBT switching characteristic curve embedded half-bridge MMC modelling method is proposed. This method is based on the switching curve referring and sample circuit calculation, and it is sample for implementation. Based on the proposed method, a FPGA real time simulation is carried out with 200ns sample time. The real time simulation results show the proposed method is correct.

An IGBT Turn-ON Concept Offering Low Losses Under Motor Drive dv/dt Constraints Based on Diode Current Adaption

In this paper, a new low-loss turn- on concept for the silicon insulated-gate bipolar transistor (Si-IGBT) in combination with silicon p-i-n diode is presented. The concept is tailored for two-level motor converters in the 100 kW to 1 MW range under the constraint that the output voltages slopes are limited in order to protect the motor windings. Moreover, analyses of the IGBT turn- on and diode reverse recovery voltage slopes are presented concluding that the diode reverse recovery is the worst case. The concept includes a low-cost measurement of the free-wheeling diode current and temperature by the gate driver without necessity of acquiring this information from the converter control board. By using this concept, the output dv/dt at the diode turn- off can be kept approximately constant regardless of the commutated current and junction temperature. Hence, the switching losses could be decreased for the currents and temperatures where the voltage slopes are lower when using a conventional gate driver optimized for the worst case. Moreover, results are shown for one such power semiconductor, showing a total switching loss reduction of up to 28% in comparison with a gate driver without current and temperature measurement. Finally, this concept is particularly suitable for high power semiconductor modules in half-bridge configuration which are recently proposed by several suppliers.

Design and Analysis of a High-Efficiency DC–DC Converter With Soft Switching Capability for Renewable Energy Applications Requiring High Voltage Gain

Renewable sources like solar photovoltaic (PV) and fuel cell stack are preferred to be operated at low voltages. For applications such as grid-tied systems, this necessitates high voltage boosting resulting in efficiency reduction. To handle this issue, this paper proposes a novel high voltage gain, high-efficiency dc–dc converter based on coupled inductor, intermediate capacitor, and leakage energy recovery scheme. The input energy acquired from the source is first stored in the magnetic field of coupled inductor and intermediate capacitor in a lossless manner. In subsequent stages, it is passed on to the output section for load consumption. A passive clamp network around the primary inductor ensures the recovery of energy trapped in the leakage inductance, leading to drastic improvement in the voltage gain and efficiency of the system. Exorbitant duty cycle values are not required for high voltage gain, which prevents problems such as diode reverse recovery. Presence of a passive clamp network causes reduced voltage stress on the switch. This enables the use of low voltage rating switch (with low “ on -state” resistance), improving the overall efficiency of the system. Analytical details of the proposed converter and its hardware results are included.